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Michal Simek17980492007-03-26 01:39:07 +02001/*
Michal Simekcf5c6792008-03-28 12:47:19 +01002 * (C) Copyright 2007-2008 Michal Simek
Michal Simek17980492007-03-26 01:39:07 +02003 *
4 * Michal SIMEK <monstr@monstr.eu>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28#include "../board/xilinx/xupv2p/xparameters.h"
29
30#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
31#define CONFIG_XUPV2P 1
32
33/* uart */
Michal Simekaf7ae1a2008-03-28 12:13:03 +010034#ifdef XILINX_UARTLITE_BASEADDR
Michal Simekf8bf9042007-10-14 16:12:29 +020035#define CONFIG_XILINX_UARTLITE
Michal Simekaf7ae1a2008-03-28 12:13:03 +010036#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
37#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
Michal Simek17980492007-03-26 01:39:07 +020038#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
Michal Simekaf7ae1a2008-03-28 12:13:03 +010039#else
40#ifdef XILINX_UART16550_BASEADDR
41#define CFG_NS16550
42#define CFG_NS16550_SERIAL
43#define CFG_NS16550_REG_SIZE 4
44#define CONFIG_CONS_INDEX 1
45#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR
46#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ
47#define CONFIG_BAUDRATE 115200
48#define CFG_BAUDRATE_TABLE { 9600, 115200 }
49#endif
50#endif
Michal Simek17980492007-03-26 01:39:07 +020051
Michal Simek17980492007-03-26 01:39:07 +020052/*
53 * setting reset address
Wolfgang Denk31c98a82007-04-04 02:09:30 +020054 *
Michal Simek17980492007-03-26 01:39:07 +020055 * TEXT_BASE is set to place, where the U-BOOT run in RAM, but
56 * if you want to store U-BOOT in flash, set CFG_RESET_ADDRESS
57 * to FLASH memory and after loading bitstream jump to FLASH.
58 * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
59 * jump to CFG_RESET_ADDRESS where is the original U-BOOT code.
60 */
Michal Simekf8bf9042007-10-14 16:12:29 +020061/* #define CFG_RESET_ADDRESS 0x36000000 */
Michal Simek17980492007-03-26 01:39:07 +020062
Michal Simeke5845e22008-03-28 11:04:01 +010063/* ethernet */
64#ifdef XILINX_EMAC_BASEADDR
65#define CONFIG_XILINX_EMAC 1
Michal Simek4d49b282008-05-04 15:42:41 +020066#define CFG_ENET
Michal Simeke5845e22008-03-28 11:04:01 +010067#else
68#ifdef XILINX_EMACLITE_BASEADDR
69#define CONFIG_XILINX_EMACLITE 1
Michal Simek4d49b282008-05-04 15:42:41 +020070#define CFG_ENET
Michal Simeke5845e22008-03-28 11:04:01 +010071#endif
72#endif
73#undef ET_DEBUG
74
Michal Simek17980492007-03-26 01:39:07 +020075/* gpio */
Michal Simekf8bf9042007-10-14 16:12:29 +020076#ifdef XILINX_GPIO_BASEADDR
Michal Simek17980492007-03-26 01:39:07 +020077#define CFG_GPIO_0 1
78#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR
Michal Simekf8bf9042007-10-14 16:12:29 +020079#endif
Michal Simek17980492007-03-26 01:39:07 +020080
81/* interrupt controller */
Michal Simek4d49b282008-05-04 15:42:41 +020082#ifdef XILINX_INTC_BASEADDR
Michal Simek17980492007-03-26 01:39:07 +020083#define CFG_INTC_0 1
84#define CFG_INTC_0_ADDR XILINX_INTC_BASEADDR
85#define CFG_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
Michal Simek4d49b282008-05-04 15:42:41 +020086#endif
Michal Simek17980492007-03-26 01:39:07 +020087
88/* timer */
Michal Simek4d49b282008-05-04 15:42:41 +020089#ifdef XILINX_TIMER_BASEADDR
90#if (XILINX_TIMER_IRQ != -1)
Michal Simek17980492007-03-26 01:39:07 +020091#define CFG_TIMER_0 1
92#define CFG_TIMER_0_ADDR XILINX_TIMER_BASEADDR
93#define CFG_TIMER_0_IRQ XILINX_TIMER_IRQ
94#define FREQUENCE XILINX_CLOCK_FREQ
95#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 )
Michal Simek4d49b282008-05-04 15:42:41 +020096#endif
97#else
98#ifdef XILINX_CLOCK_FREQ
Michal Simekf8bf9042007-10-14 16:12:29 +020099#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
Michal Simek4d49b282008-05-04 15:42:41 +0200100#else
101#error BAD CLOCK FREQ
102#endif
103#endif
Michal Simek17980492007-03-26 01:39:07 +0200104/*
105 * memory layout - Example
106 * TEXT_BASE = 0x3600_0000;
107 * CFG_SRAM_BASE = 0x3000_0000;
108 * CFG_SRAM_SIZE = 0x1000_0000;
109 *
110 * CFG_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000
111 * CFG_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000
112 * CFG_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000
113 *
114 * 0x3000_0000 CFG_SDRAM_BASE
115 * FREE
116 * 0x3600_0000 TEXT_BASE
117 * U-BOOT code
118 * 0x3602_0000
119 * FREE
120 *
121 * STACK
122 * 0x3FF7_F000 CFG_MALLOC_BASE
123 * MALLOC_AREA 256kB Alloc
124 * 0x3FFB_F000 CFG_MONITOR_BASE
125 * MONITOR_CODE 256kB Env
126 * 0x3FFF_F000 CFG_GBL_DATA_OFFSET
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200127 * GLOBAL_DATA 4kB bd, gd
Michal Simek17980492007-03-26 01:39:07 +0200128 * 0x4000_0000 CFG_SDRAM_BASE + CFG_SDRAM_SIZE
129 */
130
131/* ddr sdram - main memory */
132#define CFG_SDRAM_BASE XILINX_RAM_START
133#define CFG_SDRAM_SIZE XILINX_RAM_SIZE
134#define CFG_MEMTEST_START CFG_SDRAM_BASE
135#define CFG_MEMTEST_END (CFG_SDRAM_BASE + 0x1000)
136
137/* global pointer */
138#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */
139#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */
140
141/* monitor code */
142#define SIZE 0x40000
143#define CFG_MONITOR_LEN SIZE
144#define CFG_MONITOR_BASE (CFG_GBL_DATA_OFFSET - CFG_MONITOR_LEN)
145#define CFG_MONITOR_END (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
146#define CFG_MALLOC_LEN SIZE
147#define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
148
149/* stack */
150#define CFG_INIT_SP_OFFSET CFG_MALLOC_BASE
151
152#define CFG_NO_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD93f6d722008-09-10 22:48:00 +0200153#define CONFIG_ENV_IS_NOWHERE 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200154#define CONFIG_ENV_SIZE 0x1000
155#define CONFIG_ENV_ADDR (CFG_MONITOR_BASE - CONFIG_ENV_SIZE)
Michal Simek17980492007-03-26 01:39:07 +0200156
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500157/*
Jon Loeliger079a1362007-07-10 10:12:10 -0500158 * BOOTP options
159 */
160#define CONFIG_BOOTP_BOOTFILESIZE
161#define CONFIG_BOOTP_BOOTPATH
162#define CONFIG_BOOTP_GATEWAY
163#define CONFIG_BOOTP_HOSTNAME
164
Jon Loeliger079a1362007-07-10 10:12:10 -0500165/*
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500166 * Command line configuration.
167 */
168#include <config_cmd_default.h>
169
Michal Simekf8bf9042007-10-14 16:12:29 +0200170#undef CONFIG_CMD_FLASH
Michal Simekcf5c6792008-03-28 12:47:19 +0100171#undef CONFIG_CMD_JFFS2
Michal Simekf8bf9042007-10-14 16:12:29 +0200172#undef CONFIG_CMD_IMLS
173
Michal Simekb90c0452007-09-24 00:08:37 +0200174#define CONFIG_CMD_ASKENV
Michal Simekf8bf9042007-10-14 16:12:29 +0200175#define CONFIG_CMD_CACHE
176#define CONFIG_CMD_IRQ
Michal Simek4d49b282008-05-04 15:42:41 +0200177
178#ifndef CFG_ENET
179 #undef CONFIG_CMD_NET
180#else
181 #define CONFIG_CMD_PING
182#endif
Jon Loeligerdca3b3d2007-07-04 22:33:46 -0500183
Michal Simekf8bf9042007-10-14 16:12:29 +0200184#ifdef XILINX_SYSACE_BASEADDR
185#define CONFIG_CMD_EXT2
186#define CONFIG_CMD_FAT
187#endif
Michal Simek17980492007-03-26 01:39:07 +0200188
189/* Miscellaneous configurable options */
190#define CFG_PROMPT "U-Boot-mONStR> "
191#define CFG_CBSIZE 512 /* size of console buffer */
192#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* print buffer size */
193#define CFG_MAXARGS 15 /* max number of command args */
194#define CFG_LONGHELP
195#define CFG_LOAD_ADDR 0x12000000 /* default load address */
196
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200197#define CONFIG_BOOTDELAY 30
Michal Simek17980492007-03-26 01:39:07 +0200198#define CONFIG_BOOTARGS "root=romfs"
Michal Simekf8bf9042007-10-14 16:12:29 +0200199#define CONFIG_HOSTNAME "xupv2p"
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200200#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
Michal Simek17980492007-03-26 01:39:07 +0200201#define CONFIG_IPADDR 192.168.0.3
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200202#define CONFIG_SERVERIP 192.168.0.5
203#define CONFIG_GATEWAYIP 192.168.0.1
Michal Simek17980492007-03-26 01:39:07 +0200204#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
205
206/* architecture dependent code */
207#define CFG_USR_EXCEP /* user exception */
208#define CFG_HZ 1000
209
210#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \
211 "base 0;" \
212 "echo"
213
Michal Simek17980492007-03-26 01:39:07 +0200214/* system ace */
Michal Simekf8bf9042007-10-14 16:12:29 +0200215#ifdef XILINX_SYSACE_BASEADDR
Michal Simek32556442007-04-21 21:07:22 +0200216#define CONFIG_SYSTEMACE
217/* #define DEBUG_SYSTEMACE */
218#define SYSTEMACE_CONFIG_FPGA
219#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
220#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
221#define CONFIG_DOS_PARTITION
Michal Simekf8bf9042007-10-14 16:12:29 +0200222#endif
Michal Simek17980492007-03-26 01:39:07 +0200223
Michal Simekcf5c6792008-03-28 12:47:19 +0100224#define CONFIG_CMDLINE_EDITING
225#define CONFIG_OF_LIBFDT 1 /* flat device tree */
226
Michal Simek17980492007-03-26 01:39:07 +0200227#endif /* __CONFIG_H */