blob: 3f808f925bbdb0fae683392db85bb81fde8eb0c8 [file] [log] [blame]
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02001/*
2 * (C) Copyright 2014
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Robert P. J. Day5052e812016-09-13 08:35:18 -04005 * Basic support for the pwm module on imx6.
Heiko Schocherb2f97cf2014-07-18 06:07:19 +02006 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#include <common.h>
11#include <div64.h>
12#include <pwm.h>
13#include <asm/arch/imx-regs.h>
14#include <asm/io.h>
15#include "pwm-imx-util.h"
16
17int pwm_init(int pwm_id, int div, int invert)
18{
19 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
20
Axel Lin16b0c0c2015-05-23 15:16:48 +080021 if (!pwm)
22 return -1;
23
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020024 writel(0, &pwm->ir);
25 return 0;
26}
27
28int pwm_config(int pwm_id, int duty_ns, int period_ns)
29{
30 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
31 unsigned long period_cycles, duty_cycles, prescale;
32 u32 cr;
33
Axel Lin16b0c0c2015-05-23 15:16:48 +080034 if (!pwm)
35 return -1;
36
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020037 pwm_imx_get_parms(period_ns, duty_ns, &period_cycles, &duty_cycles,
38 &prescale);
39
40 cr = PWMCR_PRESCALER(prescale) |
41 PWMCR_DOZEEN | PWMCR_WAITEN |
42 PWMCR_DBGEN | PWMCR_CLKSRC_IPG_HIGH;
43
44 writel(cr, &pwm->cr);
45 /* set duty cycles */
46 writel(duty_cycles, &pwm->sar);
47 /* set period cycles */
48 writel(period_cycles, &pwm->pr);
49 return 0;
50}
51
52int pwm_enable(int pwm_id)
53{
54 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
55
Axel Lin16b0c0c2015-05-23 15:16:48 +080056 if (!pwm)
57 return -1;
58
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020059 setbits_le32(&pwm->cr, PWMCR_EN);
60 return 0;
61}
62
63void pwm_disable(int pwm_id)
64{
65 struct pwm_regs *pwm = (struct pwm_regs *)pwm_id_to_reg(pwm_id);
66
Axel Lin16b0c0c2015-05-23 15:16:48 +080067 if (!pwm)
68 return;
69
Heiko Schocherb2f97cf2014-07-18 06:07:19 +020070 clrbits_le32(&pwm->cr, PWMCR_EN);
71}