blob: d5588b12414c54c3dadba4d86ecc450223169695 [file] [log] [blame]
Bo Shen7ca6f362014-02-09 15:52:39 +08001/*
2 * Configuration settings for the SAMA5D3 Xplained board.
3 *
4 * Copyright (C) 2014 Atmel Corporation
5 * Bo Shen <voice.shen@atmel.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
13#include <asm/hardware.h>
14
15#define CONFIG_SYS_TEXT_BASE 0x26f00000
16
17/* ARM asynchronous clock */
18#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
19#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
Bo Shen7ca6f362014-02-09 15:52:39 +080020
Bo Shen7ca6f362014-02-09 15:52:39 +080021#define CONFIG_ARCH_CPU_INIT
Bo Shencd23aac42014-03-19 14:48:45 +080022
23#ifndef CONFIG_SPL_BUILD
Bo Shen7ca6f362014-02-09 15:52:39 +080024#define CONFIG_SKIP_LOWLEVEL_INIT
Bo Shencd23aac42014-03-19 14:48:45 +080025#endif
26
Bo Shen7ca6f362014-02-09 15:52:39 +080027#define CONFIG_BOARD_EARLY_INIT_F
28#define CONFIG_DISPLAY_CPUINFO
29
30#define CONFIG_CMD_BOOTZ
31#define CONFIG_OF_LIBFDT /* Device Tree support */
32
Bo Shen96522962014-04-24 11:42:14 +080033#define CONFIG_SYS_GENERIC_BOARD
34
Bo Shen7ca6f362014-02-09 15:52:39 +080035/* general purpose I/O */
36#define CONFIG_AT91_GPIO
37
38/* serial console */
39#define CONFIG_ATMEL_USART
40#define CONFIG_USART_BASE ATMEL_BASE_DBGU
41#define CONFIG_USART_ID ATMEL_ID_DBGU
42
43/*
44 * This needs to be defined for the OHCI code to work but it is defined as
45 * ATMEL_ID_UHPHS in the CPU specific header files.
46 */
47#define ATMEL_ID_UHP ATMEL_ID_UHPHS
48
49/*
50 * Specify the clock enable bit in the PMC_SCER register.
51 */
52#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
53
54#define CONFIG_BOOTDELAY 3
55
56/*
57 * BOOTP options
58 */
59#define CONFIG_BOOTP_BOOTFILESIZE
60#define CONFIG_BOOTP_BOOTPATH
61#define CONFIG_BOOTP_GATEWAY
62#define CONFIG_BOOTP_HOSTNAME
63
64/* No NOR flash */
65#define CONFIG_SYS_NO_FLASH
66
67/*
68 * Command line configuration.
69 */
70#include <config_cmd_default.h>
71#undef CONFIG_CMD_FPGA
72#undef CONFIG_CMD_IMI
73#undef CONFIG_CMD_LOADS
74#define CONFIG_CMD_PING
75#define CONFIG_CMD_DHCP
76
77/* SDRAM */
78#define CONFIG_NR_DRAM_BANKS 1
79#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_DDRCS
80#define CONFIG_SYS_SDRAM_SIZE 0x10000000
81
Bo Shencd23aac42014-03-19 14:48:45 +080082#ifdef CONFIG_SPL_BUILD
83#define CONFIG_SYS_INIT_SP_ADDR 0x310000
84#else
Bo Shen7ca6f362014-02-09 15:52:39 +080085#define CONFIG_SYS_INIT_SP_ADDR \
86 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shencd23aac42014-03-19 14:48:45 +080087#endif
Bo Shen7ca6f362014-02-09 15:52:39 +080088
89/* NAND flash */
90#define CONFIG_CMD_NAND
91
92#ifdef CONFIG_CMD_NAND
93#define CONFIG_NAND_ATMEL
94#define CONFIG_SYS_MAX_NAND_DEVICE 1
95#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
96/* our ALE is AD21 */
97#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
98/* our CLE is AD22 */
99#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
100#define CONFIG_SYS_NAND_ONFI_DETECTION
101/* PMECC & PMERRLOC */
102#define CONFIG_ATMEL_NAND_HWECC
103#define CONFIG_ATMEL_NAND_HW_PMECC
104#define CONFIG_PMECC_CAP 4
105#define CONFIG_PMECC_SECTOR_SIZE 512
106#define CONFIG_CMD_NAND_TRIMFFS
107#define CONFIG_CMD_MTDPARTS
108
109#define CONFIG_MTD_DEVICE
110#define CONFIG_MTD_PARTITIONS
111#define CONFIG_RBTREE
112#define CONFIG_LZO
113#define CONFIG_CMD_UBI
114#define CONFIG_CMD_UBIFS
115#endif
116
117/* Ethernet Hardware */
118#define CONFIG_MACB
119#define CONFIG_RMII
120#define CONFIG_NET_MULTI
121#define CONFIG_NET_RETRY_COUNT 20
122#define CONFIG_MACB_SEARCH_PHY
123#define CONFIG_RGMII
124#define CONFIG_CMD_MII
125#define CONFIG_PHYLIB
126
127/* MMC */
128#define CONFIG_CMD_MMC
129
130#ifdef CONFIG_CMD_MMC
131#define CONFIG_MMC
132#define CONFIG_GENERIC_MMC
133#define CONFIG_GENERIC_ATMEL_MCI
134#define CONFIG_ATMEL_MCI_8BIT
135#endif
136
137/* USB */
138#define CONFIG_CMD_USB
139
140#ifdef CONFIG_CMD_USB
141#define CONFIG_USB_ATMEL
142#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
143#define CONFIG_USB_OHCI_NEW
144#define CONFIG_SYS_USB_OHCI_CPU_INIT
145#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
146#define CONFIG_SYS_USB_OHCI_SLOT_NAME "SAMA5D3 Xplained"
147#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
148#define CONFIG_DOS_PARTITION
149#define CONFIG_USB_STORAGE
150#endif
151
152#if defined(CONFIG_CMD_USB) || defined(CONFIG_CMD_MMC)
153#define CONFIG_CMD_FAT
154#define CONFIG_FAT_WRITE
155#define CONFIG_CMD_EXT4
156#define CONFIG_CMD_EXT4_WRITE
157#endif
158
159#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
160
161#if CONFIG_SYS_USE_NANDFLASH
162/* bootstrap + u-boot + env in nandflash */
163#define CONFIG_ENV_IS_IN_NAND
164#define CONFIG_ENV_OFFSET 0xc0000
165#define CONFIG_ENV_OFFSET_REDUND 0x100000
166#define CONFIG_ENV_SIZE 0x20000
167#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0x180000 0x80000;" \
168 "nand read 0x22000000 0x200000 0x600000;" \
169 "bootz 0x22000000 - 0x21000000"
170#elif CONFIG_SYS_USE_MMC
171/* bootstrap + u-boot + env in sd card */
172#define CONFIG_ENV_IS_IN_MMC
173#define CONFIG_ENV_OFFSET 0x2000
174#define CONFIG_ENV_SIZE 0x1000
175#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d3_xplained.dtb; " \
176 "fatload mmc 0:1 0x22000000 zImage; " \
177 "bootz 0x22000000 - 0x21000000"
178#define CONFIG_SYS_MMC_ENV_DEV 0
179#else
180#define CONFIG_ENV_IS_NOWHERE
181#endif
182
183#ifdef CONFIG_SYS_USE_MMC
184#define CONFIG_BOOTARGS \
185 "console=ttyS0,115200 earlyprintk " \
186 "root=/dev/mmcblk0p2 rw rootwait"
187#else
188#define CONFIG_BOOTARGS \
189 "console=ttyS0,115200 earlyprintk " \
190 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
191 "256K(env),256k(evn_redundent),256k(spare)," \
192 "512k(dtb),6M(kernel)ro,-(rootfs) " \
193 "rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
194#endif
195
196#define CONFIG_BAUDRATE 115200
197
198#define CONFIG_SYS_PROMPT "U-Boot> "
199#define CONFIG_SYS_CBSIZE 256
200#define CONFIG_SYS_MAXARGS 16
201#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
202 sizeof(CONFIG_SYS_PROMPT) + 16)
203#define CONFIG_SYS_LONGHELP
204#define CONFIG_CMDLINE_EDITING
205#define CONFIG_AUTO_COMPLETE
206#define CONFIG_SYS_HUSH_PARSER
207
208/* Size of malloc() pool */
209#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
210
Bo Shencd23aac42014-03-19 14:48:45 +0800211/* SPL */
Bo Shencd23aac42014-03-19 14:48:45 +0800212#define CONFIG_SPL_FRAMEWORK
213#define CONFIG_SPL_TEXT_BASE 0x300000
214#define CONFIG_SPL_MAX_SIZE 0x10000
215#define CONFIG_SPL_BSS_START_ADDR 0x20000000
216#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
217#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
218#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
219
220#define CONFIG_SPL_LIBCOMMON_SUPPORT
221#define CONFIG_SPL_LIBGENERIC_SUPPORT
222#define CONFIG_SPL_GPIO_SUPPORT
223#define CONFIG_SPL_SERIAL_SUPPORT
224
225#define CONFIG_SPL_BOARD_INIT
226#define CONFIG_SYS_MONITOR_LEN (512 << 10)
227
228#ifdef CONFIG_SYS_USE_MMC
229#define CONFIG_SPL_LDSCRIPT arch/arm/cpu/at91-common/u-boot-spl.lds
230#define CONFIG_SPL_MMC_SUPPORT
231#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
232#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
Paul Kocialkowskie2ccdf82014-11-08 23:14:55 +0100233#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET205b4f32014-10-15 17:53:11 +0200234#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Bo Shencd23aac42014-03-19 14:48:45 +0800235#define CONFIG_SPL_FAT_SUPPORT
236#define CONFIG_SPL_LIBDISK_SUPPORT
237
238#elif CONFIG_SYS_USE_NANDFLASH
239#define CONFIG_SPL_NAND_SUPPORT
240#define CONFIG_SPL_NAND_DRIVERS
241#define CONFIG_SPL_NAND_BASE
242#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
243#define CONFIG_SYS_NAND_5_ADDR_CYCLE
244#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
245#define CONFIG_SYS_NAND_PAGE_COUNT 64
246#define CONFIG_SYS_NAND_OOBSIZE 64
247#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
248#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
249
250#endif
251
Bo Shen7ca6f362014-02-09 15:52:39 +0800252#endif