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Patrice Chotard246771b2017-09-13 18:00:12 +02001/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02002 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
3 * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
Patrice Chotard246771b2017-09-13 18:00:12 +02004 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#include <common.h>
9#include <asm/io.h>
10#include <asm/armv7m_mpu.h>
11
Patrice Chotard246771b2017-09-13 18:00:12 +020012int arch_cpu_init(void)
13{
14 int i;
15
16 struct mpu_region_config stm32_region_config[] = {
17 /*
Patrice Chotardf5bd13e2018-02-28 17:15:00 +010018 * Make SDRAM area cacheable & executable.
Patrice Chotard246771b2017-09-13 18:00:12 +020019 */
Patrice Chotardf5bd13e2018-02-28 17:15:00 +010020#if defined(CONFIG_STM32F4)
Patrice Chotard246771b2017-09-13 18:00:12 +020021 { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
Patrice Chotardf5bd13e2018-02-28 17:15:00 +010022 O_I_WB_RD_WR_ALLOC, REGION_16MB },
23#endif
Patrice Chotard246771b2017-09-13 18:00:12 +020024
Patrice Chotardf5bd13e2018-02-28 17:15:00 +010025#if defined(CONFIG_STM32F7)
26 { 0xC0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
27 O_I_WB_RD_WR_ALLOC, REGION_16MB },
28#endif
Patrice Chotard246771b2017-09-13 18:00:12 +020029
Patrice Chotardf5bd13e2018-02-28 17:15:00 +010030#if defined(CONFIG_STM32H7)
31 { 0xD0000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
32 O_I_WB_RD_WR_ALLOC, REGION_32MB },
Patrice Chotardc729fb22017-11-16 08:59:21 +010033#endif
Patrice Chotard246771b2017-09-13 18:00:12 +020034 };
35
36 disable_mpu();
37 for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
38 mpu_config(&stm32_region_config[i]);
39 enable_mpu();
40
41 return 0;
42}