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Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +09001/*
2 * Copyright (C) 2009, 2011 Renesas Solutions Corp.
3 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
4 * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +09007 */
8
9#include <common.h>
10#include <command.h>
11#include <asm/io.h>
12#include <asm/processor.h>
13#include <i2c.h>
14#include <netdev.h>
15
16/* USB power management register */
17#define UPONCR0 0xA40501D4
18
19int checkboard(void)
20{
21 puts("BOARD: ecovec\n");
22 return 0;
23}
24
25int dram_init(void)
26{
27 DECLARE_GLOBAL_DATA_PTR;
28
29 gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
30 gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
31 printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
32 return 0;
33}
34
35static void debug_led(u8 led)
36{
37 /* PDGR[0-4] is debug LED */
38 outb((inb(PGDR) & ~0x0F) | (led & 0x0F), PGDR);
39}
40
41int board_late_init(void)
42{
43 u8 mac[6];
44 char env_mac[17];
Nobuhiro Iwamatsu6d1d5cf2011-11-15 12:29:06 +090045
46 udelay(1000);
47
48 /* SH-Eth (PLCR, PNCR, PXCR, PSELx )*/
49 outw(inw(PLCR) & ~0xFFF0, PLCR);
50 outw(inw(PNCR) & ~0x000F, PNCR);
51 outw(inw(PXCR) & ~0x0FC0, PXCR);
52 outw((inw(PSELB) & ~0x030F) | 0x020A, PSELB);
53 outw((inw(PSELC) & ~0x0307) | 0x0207, PSELC);
54 outw((inw(PSELE) & ~0x00c0) | 0x0080, PSELE);
55
56 debug_led(1 << 3);
57
58 outl(inl(MSTPCR2) & ~0x10000000, MSTPCR2);
59
60 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
61 i2c_set_bus_num(CONFIG_SYS_I2C_MODULE); /* Use I2C 1 */
62
63 /* Read MAC address */
64 i2c_read(0x50, 0x10, 0, mac, 6);
65
66 /* Set MAC address */
67 sprintf(env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
68 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
69 setenv("ethaddr", env_mac);
70
71 debug_led(0x0F);
72
73 return 0;
74}
75
76int board_init(void)
77{
78
79 /* LED (PTG) */
80 outw((inw(PGCR) & ~0xFF) | 0x66, PGCR);
81 outw((inw(HIZCRA) & ~0x02), HIZCRA);
82
83 debug_led(1 << 0);
84
85 /* SCIF0 (PTF, PTM) */
86 outw(inw(PFCR) & ~0x30, PFCR);
87 outw(inw(PMCR) & ~0x0C, PMCR);
88 outw((inw(PSELA) & ~0x40) | 0x40, PSELA);
89
90 debug_led(1 << 1);
91
92 /* RMII (PTA) */
93 outw((inw(PACR) & ~0x0C) | 0x04, PACR);
94 outb((inb(PADR) & ~0x02) | 0x02, PADR);
95
96 debug_led(1 << 2);
97
98 /* USB host */
99 outw((inw(PBCR) & ~0x300) | 0x100, PBCR);
100 outb((inb(PBDR) & ~0x10) | 0x10, PBDR);
101 outl(inl(MSTPCR2) & 0x100000, MSTPCR2);
102 outw(0x0600, UPONCR0);
103
104 debug_led(1 << 3);
105
106 /* debug switch */
107 outw((inw(PVCR) & ~0x03) | 0x02 , PVCR);
108
109 return 0;
110}