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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 1d01440b3f14f6648cd672da619489f635cb209c / . / arch / arm / mach-mvebu / Kconfig
blob: 2058c95ca2d0eb058db5e519ed0dc487e913fcc6 [file] [log] [blame]
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]1if ARCH_MVEBU
2
Mario Sixa1b6b0a2017-01-11 16:01:00 +0100[diff] [blame]3config HAVE_MVEBU_EFUSE
4 bool
Mario Sixa1b6b0a2017-01-11 16:01:00 +0100[diff] [blame]5
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]6config ARMADA_32BIT
7 bool
Michal Simek58008cb2018-07-23 15:55:15 +0200[diff] [blame]8 select BOARD_EARLY_INIT_F
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530[diff] [blame]9 select CPU_V7A
Stefan Roese237b6292019-04-11 08:58:32 +0200[diff] [blame]10 select SPL_DM if SPL
11 select SPL_DM_SEQ_ALIAS if SPL
12 select SPL_OF_CONTROL if SPL
Tom Rini7609e022021-10-15 10:54:41 -0400[diff] [blame]13 select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese237b6292019-04-11 08:58:32 +0200[diff] [blame]14 select SPL_SIMPLE_BUS if SPL
Michal Simek58008cb2018-07-23 15:55:15 +0200[diff] [blame]15 select SUPPORT_SPL
Philip Oberfichtner11168882022-08-17 15:07:12 +0200[diff] [blame]16 select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roesef2100f62019-04-12 16:42:28 +0200[diff] [blame]17 select TRANSLATION_OFFSET
Alexander Dahlb646a102023-12-21 08:26:10 +0100[diff] [blame]18 select TOOLS_KWBIMAGE if SPL
Pali Rohár2975bba2022-04-06 16:20:20 +0200[diff] [blame]19 select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Rohár5bb2c552022-05-06 11:05:14 +0200[diff] [blame]20 select ARCH_VERY_EARLY_INIT
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]21
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]22# ARMv7 SoCs...
Stefan Roese606576d2016-01-29 09:14:54 +0100[diff] [blame]23config ARMADA_375
24 bool
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]25 select ARMADA_32BIT
Stefan Roese606576d2016-01-29 09:14:54 +0100[diff] [blame]26
Stefan Roese81e33f42015-12-21 13:56:33 +0100[diff] [blame]27config ARMADA_38X
28 bool
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]29 select ARMADA_32BIT
Mario Sixa1b6b0a2017-01-11 16:01:00 +0100[diff] [blame]30 select HAVE_MVEBU_EFUSE
Stefan Roese81e33f42015-12-21 13:56:33 +0100[diff] [blame]31
Joshua Scott28f0cbc2020-11-09 10:14:08 +1300[diff] [blame]32config ARMADA_38X_HS_IMPEDANCE_THRESH
33 hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
34 depends on ARMADA_38X
35 default 0x6
36 range 0x0 0x7
37
Stefan Roese81e33f42015-12-21 13:56:33 +0100[diff] [blame]38config ARMADA_XP
39 bool
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]40 select ARMADA_32BIT
Stefan Roese81e33f42015-12-21 13:56:33 +0100[diff] [blame]41
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]42# ARMv8 SoCs...
43config ARMADA_3700
44 bool
45 select ARM64
Pali Rohár10154b82022-02-23 14:15:45 +0100[diff] [blame]46 select HAVE_MVEBU_EFUSE
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]47
Stefan Roese21b29fc2016-05-25 08:13:45 +0200[diff] [blame]48# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
49config ARMADA_8K
50 bool
51 select ARM64
52
Chris Packham7d7bb992022-11-05 17:23:59 +1300[diff] [blame]53config ALLEYCAT_5
54 bool
55 select ARM64
56
Chris Packhama53d97a2016-10-26 14:08:30 +1300[diff] [blame]57# Armada PLL frequency (used for NAND clock generation)
58config SYS_MVEBU_PLL_CLOCK
59 int
Chris Packham0d0df462019-04-11 22:22:50 +1200[diff] [blame]60 default "2000000000" if ARMADA_XP || ARMADA_3700 || ARMADA_8K || ARMADA_MSYS
Chris Packhama53d97a2016-10-26 14:08:30 +1300[diff] [blame]61 default "1000000000" if ARMADA_38X || ARMADA_375
62
Stefan Roesef61aefc2016-05-17 15:00:30 +0200[diff] [blame]63# Armada XP/38x SoC types...
Phil Sutter42902522015-12-25 14:41:22 +0100[diff] [blame]64config MV78230
65 bool
66 select ARMADA_XP
67
68config MV78260
69 bool
70 select ARMADA_XP
Simon Glass3bf926c2017-06-14 21:28:24 -0600[diff] [blame]71 imply CMD_SATA
Phil Sutter42902522015-12-25 14:41:22 +0100[diff] [blame]72
73config MV78460
74 bool
75 select ARMADA_XP
76
Chris Packham0d0df462019-04-11 22:22:50 +1200[diff] [blame]77config ARMADA_MSYS
78 bool
79 select ARMADA_32BIT
80
81config 98DX4251
82 bool
83 select ARMADA_MSYS
84
85config 98DX3336
86 bool
87 select ARMADA_MSYS
88
89config 98DX3236
90 bool
91 select ARMADA_MSYS
92
Chris Packham53d601f2016-09-22 12:56:13 +1200[diff] [blame]93config 88F6820
Phil Sutter42902522015-12-25 14:41:22 +0100[diff] [blame]94 bool
95 select ARMADA_38X
96
Tom Rini53dbf112022-03-30 18:07:24 -0400[diff] [blame]97config CUSTOMER_BOARD_SUPPORT
98 bool
99
Tony Dinh3fdd09f2023-02-01 15:13:05 -0800[diff] [blame]100config DDR4
101 bool "Support Marvell DDR4 Training driver"
102
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]103choice
Chris Packham6cc8b5d2022-11-05 17:24:00 +1300[diff] [blame]104 prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]105 optional
106
Stefan Roese0299c902015-10-20 15:14:47 +0200[diff] [blame]107config TARGET_CLEARFOG
108 bool "Support ClearFog"
Chris Packham53d601f2016-09-22 12:56:13 +1200[diff] [blame]109 select 88F6820
Baruch Siach867572f2020-01-20 14:20:13 +0200[diff] [blame]110 select BOARD_LATE_INIT
Martin Rowec733fe92023-03-27 21:24:09 +1000[diff] [blame]111 select OF_BOARD_SETUP
Stefan Roese0299c902015-10-20 15:14:47 +0200[diff] [blame]112
Dennis Gilmoreae28a5f2018-06-11 19:39:53 -0500[diff] [blame]113config TARGET_HELIOS4
114 bool "Support Helios4"
115 select 88F6820
116
Konstantin Porotchkinc5330ae2017-02-16 13:52:22 +0200[diff] [blame]117config TARGET_MVEBU_ARMADA_37XX
118 bool "Support Armada 37xx platforms"
Stefan Roese01e62c72016-05-17 15:04:16 +0200[diff] [blame]119 select ARMADA_3700
Simon Glassfedb4282017-06-14 21:28:21 -0600[diff] [blame]120 imply SCSI
Stefan Roese01e62c72016-05-17 15:04:16 +0200[diff] [blame]121
Stefan Roese606576d2016-01-29 09:14:54 +0100[diff] [blame]122config TARGET_DB_88F6720
123 bool "Support DB-88F6720 Armada 375"
124 select ARMADA_375
125
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]126config TARGET_DB_88F6820_GP
127 bool "Support DB-88F6820-GP"
Chris Packham53d601f2016-09-22 12:56:13 +1200[diff] [blame]128 select 88F6820
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]129
Chris Packhamc0def242016-09-22 12:56:14 +1200[diff] [blame]130config TARGET_DB_88F6820_AMC
131 bool "Support DB-88F6820-AMC"
132 select 88F6820
133
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]134config TARGET_TURRIS_OMNIA
135 bool "Support Turris Omnia"
136 select 88F6820
Marek Behún539f0242019-05-02 16:53:37 +0200[diff] [blame]137 select BOARD_LATE_INIT
Marek Behún8420edc2019-05-02 16:53:28 +0200[diff] [blame]138 select DM_I2C
139 select I2C_MUX
140 select I2C_MUX_PCA954x
Marek Behún6d7bfb62021-10-09 19:33:46 +0200[diff] [blame]141 select SPL_DRIVERS_MISC
Marek Behún8420edc2019-05-02 16:53:28 +0200[diff] [blame]142 select SPL_I2C_MUX
Marek Behún2c8a4e42021-10-09 19:33:45 +0200[diff] [blame]143 select SPL_SYS_MALLOC_SIMPLE
Marek Behún8420edc2019-05-02 16:53:28 +0200[diff] [blame]144 select SYS_I2C_MVTWSI
Marek Behún6b26f3e2019-05-02 16:53:32 +0200[diff] [blame]145 select ATSHA204A
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]146
Marek Behún80af1a92018-04-24 17:21:31 +0200[diff] [blame]147config TARGET_TURRIS_MOX
Marek Behún94c0f0b2023-10-20 16:29:16 +0200[diff] [blame]148 bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe"
Marek Behún80af1a92018-04-24 17:21:31 +0200[diff] [blame]149 select ARMADA_3700
Marek Behún94c0f0b2023-10-20 16:29:16 +0200[diff] [blame]150 select BOARD_TYPES
151 select ENV_IS_IN_MMC
152 select ENV_IS_IN_SPI_FLASH
153 select MULTI_DTB_FIT
Marek Behún80af1a92018-04-24 17:21:31 +0200[diff] [blame]154
Stefan Roese633fa0e2016-10-25 10:56:19 +0200[diff] [blame]155config TARGET_MVEBU_ARMADA_8K
156 bool "Support Armada 7k/8k platforms"
Stefan Roese6f8c2d42016-05-25 08:21:21 +0200[diff] [blame]157 select ARMADA_8K
Tom Rinie5ec4812017-01-22 19:43:11 -0500[diff] [blame]158 select BOARD_LATE_INIT
Simon Glassfedb4282017-06-14 21:28:21 -0600[diff] [blame]159 imply SCSI
Stefan Roese6f8c2d42016-05-25 08:21:21 +0200[diff] [blame]160
Chris Packham6cc8b5d2022-11-05 17:24:00 +1300[diff] [blame]161config TARGET_MVEBU_ALLEYCAT5
162 bool "Support AlleyCat 5 platforms"
163 select ALLEYCAT_5
164
Konstantin Porotchkinc4052262021-03-16 17:20:57 +0100[diff] [blame]165config TARGET_OCTEONTX2_CN913x
166 bool "Support CN913x platforms"
167 select ARMADA_8K
168 imply BOARD_EARLY_INIT_R
169 select BOARD_LATE_INIT
170 imply SCSI
171
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]172config TARGET_DB_MV784MP_GP
173 bool "Support db-mv784mp-gp"
Tom Rinida8592d2022-02-25 11:19:46 -0500[diff] [blame]174 select BOARD_ECC_SUPPORT
Phil Sutter42902522015-12-25 14:41:22 +0100[diff] [blame]175 select MV78460
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]176
Tony Dinhb21f87a52023-02-09 14:00:03 -0800[diff] [blame]177config TARGET_DS116
178 bool "Support Synology DS116"
179 select 88F6820
180
Phil Sutteraefb8f42015-12-25 14:41:25 +0100[diff] [blame]181config TARGET_DS414
182 bool "Support Synology DS414"
183 select MV78230
184
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]185config TARGET_MAXBCM
186 bool "Support maxbcm"
Tom Rinida8592d2022-02-25 11:19:46 -0500[diff] [blame]187 select BOARD_ECC_SUPPORT
Phil Sutter42902522015-12-25 14:41:22 +0100[diff] [blame]188 select MV78460
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]189
Tony Dinh3fdd09f2023-02-01 15:13:05 -0800[diff] [blame]190config TARGET_N2350
191 bool "Support Thecus N2350"
192 select 88F6820
193 select DDR4
194
Stefan Roeseb20c38a2016-01-20 08:13:29 +0100[diff] [blame]195config TARGET_THEADORABLE
196 bool "Support theadorable Armada XP"
Tom Rinie5ec4812017-01-22 19:43:11 -0500[diff] [blame]197 select BOARD_LATE_INIT if USB
Stefan Roeseb20c38a2016-01-20 08:13:29 +0100[diff] [blame]198 select MV78260
Simon Glass3bf926c2017-06-14 21:28:24 -0600[diff] [blame]199 imply CMD_SATA
Stefan Roeseb20c38a2016-01-20 08:13:29 +0100[diff] [blame]200
Dirk Eibach60083262017-02-22 16:07:23 +0100[diff] [blame]201config TARGET_CONTROLCENTERDC
202 bool "Support CONTROLCENTERDC"
203 select 88F6820
Tom Rini53dbf112022-03-30 18:07:24 -0400[diff] [blame]204 select CUSTOMER_BOARD_SUPPORT
Dirk Eibach60083262017-02-22 16:07:23 +0100[diff] [blame]205
Chris Packham0e316662019-01-10 21:01:00 +1300[diff] [blame]206config TARGET_X530
207 bool "Support Allied Telesis x530"
208 select 88F6820
209
Chris Packham4c97c4b2023-07-10 10:47:36 +1200[diff] [blame]210config TARGET_X240
211 bool "Support Allied Telesis x240"
212 select ALLEYCAT_5
213
Chris Packham4db944a2019-04-11 22:22:53 +1200[diff] [blame]214config TARGET_DB_XC3_24G4XG
215 bool "Support DB-XC3-24G4XG"
216 select 98DX3336
217
Luka Kovacicdf9ebbe2020-05-26 20:17:50 +0200[diff] [blame]218config TARGET_CRS3XX_98DX3236
219 bool "Support CRS3XX-98DX3236"
Luka Kovacic22bb9132019-05-07 19:35:55 +0200[diff] [blame]220 select 98DX3236
221
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]222endchoice
223
Tom Rini5b527c52021-08-21 13:50:13 -0400[diff] [blame]224choice
225 prompt "DDR bus width"
226 default DDR_64BIT
227 depends on ARMADA_XP
228
229config DDR_64BIT
230 bool "64bit bus width"
231
232config DDR_32BIT
233 bool "32bit bus width"
234
235endchoice
236
Tom Rinif66a3fd2021-08-21 13:50:15 -0400[diff] [blame]237config DDR_LOG_LEVEL
238 int "DDR training code log level"
239 depends on ARMADA_XP
240 default 0
241 range 0 3
242 help
243 Amount of information provided on error while running the DDR
244 training code. At level 0, provides an error code in a case of
245 failure, RL, WL errors and other algorithm failure. At level 1,
246 provides the D-Unit setup (SPD/Static configuration). At level 2,
247 provides the windows margin as a results of DQS centeralization.
248 At level 3, rovides the windows margin of each DQ as a results of
249 DQS centeralization.
250
Marek Behún871ee662022-02-17 13:54:42 +0100[diff] [blame]251config DDR_RESET_ON_TRAINING_FAILURE
252 bool "Reset the board on DDR training failure instead of hanging"
253 depends on ARMADA_38X || ARMADA_XP
254 help
255 If DDR training fails in SPL, reset the board instead of hanging.
256 Some boards are known to fail DDR training occasionally and an
257 immediate reset may be preferable to waiting until the board is
258 reset by watchdog (if there even is one).
259
260 Note that if booting via UART and the DDR training fails, the
261 device will still hang - it doesn't make sense to reset the board
262 in such a case.
263
Tom Rinida8592d2022-02-25 11:19:46 -0500[diff] [blame]264config BOARD_ECC_SUPPORT
265 bool
266
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]267config SYS_BOARD
268 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmoreae28a5f2018-06-11 19:39:53 -0500[diff] [blame]269 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkinc5330ae2017-02-16 13:52:22 +0200[diff] [blame]270 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese606576d2016-01-29 09:14:54 +0100[diff] [blame]271 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]272 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhamc0def242016-09-22 12:56:14 +1200[diff] [blame]273 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]274 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún80af1a92018-04-24 17:21:31 +0200[diff] [blame]275 default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese633fa0e2016-10-25 10:56:19 +0200[diff] [blame]276 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkinc4052262021-03-16 17:20:57 +0100[diff] [blame]277 default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]278 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinhb21f87a52023-02-09 14:00:03 -0800[diff] [blame]279 default "ds116" if TARGET_DS116
Phil Sutteraefb8f42015-12-25 14:41:25 +0100[diff] [blame]280 default "ds414" if TARGET_DS414
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]281 default "maxbcm" if TARGET_MAXBCM
Tony Dinh3fdd09f2023-02-01 15:13:05 -0800[diff] [blame]282 default "n2350" if TARGET_N2350
Stefan Roeseb20c38a2016-01-20 08:13:29 +0100[diff] [blame]283 default "theadorable" if TARGET_THEADORABLE
Baruch Siachd38f04f2018-06-18 21:56:23 +0300[diff] [blame]284 default "a38x" if TARGET_CONTROLCENTERDC
Chris Packham0e316662019-01-10 21:01:00 +1300[diff] [blame]285 default "x530" if TARGET_X530
Chris Packham4c97c4b2023-07-10 10:47:36 +1200[diff] [blame]286 default "x240" if TARGET_X240
Chris Packham4db944a2019-04-11 22:22:53 +1200[diff] [blame]287 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacicdf9ebbe2020-05-26 20:17:50 +0200[diff] [blame]288 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham6cc8b5d2022-11-05 17:24:00 +1300[diff] [blame]289 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]290
291config SYS_CONFIG_NAME
292 default "clearfog" if TARGET_CLEARFOG
Dennis Gilmoreae28a5f2018-06-11 19:39:53 -0500[diff] [blame]293 default "helios4" if TARGET_HELIOS4
Konstantin Porotchkinc5330ae2017-02-16 13:52:22 +0200[diff] [blame]294 default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese606576d2016-01-29 09:14:54 +0100[diff] [blame]295 default "db-88f6720" if TARGET_DB_88F6720
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]296 default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packhamc0def242016-09-22 12:56:14 +1200[diff] [blame]297 default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese633fa0e2016-10-25 10:56:19 +0200[diff] [blame]298 default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkinc4052262021-03-16 17:20:57 +0100[diff] [blame]299 default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]300 default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinhb21f87a52023-02-09 14:00:03 -0800[diff] [blame]301 default "ds116" if TARGET_DS116
Phil Sutteraefb8f42015-12-25 14:41:25 +0100[diff] [blame]302 default "ds414" if TARGET_DS414
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]303 default "maxbcm" if TARGET_MAXBCM
Tony Dinh3fdd09f2023-02-01 15:13:05 -0800[diff] [blame]304 default "n2350" if TARGET_N2350
Stefan Roeseb20c38a2016-01-20 08:13:29 +0100[diff] [blame]305 default "theadorable" if TARGET_THEADORABLE
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]306 default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún80af1a92018-04-24 17:21:31 +0200[diff] [blame]307 default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siachd38f04f2018-06-18 21:56:23 +0300[diff] [blame]308 default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packham0e316662019-01-10 21:01:00 +1300[diff] [blame]309 default "x530" if TARGET_X530
Chris Packham4c97c4b2023-07-10 10:47:36 +1200[diff] [blame]310 default "x240" if TARGET_X240
Chris Packham4db944a2019-04-11 22:22:53 +1200[diff] [blame]311 default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacicdf9ebbe2020-05-26 20:17:50 +0200[diff] [blame]312 default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham6cc8b5d2022-11-05 17:24:00 +1300[diff] [blame]313 default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]314
315config SYS_VENDOR
316 default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkinc5330ae2017-02-16 13:52:22 +0200[diff] [blame]317 default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese606576d2016-01-29 09:14:54 +0100[diff] [blame]318 default "Marvell" if TARGET_DB_88F6720
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]319 default "Marvell" if TARGET_DB_88F6820_GP
Chris Packhamc0def242016-09-22 12:56:14 +1200[diff] [blame]320 default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese633fa0e2016-10-25 10:56:19 +0200[diff] [blame]321 default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkinc4052262021-03-16 17:20:57 +0100[diff] [blame]322 default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham4db944a2019-04-11 22:22:53 +1200[diff] [blame]323 default "Marvell" if TARGET_DB_XC3_24G4XG
324 default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]325 default "solidrun" if TARGET_CLEARFOG
Dennis Gilmoreae28a5f2018-06-11 19:39:53 -0500[diff] [blame]326 default "kobol" if TARGET_HELIOS4
Tony Dinhb21f87a52023-02-09 14:00:03 -0800[diff] [blame]327 default "Synology" if TARGET_DS116
Phil Sutteraefb8f42015-12-25 14:41:25 +0100[diff] [blame]328 default "Synology" if TARGET_DS414
Tony Dinh3fdd09f2023-02-01 15:13:05 -0800[diff] [blame]329 default "thecus" if TARGET_N2350
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]330 default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behún80af1a92018-04-24 17:21:31 +0200[diff] [blame]331 default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siachd38f04f2018-06-18 21:56:23 +0300[diff] [blame]332 default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packham0e316662019-01-10 21:01:00 +1300[diff] [blame]333 default "alliedtelesis" if TARGET_X530
Chris Packham4c97c4b2023-07-10 10:47:36 +1200[diff] [blame]334 default "alliedtelesis" if TARGET_X240
Luka Kovacicdf9ebbe2020-05-26 20:17:50 +0200[diff] [blame]335 default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham6cc8b5d2022-11-05 17:24:00 +1300[diff] [blame]336 default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roeseb322c832015-12-21 13:40:37 +0100[diff] [blame]337
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]338config SYS_SOC
339 default "mvebu"
340
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]341choice
Baruch Siachad105f52018-06-18 21:56:24 +0300[diff] [blame]342 prompt "Boot method"
Joel Johnsonab2f7572020-04-17 01:19:05 -0600[diff] [blame]343 depends on SPL
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]344
Baruch Siachad105f52018-06-18 21:56:24 +0300[diff] [blame]345config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár41d52f32023-01-10 23:13:01 +0100[diff] [blame]346 bool "NOR flash (SPI or parallel)"
Joel Johnsonab2f7572020-04-17 01:19:05 -0600[diff] [blame]347 imply ENV_IS_IN_SPI_FLASH
Pali Rohár2226ca12021-07-23 11:14:29 +0200[diff] [blame]348 imply SPL_DM_SPI
349 imply SPL_SPI_FLASH_SUPPORT
350 imply SPL_SPI_LOAD
Simon Glassea2ca7e2021-08-08 12:20:14 -0600[diff] [blame]351 imply SPL_SPI
Pali Rohár9d0225b2021-07-23 11:14:25 +0200[diff] [blame]352 select SPL_BOOTROM_SUPPORT
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]353
Pali Rohár67bd6152023-01-10 22:55:21 +0100[diff] [blame]354config MVEBU_SPL_BOOT_DEVICE_NAND
355 bool "NAND flash (SPI or parallel)"
356 select MTD_RAW_NAND
357 select SPL_BOOTROM_SUPPORT
358
Baruch Siachad105f52018-06-18 21:56:24 +0300[diff] [blame]359config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár41d52f32023-01-10 23:13:01 +0100[diff] [blame]360 bool "eMMC or SD card"
Joel Johnsonab2f7572020-04-17 01:19:05 -0600[diff] [blame]361 imply ENV_IS_IN_MMC
362 # GPIO needed for eMMC/SD card presence detection
Pali Rohár2226ca12021-07-23 11:14:29 +0200[diff] [blame]363 imply SPL_DM_GPIO
364 imply SPL_DM_MMC
365 imply SPL_GPIO
366 imply SPL_LIBDISK_SUPPORT
Simon Glass103c5f12021-08-08 12:20:09 -0600[diff] [blame]367 imply SPL_MMC
Pali Rohár2f27db22023-01-08 13:31:41 +0100[diff] [blame]368 select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Rohár913d7562023-01-09 00:52:09 +0100[diff] [blame]369 select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohár9d0225b2021-07-23 11:14:25 +0200[diff] [blame]370 select SPL_BOOTROM_SUPPORT
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]371
Baruch Siach22c65452019-05-16 13:03:58 +0300[diff] [blame]372config MVEBU_SPL_BOOT_DEVICE_SATA
373 bool "SATA"
Simon Glassf7560372021-08-08 12:20:17 -0600[diff] [blame]374 imply SPL_SATA
Pali Rohár2226ca12021-07-23 11:14:29 +0200[diff] [blame]375 imply SPL_LIBDISK_SUPPORT
Pali Rohár9d0225b2021-07-23 11:14:25 +0200[diff] [blame]376 select SPL_BOOTROM_SUPPORT
Baruch Siach22c65452019-05-16 13:03:58 +0300[diff] [blame]377
Pali Rohár50afad52023-01-10 23:09:15 +0100[diff] [blame]378config MVEBU_SPL_BOOT_DEVICE_PEX
379 bool "PCI Express"
380 select SPL_BOOTROM_SUPPORT
381
Baruch Siach72c4e672018-06-18 21:56:26 +0300[diff] [blame]382config MVEBU_SPL_BOOT_DEVICE_UART
383 bool "UART"
Pali Rohár9d0225b2021-07-23 11:14:25 +0200[diff] [blame]384 select SPL_BOOTROM_SUPPORT
Baruch Siach72c4e672018-06-18 21:56:26 +0300[diff] [blame]385
Marek Behúnb6ee8602017-06-09 19:28:45 +0200[diff] [blame]386endchoice
387
Pali Rohár67bd6152023-01-10 22:55:21 +0100[diff] [blame]388config MVEBU_SPL_NAND_BADBLK_LOCATION
389 hex "NAND Bad block indicator location"
390 depends on MVEBU_SPL_BOOT_DEVICE_NAND
391 range 0x0 0x1
392 help
393 Value 0x0 = SLC flash = BBI at page 0 or page 1
394 Value 0x1 = MLC flash = BBI at last page in the block
395
Pali Rohárc62af152023-03-29 21:25:58 +0200[diff] [blame]396config MVEBU_SPL_SATA_BLKSZ
397 int "SATA block size"
398 depends on MVEBU_SPL_BOOT_DEVICE_SATA
399 range 512 32768
400 default 512
401 help
402 Block size of the SATA disk in bytes.
403 Typically 512 bytes for majority of disks
404 and 4096 bytes for 4K Native disks.
405
Mario Sixa1b6b0a2017-01-11 16:01:00 +0100[diff] [blame]406config MVEBU_EFUSE
407 bool "Enable eFuse support"
Mario Sixa1b6b0a2017-01-11 16:01:00 +0100[diff] [blame]408 depends on HAVE_MVEBU_EFUSE
409 help
410 Enable support for reading and writing eFuses on mvebu SoCs.
411
412config MVEBU_EFUSE_FAKE
413 bool "Fake eFuse access (dry run)"
Mario Sixa1b6b0a2017-01-11 16:01:00 +0100[diff] [blame]414 depends on MVEBU_EFUSE
415 help
416 This enables a "dry run" mode where eFuses are not really programmed.
417 Instead the eFuse accesses are emulated by writing to and reading
418 from a memory block.
419 This is can be used for testing prog scripts.
420
Pali Rohár8092d1d2022-09-22 13:43:45 +0200[diff] [blame]421config MVEBU_EFUSE_VHV_GPIO
422 string "VHV_Enable GPIO name for eFuse programming"
423 depends on MVEBU_EFUSE && !ARMADA_3700
424 help
425 The eFuse programing (burning) phase requires supplying 1.8V to the
426 device on the VHV power pin, while for normal operation the VHV power
427 rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
428 document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
429 .
430 This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
431
432config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
433 bool "VHV_Enable GPIO is Active Low"
434 depends on MVEBU_EFUSE_VHV_GPIO != ""
435
Mario Sixa1b6b0a2017-01-11 16:01:00 +0100[diff] [blame]436config SECURED_MODE_IMAGE
437 bool "Build image for trusted boot"
438 default false
439 depends on 88F6820
440 help
441 Build an image that employs the ARMADA SoC's trusted boot framework
442 for securely booting images.
443
444config SECURED_MODE_CSK_INDEX
445 int "Index of active CSK"
446 default 0
447 depends on SECURED_MODE_IMAGE
448
Tony Dinh21f62272023-03-02 19:27:29 -0800[diff] [blame]449config SF_DEFAULT_SPEED
450 int "Default speed for SPI flash in Hz"
451 default 10000000
452 depends on MVEBU_SPL_BOOT_DEVICE_SPI
453
454config SF_DEFAULT_MODE
455 hex "Default mode for SPI flash"
456 default 0x0
457 depends on MVEBU_SPL_BOOT_DEVICE_SPI
458
Joel Johnson9f205d62020-03-23 14:21:32 -0600[diff] [blame]459source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore5a3db5d2020-12-08 21:07:36 -0600[diff] [blame]460source "board/kobol/helios4/Kconfig"
Joel Johnson9f205d62020-03-23 14:21:32 -0600[diff] [blame]461
Stefan Roesec3d89142015-08-25 13:18:38 +0200[diff] [blame]462endif