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Sébastien Szymanski2f90c622018-09-06 09:51:53 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source extras for U-Boot for the OPOS6ULDev board
4 *
5 * Copyright (C) 2018 Armadeus Systems <support@armadeus.com>
6 */
7
8#include "imx6ul-opos6ul-u-boot.dtsi"
9
10&aips1 {
Simon Glass8c103c32023-02-13 08:56:33 -070011 bootph-pre-ram;
Sébastien Szymanski2f90c622018-09-06 09:51:53 +020012
13 spba-bus@02000000 {
Simon Glass8c103c32023-02-13 08:56:33 -070014 bootph-pre-ram;
Sébastien Szymanski2f90c622018-09-06 09:51:53 +020015 };
16};
17
Sébastien Szymanskib1be79b2019-10-21 15:33:03 +020018&lcdif {
Sébastien Szymanski64ca8db2024-02-27 16:40:01 +010019 display = <&display0>;
Simon Glass8c103c32023-02-13 08:56:33 -070020 bootph-some-ram;
Sébastien Szymanski64ca8db2024-02-27 16:40:01 +010021
22 display0: display0 {
23 bits-per-pixel = <18>;
24 bus-width = <18>;
25
26 display-timings {
27 timing0 {
28 clock-frequency = <33300000>;
29 hactive = <800>;
30 vactive = <480>;
31 hback-porch = <36>;
32 hfront-porch = <210>;
33 vback-porch = <13>;
34 vfront-porch = <22>;
35 hsync-len = <10>;
36 vsync-len = <10>;
37 de-active = <1>;
38 pixelclk-active = <0>;
39 };
40 };
41 };
Sébastien Szymanskib1be79b2019-10-21 15:33:03 +020042};
43
Sébastien Szymanski2f90c622018-09-06 09:51:53 +020044&pinctrl_uart1 {
Simon Glass8c103c32023-02-13 08:56:33 -070045 bootph-pre-ram;
Sébastien Szymanski2f90c622018-09-06 09:51:53 +020046};
47
48&uart1 {
Simon Glass8c103c32023-02-13 08:56:33 -070049 bootph-pre-ram;
Sébastien Szymanski2f90c622018-09-06 09:51:53 +020050};