Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com |
| 3 | * |
| 4 | * Author: Felipe Balbi <balbi@ti.com> |
| 5 | * |
| 6 | * Based on board/ti/dra7xx/evm.c |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <palmas.h> |
| 13 | #include <sata.h> |
| 14 | #include <usb.h> |
| 15 | #include <asm/omap_common.h> |
| 16 | #include <asm/emif.h> |
Lokesh Vutla | 334bbb3 | 2015-06-16 20:36:05 +0530 | [diff] [blame] | 17 | #include <asm/gpio.h> |
| 18 | #include <asm/arch/gpio.h> |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 19 | #include <asm/arch/clock.h> |
Lokesh Vutla | f91e0c4 | 2015-06-04 16:42:41 +0530 | [diff] [blame] | 20 | #include <asm/arch/dra7xx_iodelay.h> |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 21 | #include <asm/arch/sys_proto.h> |
| 22 | #include <asm/arch/mmc_host_def.h> |
| 23 | #include <asm/arch/sata.h> |
| 24 | #include <asm/arch/gpio.h> |
Kishon Vijay Abraham I | 7c379aa | 2015-08-19 14:13:19 +0530 | [diff] [blame] | 25 | #include <asm/arch/omap.h> |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 26 | #include <environment.h> |
Kishon Vijay Abraham I | 7c379aa | 2015-08-19 14:13:19 +0530 | [diff] [blame] | 27 | #include <usb.h> |
| 28 | #include <linux/usb/gadget.h> |
| 29 | #include <dwc3-uboot.h> |
| 30 | #include <dwc3-omap-uboot.h> |
| 31 | #include <ti-usb-phy-uboot.h> |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 32 | |
Kipisz, Steven | 212f96f | 2016-02-24 12:30:58 -0600 | [diff] [blame^] | 33 | #include "../common/board_detect.h" |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 34 | #include "mux_data.h" |
| 35 | |
Kipisz, Steven | 212f96f | 2016-02-24 12:30:58 -0600 | [diff] [blame^] | 36 | #define board_is_x15() board_ti_is("BBRDX15_") |
| 37 | #define board_is_am572x_evm() board_ti_is("AM572PM_") |
| 38 | |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 39 | #ifdef CONFIG_DRIVER_TI_CPSW |
| 40 | #include <cpsw.h> |
| 41 | #endif |
| 42 | |
| 43 | DECLARE_GLOBAL_DATA_PTR; |
| 44 | |
Lokesh Vutla | 334bbb3 | 2015-06-16 20:36:05 +0530 | [diff] [blame] | 45 | /* GPIO 7_11 */ |
| 46 | #define GPIO_DDR_VTT_EN 203 |
| 47 | |
Kipisz, Steven | 212f96f | 2016-02-24 12:30:58 -0600 | [diff] [blame^] | 48 | #define SYSINFO_BOARD_NAME_MAX_LEN 45 |
| 49 | |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 50 | const struct omap_sysinfo sysinfo = { |
Kipisz, Steven | 212f96f | 2016-02-24 12:30:58 -0600 | [diff] [blame^] | 51 | "Board: UNKNOWN(BeagleBoard X15?) REV UNKNOWN\n" |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 52 | }; |
| 53 | |
| 54 | static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = { |
| 55 | .dmm_lisa_map_3 = 0x80740300, |
| 56 | .is_ma_present = 0x1 |
| 57 | }; |
| 58 | |
| 59 | void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs) |
| 60 | { |
| 61 | *dmm_lisa_regs = &beagle_x15_lisa_regs; |
| 62 | } |
| 63 | |
| 64 | static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { |
| 65 | .sdram_config_init = 0x61851b32, |
| 66 | .sdram_config = 0x61851b32, |
| 67 | .sdram_config2 = 0x00000000, |
Lokesh Vutla | 802bb57 | 2015-02-16 10:15:56 +0530 | [diff] [blame] | 68 | .ref_ctrl = 0x000040F1, |
| 69 | .ref_ctrl_final = 0x00001035, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 70 | .sdram_tim1 = 0xceef266b, |
| 71 | .sdram_tim2 = 0x328f7fda, |
| 72 | .sdram_tim3 = 0x027f88a8, |
Lokesh Vutla | ee4dc25 | 2015-06-03 16:57:47 +0530 | [diff] [blame] | 73 | .read_idle_ctrl = 0x00050000, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 74 | .zq_config = 0x0007190b, |
| 75 | .temp_alert_config = 0x00000000, |
Lokesh Vutla | 496edff | 2015-06-03 14:43:22 +0530 | [diff] [blame] | 76 | .emif_ddr_phy_ctlr_1_init = 0x0024400b, |
| 77 | .emif_ddr_phy_ctlr_1 = 0x0e24400b, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 78 | .emif_ddr_ext_phy_ctrl_1 = 0x10040100, |
| 79 | .emif_ddr_ext_phy_ctrl_2 = 0x00740074, |
| 80 | .emif_ddr_ext_phy_ctrl_3 = 0x00780078, |
| 81 | .emif_ddr_ext_phy_ctrl_4 = 0x007c007c, |
| 82 | .emif_ddr_ext_phy_ctrl_5 = 0x007b007b, |
| 83 | .emif_rd_wr_lvl_rmp_win = 0x00000000, |
Lokesh Vutla | 496edff | 2015-06-03 14:43:22 +0530 | [diff] [blame] | 84 | .emif_rd_wr_lvl_rmp_ctl = 0x80000000, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 85 | .emif_rd_wr_lvl_ctl = 0x00000000, |
| 86 | .emif_rd_wr_exec_thresh = 0x00000305 |
| 87 | }; |
| 88 | |
Lokesh Vutla | 6213db7 | 2015-06-03 14:43:21 +0530 | [diff] [blame] | 89 | /* Ext phy ctrl regs 1-35 */ |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 90 | static const u32 beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs[] = { |
Lokesh Vutla | 6213db7 | 2015-06-03 14:43:21 +0530 | [diff] [blame] | 91 | 0x10040100, |
| 92 | 0x00740074, |
| 93 | 0x00780078, |
| 94 | 0x007c007c, |
| 95 | 0x007b007b, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 96 | 0x00800080, |
| 97 | 0x00360036, |
| 98 | 0x00340034, |
| 99 | 0x00360036, |
| 100 | 0x00350035, |
| 101 | 0x00350035, |
| 102 | |
| 103 | 0x01ff01ff, |
| 104 | 0x01ff01ff, |
| 105 | 0x01ff01ff, |
| 106 | 0x01ff01ff, |
| 107 | 0x01ff01ff, |
| 108 | |
| 109 | 0x00430043, |
| 110 | 0x003e003e, |
| 111 | 0x004a004a, |
| 112 | 0x00470047, |
| 113 | 0x00400040, |
| 114 | |
| 115 | 0x00000000, |
| 116 | 0x00600020, |
Lokesh Vutla | 6213db7 | 2015-06-03 14:43:21 +0530 | [diff] [blame] | 117 | 0x40011080, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 118 | 0x08102040, |
| 119 | |
| 120 | 0x00400040, |
| 121 | 0x00400040, |
| 122 | 0x00400040, |
| 123 | 0x00400040, |
Lokesh Vutla | 496edff | 2015-06-03 14:43:22 +0530 | [diff] [blame] | 124 | 0x00400040, |
| 125 | 0x0, |
| 126 | 0x0, |
| 127 | 0x0, |
| 128 | 0x0, |
| 129 | 0x0 |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 130 | }; |
| 131 | |
| 132 | static const struct emif_regs beagle_x15_emif2_ddr3_532mhz_emif_regs = { |
| 133 | .sdram_config_init = 0x61851b32, |
| 134 | .sdram_config = 0x61851b32, |
| 135 | .sdram_config2 = 0x00000000, |
Lokesh Vutla | 802bb57 | 2015-02-16 10:15:56 +0530 | [diff] [blame] | 136 | .ref_ctrl = 0x000040F1, |
| 137 | .ref_ctrl_final = 0x00001035, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 138 | .sdram_tim1 = 0xceef266b, |
| 139 | .sdram_tim2 = 0x328f7fda, |
| 140 | .sdram_tim3 = 0x027f88a8, |
Lokesh Vutla | ee4dc25 | 2015-06-03 16:57:47 +0530 | [diff] [blame] | 141 | .read_idle_ctrl = 0x00050000, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 142 | .zq_config = 0x0007190b, |
| 143 | .temp_alert_config = 0x00000000, |
Lokesh Vutla | 496edff | 2015-06-03 14:43:22 +0530 | [diff] [blame] | 144 | .emif_ddr_phy_ctlr_1_init = 0x0024400b, |
| 145 | .emif_ddr_phy_ctlr_1 = 0x0e24400b, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 146 | .emif_ddr_ext_phy_ctrl_1 = 0x10040100, |
| 147 | .emif_ddr_ext_phy_ctrl_2 = 0x00820082, |
| 148 | .emif_ddr_ext_phy_ctrl_3 = 0x008b008b, |
| 149 | .emif_ddr_ext_phy_ctrl_4 = 0x00800080, |
| 150 | .emif_ddr_ext_phy_ctrl_5 = 0x007e007e, |
| 151 | .emif_rd_wr_lvl_rmp_win = 0x00000000, |
Lokesh Vutla | 496edff | 2015-06-03 14:43:22 +0530 | [diff] [blame] | 152 | .emif_rd_wr_lvl_rmp_ctl = 0x80000000, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 153 | .emif_rd_wr_lvl_ctl = 0x00000000, |
| 154 | .emif_rd_wr_exec_thresh = 0x00000305 |
| 155 | }; |
| 156 | |
| 157 | static const u32 beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs[] = { |
Lokesh Vutla | 6213db7 | 2015-06-03 14:43:21 +0530 | [diff] [blame] | 158 | 0x10040100, |
| 159 | 0x00820082, |
| 160 | 0x008b008b, |
| 161 | 0x00800080, |
| 162 | 0x007e007e, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 163 | 0x00800080, |
| 164 | 0x00370037, |
| 165 | 0x00390039, |
| 166 | 0x00360036, |
| 167 | 0x00370037, |
| 168 | 0x00350035, |
| 169 | 0x01ff01ff, |
| 170 | 0x01ff01ff, |
| 171 | 0x01ff01ff, |
| 172 | 0x01ff01ff, |
| 173 | 0x01ff01ff, |
| 174 | 0x00540054, |
| 175 | 0x00540054, |
| 176 | 0x004e004e, |
| 177 | 0x004c004c, |
| 178 | 0x00400040, |
| 179 | |
| 180 | 0x00000000, |
| 181 | 0x00600020, |
Lokesh Vutla | 6213db7 | 2015-06-03 14:43:21 +0530 | [diff] [blame] | 182 | 0x40011080, |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 183 | 0x08102040, |
| 184 | |
| 185 | 0x00400040, |
| 186 | 0x00400040, |
| 187 | 0x00400040, |
| 188 | 0x00400040, |
Lokesh Vutla | 496edff | 2015-06-03 14:43:22 +0530 | [diff] [blame] | 189 | 0x00400040, |
| 190 | 0x0, |
| 191 | 0x0, |
| 192 | 0x0, |
| 193 | 0x0, |
| 194 | 0x0 |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 195 | }; |
| 196 | |
| 197 | void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs) |
| 198 | { |
| 199 | switch (emif_nr) { |
| 200 | case 1: |
| 201 | *regs = &beagle_x15_emif1_ddr3_532mhz_emif_regs; |
| 202 | break; |
| 203 | case 2: |
| 204 | *regs = &beagle_x15_emif2_ddr3_532mhz_emif_regs; |
| 205 | break; |
| 206 | } |
| 207 | } |
| 208 | |
| 209 | void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, const u32 **regs, u32 *size) |
| 210 | { |
| 211 | switch (emif_nr) { |
| 212 | case 1: |
| 213 | *regs = beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs; |
| 214 | *size = ARRAY_SIZE(beagle_x15_emif1_ddr3_ext_phy_ctrl_const_regs); |
| 215 | break; |
| 216 | case 2: |
| 217 | *regs = beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs; |
| 218 | *size = ARRAY_SIZE(beagle_x15_emif2_ddr3_ext_phy_ctrl_const_regs); |
| 219 | break; |
| 220 | } |
| 221 | } |
| 222 | |
| 223 | struct vcores_data beagle_x15_volts = { |
| 224 | .mpu.value = VDD_MPU_DRA752, |
| 225 | .mpu.efuse.reg = STD_FUSE_OPP_VMIN_MPU_NOM, |
| 226 | .mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, |
| 227 | .mpu.addr = TPS659038_REG_ADDR_SMPS12, |
| 228 | .mpu.pmic = &tps659038, |
| 229 | |
| 230 | .eve.value = VDD_EVE_DRA752, |
| 231 | .eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM, |
| 232 | .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, |
| 233 | .eve.addr = TPS659038_REG_ADDR_SMPS45, |
| 234 | .eve.pmic = &tps659038, |
| 235 | |
| 236 | .gpu.value = VDD_GPU_DRA752, |
| 237 | .gpu.efuse.reg = STD_FUSE_OPP_VMIN_GPU_NOM, |
| 238 | .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, |
| 239 | .gpu.addr = TPS659038_REG_ADDR_SMPS45, |
| 240 | .gpu.pmic = &tps659038, |
| 241 | |
| 242 | .core.value = VDD_CORE_DRA752, |
| 243 | .core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM, |
| 244 | .core.efuse.reg_bits = DRA752_EFUSE_REGBITS, |
| 245 | .core.addr = TPS659038_REG_ADDR_SMPS6, |
| 246 | .core.pmic = &tps659038, |
| 247 | |
| 248 | .iva.value = VDD_IVA_DRA752, |
| 249 | .iva.efuse.reg = STD_FUSE_OPP_VMIN_IVA_NOM, |
| 250 | .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, |
| 251 | .iva.addr = TPS659038_REG_ADDR_SMPS45, |
| 252 | .iva.pmic = &tps659038, |
| 253 | }; |
| 254 | |
Kipisz, Steven | 212f96f | 2016-02-24 12:30:58 -0600 | [diff] [blame^] | 255 | #ifdef CONFIG_SPL_BUILD |
| 256 | /* No env to setup for SPL */ |
| 257 | static inline void setup_board_eeprom_env(void) { } |
| 258 | |
| 259 | /* Override function to read eeprom information */ |
| 260 | void do_board_detect(void) |
| 261 | { |
| 262 | int rc; |
| 263 | |
| 264 | rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, |
| 265 | CONFIG_EEPROM_CHIP_ADDRESS); |
| 266 | if (rc) |
| 267 | printf("ti_i2c_eeprom_init failed %d\n", rc); |
| 268 | } |
| 269 | |
| 270 | #else /* CONFIG_SPL_BUILD */ |
| 271 | |
| 272 | /* Override function to read eeprom information: actual i2c read done by SPL*/ |
| 273 | void do_board_detect(void) |
| 274 | { |
| 275 | char *bname = NULL; |
| 276 | int rc; |
| 277 | |
| 278 | rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, |
| 279 | CONFIG_EEPROM_CHIP_ADDRESS); |
| 280 | if (rc) |
| 281 | printf("ti_i2c_eeprom_init failed %d\n", rc); |
| 282 | |
| 283 | if (board_is_x15()) |
| 284 | bname = "BeagleBoard X15"; |
| 285 | else if (board_is_am572x_evm()) |
| 286 | bname = "AM572x EVM"; |
| 287 | |
| 288 | if (bname) |
| 289 | snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN, |
| 290 | "Board: %s REV %s\n", bname, board_ti_get_rev()); |
| 291 | } |
| 292 | |
| 293 | static void setup_board_eeprom_env(void) |
| 294 | { |
| 295 | char *name = "beagle_x15"; |
| 296 | int rc; |
| 297 | |
| 298 | rc = ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, |
| 299 | CONFIG_EEPROM_CHIP_ADDRESS); |
| 300 | if (rc) |
| 301 | goto invalid_eeprom; |
| 302 | |
| 303 | if (board_is_am572x_evm()) |
| 304 | name = "am57xx_evm"; |
| 305 | else |
| 306 | printf("Unidentified board claims %s in eeprom header\n", |
| 307 | board_ti_get_name()); |
| 308 | |
| 309 | invalid_eeprom: |
| 310 | set_board_info_env(name); |
| 311 | } |
| 312 | |
| 313 | #endif /* CONFIG_SPL_BUILD */ |
| 314 | |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 315 | void hw_data_init(void) |
| 316 | { |
| 317 | *prcm = &dra7xx_prcm; |
| 318 | *dplls_data = &dra7xx_dplls; |
| 319 | *omap_vcores = &beagle_x15_volts; |
| 320 | *ctrl = &dra7xx_ctrl; |
| 321 | } |
| 322 | |
| 323 | int board_init(void) |
| 324 | { |
| 325 | gpmc_init(); |
| 326 | gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100); |
| 327 | |
| 328 | return 0; |
| 329 | } |
| 330 | |
| 331 | int board_late_init(void) |
| 332 | { |
| 333 | init_sata(0); |
Kipisz, Steven | 212f96f | 2016-02-24 12:30:58 -0600 | [diff] [blame^] | 334 | setup_board_eeprom_env(); |
| 335 | |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 336 | /* |
| 337 | * DEV_CTRL.DEV_ON = 1 please - else palmas switches off in 8 seconds |
| 338 | * This is the POWERHOLD-in-Low behavior. |
| 339 | */ |
| 340 | palmas_i2c_write_u8(TPS65903X_CHIP_P1, 0xA0, 0x1); |
| 341 | return 0; |
| 342 | } |
| 343 | |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 344 | void set_muxconf_regs_essential(void) |
| 345 | { |
| 346 | do_set_mux32((*ctrl)->control_padconf_core_base, |
Lokesh Vutla | f91e0c4 | 2015-06-04 16:42:41 +0530 | [diff] [blame] | 347 | early_padconf, ARRAY_SIZE(early_padconf)); |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 348 | } |
| 349 | |
Lokesh Vutla | f91e0c4 | 2015-06-04 16:42:41 +0530 | [diff] [blame] | 350 | #ifdef CONFIG_IODELAY_RECALIBRATION |
| 351 | void recalibrate_iodelay(void) |
| 352 | { |
| 353 | __recalibrate_iodelay(core_padconf_array_essential, |
| 354 | ARRAY_SIZE(core_padconf_array_essential), |
| 355 | iodelay_cfg_array, ARRAY_SIZE(iodelay_cfg_array)); |
| 356 | } |
| 357 | #endif |
| 358 | |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 359 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC) |
| 360 | int board_mmc_init(bd_t *bis) |
| 361 | { |
| 362 | omap_mmc_init(0, 0, 0, -1, -1); |
| 363 | omap_mmc_init(1, 0, 0, -1, -1); |
| 364 | return 0; |
| 365 | } |
| 366 | #endif |
| 367 | |
| 368 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT) |
| 369 | int spl_start_uboot(void) |
| 370 | { |
| 371 | /* break into full u-boot on 'c' */ |
| 372 | if (serial_tstc() && serial_getc() == 'c') |
| 373 | return 1; |
| 374 | |
| 375 | #ifdef CONFIG_SPL_ENV_SUPPORT |
| 376 | env_init(); |
| 377 | env_relocate_spec(); |
| 378 | if (getenv_yesno("boot_os") != 1) |
| 379 | return 1; |
| 380 | #endif |
| 381 | |
| 382 | return 0; |
| 383 | } |
| 384 | #endif |
| 385 | |
Kishon Vijay Abraham I | 7c379aa | 2015-08-19 14:13:19 +0530 | [diff] [blame] | 386 | #ifdef CONFIG_USB_DWC3 |
| 387 | static struct dwc3_device usb_otg_ss1 = { |
| 388 | .maximum_speed = USB_SPEED_SUPER, |
| 389 | .base = DRA7_USB_OTG_SS1_BASE, |
| 390 | .tx_fifo_resize = false, |
| 391 | .index = 0, |
| 392 | }; |
| 393 | |
| 394 | static struct dwc3_omap_device usb_otg_ss1_glue = { |
| 395 | .base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE, |
| 396 | .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, |
| 397 | .index = 0, |
| 398 | }; |
| 399 | |
| 400 | static struct ti_usb_phy_device usb_phy1_device = { |
| 401 | .pll_ctrl_base = (void *)DRA7_USB3_PHY1_PLL_CTRL, |
| 402 | .usb2_phy_power = (void *)DRA7_USB2_PHY1_POWER, |
| 403 | .usb3_phy_power = (void *)DRA7_USB3_PHY1_POWER, |
| 404 | .index = 0, |
| 405 | }; |
| 406 | |
| 407 | static struct dwc3_device usb_otg_ss2 = { |
| 408 | .maximum_speed = USB_SPEED_HIGH, |
| 409 | .base = DRA7_USB_OTG_SS2_BASE, |
| 410 | .tx_fifo_resize = false, |
| 411 | .index = 1, |
| 412 | }; |
| 413 | |
| 414 | static struct dwc3_omap_device usb_otg_ss2_glue = { |
| 415 | .base = (void *)DRA7_USB_OTG_SS2_GLUE_BASE, |
| 416 | .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, |
| 417 | .index = 1, |
| 418 | }; |
| 419 | |
| 420 | static struct ti_usb_phy_device usb_phy2_device = { |
| 421 | .usb2_phy_power = (void *)DRA7_USB2_PHY2_POWER, |
| 422 | .index = 1, |
| 423 | }; |
| 424 | |
| 425 | int board_usb_init(int index, enum usb_init_type init) |
| 426 | { |
Kishon Vijay Abraham I | 6f1af1e | 2015-08-19 16:16:27 +0530 | [diff] [blame] | 427 | enable_usb_clocks(index); |
Kishon Vijay Abraham I | 7c379aa | 2015-08-19 14:13:19 +0530 | [diff] [blame] | 428 | switch (index) { |
| 429 | case 0: |
| 430 | if (init == USB_INIT_DEVICE) { |
| 431 | printf("port %d can't be used as device\n", index); |
Kishon Vijay Abraham I | 6f1af1e | 2015-08-19 16:16:27 +0530 | [diff] [blame] | 432 | disable_usb_clocks(index); |
Kishon Vijay Abraham I | 7c379aa | 2015-08-19 14:13:19 +0530 | [diff] [blame] | 433 | return -EINVAL; |
| 434 | } else { |
| 435 | usb_otg_ss1.dr_mode = USB_DR_MODE_HOST; |
| 436 | usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; |
| 437 | setbits_le32((*prcm)->cm_l3init_usb_otg_ss1_clkctrl, |
| 438 | OTG_SS_CLKCTRL_MODULEMODE_HW | |
| 439 | OPTFCLKEN_REFCLK960M); |
| 440 | } |
| 441 | |
| 442 | ti_usb_phy_uboot_init(&usb_phy1_device); |
| 443 | dwc3_omap_uboot_init(&usb_otg_ss1_glue); |
| 444 | dwc3_uboot_init(&usb_otg_ss1); |
| 445 | break; |
| 446 | case 1: |
| 447 | if (init == USB_INIT_DEVICE) { |
| 448 | usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL; |
| 449 | usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; |
| 450 | } else { |
| 451 | printf("port %d can't be used as host\n", index); |
Kishon Vijay Abraham I | 6f1af1e | 2015-08-19 16:16:27 +0530 | [diff] [blame] | 452 | disable_usb_clocks(index); |
Kishon Vijay Abraham I | 7c379aa | 2015-08-19 14:13:19 +0530 | [diff] [blame] | 453 | return -EINVAL; |
| 454 | } |
| 455 | |
| 456 | ti_usb_phy_uboot_init(&usb_phy2_device); |
| 457 | dwc3_omap_uboot_init(&usb_otg_ss2_glue); |
| 458 | dwc3_uboot_init(&usb_otg_ss2); |
| 459 | break; |
| 460 | default: |
| 461 | printf("Invalid Controller Index\n"); |
| 462 | } |
| 463 | |
| 464 | return 0; |
| 465 | } |
| 466 | |
| 467 | int board_usb_cleanup(int index, enum usb_init_type init) |
| 468 | { |
| 469 | switch (index) { |
| 470 | case 0: |
| 471 | case 1: |
| 472 | ti_usb_phy_uboot_exit(index); |
| 473 | dwc3_uboot_exit(index); |
| 474 | dwc3_omap_uboot_exit(index); |
| 475 | break; |
| 476 | default: |
| 477 | printf("Invalid Controller Index\n"); |
| 478 | } |
Kishon Vijay Abraham I | 6f1af1e | 2015-08-19 16:16:27 +0530 | [diff] [blame] | 479 | disable_usb_clocks(index); |
Kishon Vijay Abraham I | 7c379aa | 2015-08-19 14:13:19 +0530 | [diff] [blame] | 480 | return 0; |
| 481 | } |
| 482 | |
| 483 | int usb_gadget_handle_interrupts(int index) |
| 484 | { |
| 485 | u32 status; |
| 486 | |
| 487 | status = dwc3_omap_uboot_interrupt_status(index); |
| 488 | if (status) |
| 489 | dwc3_uboot_handle_interrupt(index); |
| 490 | |
| 491 | return 0; |
| 492 | } |
| 493 | #endif |
| 494 | |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 495 | #ifdef CONFIG_DRIVER_TI_CPSW |
| 496 | |
| 497 | /* Delay value to add to calibrated value */ |
| 498 | #define RGMII0_TXCTL_DLY_VAL ((0x3 << 5) + 0x8) |
| 499 | #define RGMII0_TXD0_DLY_VAL ((0x3 << 5) + 0x8) |
| 500 | #define RGMII0_TXD1_DLY_VAL ((0x3 << 5) + 0x2) |
| 501 | #define RGMII0_TXD2_DLY_VAL ((0x4 << 5) + 0x0) |
| 502 | #define RGMII0_TXD3_DLY_VAL ((0x4 << 5) + 0x0) |
| 503 | #define VIN2A_D13_DLY_VAL ((0x3 << 5) + 0x8) |
| 504 | #define VIN2A_D17_DLY_VAL ((0x3 << 5) + 0x8) |
| 505 | #define VIN2A_D16_DLY_VAL ((0x3 << 5) + 0x2) |
| 506 | #define VIN2A_D15_DLY_VAL ((0x4 << 5) + 0x0) |
| 507 | #define VIN2A_D14_DLY_VAL ((0x4 << 5) + 0x0) |
| 508 | |
| 509 | static void cpsw_control(int enabled) |
| 510 | { |
| 511 | /* VTP can be added here */ |
| 512 | } |
| 513 | |
| 514 | static struct cpsw_slave_data cpsw_slaves[] = { |
| 515 | { |
| 516 | .slave_reg_ofs = 0x208, |
| 517 | .sliver_reg_ofs = 0xd80, |
| 518 | .phy_addr = 1, |
| 519 | }, |
| 520 | { |
| 521 | .slave_reg_ofs = 0x308, |
| 522 | .sliver_reg_ofs = 0xdc0, |
| 523 | .phy_addr = 2, |
| 524 | }, |
| 525 | }; |
| 526 | |
| 527 | static struct cpsw_platform_data cpsw_data = { |
| 528 | .mdio_base = CPSW_MDIO_BASE, |
| 529 | .cpsw_base = CPSW_BASE, |
| 530 | .mdio_div = 0xff, |
| 531 | .channels = 8, |
| 532 | .cpdma_reg_ofs = 0x800, |
| 533 | .slaves = 1, |
| 534 | .slave_data = cpsw_slaves, |
| 535 | .ale_reg_ofs = 0xd00, |
| 536 | .ale_entries = 1024, |
| 537 | .host_port_reg_ofs = 0x108, |
| 538 | .hw_stats_reg_ofs = 0x900, |
| 539 | .bd_ram_ofs = 0x2000, |
| 540 | .mac_control = (1 << 5), |
| 541 | .control = cpsw_control, |
| 542 | .host_port_num = 0, |
| 543 | .version = CPSW_CTRL_VERSION_2, |
| 544 | }; |
| 545 | |
| 546 | int board_eth_init(bd_t *bis) |
| 547 | { |
| 548 | int ret; |
| 549 | uint8_t mac_addr[6]; |
| 550 | uint32_t mac_hi, mac_lo; |
| 551 | uint32_t ctrl_val; |
| 552 | |
| 553 | /* try reading mac address from efuse */ |
| 554 | mac_lo = readl((*ctrl)->control_core_mac_id_0_lo); |
| 555 | mac_hi = readl((*ctrl)->control_core_mac_id_0_hi); |
| 556 | mac_addr[0] = (mac_hi & 0xFF0000) >> 16; |
| 557 | mac_addr[1] = (mac_hi & 0xFF00) >> 8; |
| 558 | mac_addr[2] = mac_hi & 0xFF; |
| 559 | mac_addr[3] = (mac_lo & 0xFF0000) >> 16; |
| 560 | mac_addr[4] = (mac_lo & 0xFF00) >> 8; |
| 561 | mac_addr[5] = mac_lo & 0xFF; |
| 562 | |
| 563 | if (!getenv("ethaddr")) { |
| 564 | printf("<ethaddr> not set. Validating first E-fuse MAC\n"); |
| 565 | |
Joe Hershberger | 0adb5b7 | 2015-04-08 01:41:04 -0500 | [diff] [blame] | 566 | if (is_valid_ethaddr(mac_addr)) |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 567 | eth_setenv_enetaddr("ethaddr", mac_addr); |
| 568 | } |
| 569 | |
| 570 | mac_lo = readl((*ctrl)->control_core_mac_id_1_lo); |
| 571 | mac_hi = readl((*ctrl)->control_core_mac_id_1_hi); |
| 572 | mac_addr[0] = (mac_hi & 0xFF0000) >> 16; |
| 573 | mac_addr[1] = (mac_hi & 0xFF00) >> 8; |
| 574 | mac_addr[2] = mac_hi & 0xFF; |
| 575 | mac_addr[3] = (mac_lo & 0xFF0000) >> 16; |
| 576 | mac_addr[4] = (mac_lo & 0xFF00) >> 8; |
| 577 | mac_addr[5] = mac_lo & 0xFF; |
| 578 | |
| 579 | if (!getenv("eth1addr")) { |
Joe Hershberger | 0adb5b7 | 2015-04-08 01:41:04 -0500 | [diff] [blame] | 580 | if (is_valid_ethaddr(mac_addr)) |
Felipe Balbi | 1e4ad74 | 2014-11-10 14:02:44 -0600 | [diff] [blame] | 581 | eth_setenv_enetaddr("eth1addr", mac_addr); |
| 582 | } |
| 583 | |
| 584 | ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33); |
| 585 | ctrl_val |= 0x22; |
| 586 | writel(ctrl_val, (*ctrl)->control_core_control_io1); |
| 587 | |
| 588 | ret = cpsw_register(&cpsw_data); |
| 589 | if (ret < 0) |
| 590 | printf("Error %d registering CPSW switch\n", ret); |
| 591 | |
| 592 | return ret; |
| 593 | } |
| 594 | #endif |
Lokesh Vutla | 334bbb3 | 2015-06-16 20:36:05 +0530 | [diff] [blame] | 595 | |
| 596 | #ifdef CONFIG_BOARD_EARLY_INIT_F |
| 597 | /* VTT regulator enable */ |
| 598 | static inline void vtt_regulator_enable(void) |
| 599 | { |
| 600 | if (omap_hw_init_context() == OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL) |
| 601 | return; |
| 602 | |
| 603 | gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en"); |
| 604 | gpio_direction_output(GPIO_DDR_VTT_EN, 1); |
| 605 | } |
| 606 | |
| 607 | int board_early_init_f(void) |
| 608 | { |
| 609 | vtt_regulator_enable(); |
| 610 | return 0; |
| 611 | } |
| 612 | #endif |