Alex | af2cbfd | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 1 | source "drivers/net/phy/Kconfig" |
Calvin Johnson | a802d1e | 2018-03-08 15:30:35 +0530 | [diff] [blame] | 2 | source "drivers/net/pfe_eth/Kconfig" |
Alex | af2cbfd | 2017-02-06 19:17:34 -0800 | [diff] [blame] | 3 | |
Joe Hershberger | 05c3e68 | 2015-03-22 17:09:10 -0500 | [diff] [blame] | 4 | config DM_ETH |
| 5 | bool "Enable Driver Model for Ethernet drivers" |
| 6 | depends on DM |
| 7 | help |
| 8 | Enable driver model for Ethernet. |
| 9 | |
Joe Hershberger | c25f406 | 2018-07-02 14:47:48 -0500 | [diff] [blame] | 10 | The eth_*() interface will be implemented by the UCLASS_ETH class |
| 11 | This is currently implemented in net/eth-uclass.c |
Joe Hershberger | 05c3e68 | 2015-03-22 17:09:10 -0500 | [diff] [blame] | 12 | Look in include/net.h for details. |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 13 | |
Alex Kiernan | f02b8d1 | 2018-04-01 09:22:34 +0000 | [diff] [blame] | 14 | config DRIVER_TI_CPSW |
| 15 | bool "TI Common Platform Ethernet Switch" |
| 16 | select PHYLIB |
| 17 | help |
| 18 | This driver supports the TI three port switch gigabit ethernet |
| 19 | subsystem found in the TI SoCs. |
| 20 | |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 21 | menuconfig NETDEVICES |
| 22 | bool "Network device support" |
| 23 | depends on NET |
Joe Hershberger | ef0f2f5 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 24 | default y if DM_ETH |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 25 | help |
| 26 | You must select Y to enable any network device support |
| 27 | Generally if you have any networking support this is a given |
| 28 | |
| 29 | If unsure, say Y |
| 30 | |
| 31 | if NETDEVICES |
| 32 | |
Philipp Tomsich | 449ea2c | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 33 | config PHY_GIGE |
| 34 | bool "Enable GbE PHY status parsing and configuration" |
| 35 | help |
| 36 | Enables support for parsing the status output and for |
| 37 | configuring GbE PHYs (affects the inner workings of some |
| 38 | commands and miiphyutil.c). |
| 39 | |
Marek Vasut | e40095f | 2016-05-24 23:29:09 +0200 | [diff] [blame] | 40 | config AG7XXX |
| 41 | bool "Atheros AG7xxx Ethernet MAC support" |
| 42 | depends on DM_ETH && ARCH_ATH79 |
| 43 | select PHYLIB |
| 44 | help |
| 45 | This driver supports the Atheros AG7xxx Ethernet MAC. This MAC is |
| 46 | present in the Atheros AR7xxx, AR9xxx and QCA9xxx MIPS chips. |
| 47 | |
| 48 | |
Thomas Chou | 96fa1e4 | 2015-10-22 15:29:11 +0800 | [diff] [blame] | 49 | config ALTERA_TSE |
| 50 | bool "Altera Triple-Speed Ethernet MAC support" |
| 51 | depends on DM_ETH |
| 52 | select PHYLIB |
| 53 | help |
| 54 | This driver supports the Altera Triple-Speed (TSE) Ethernet MAC. |
| 55 | Please find details on the "Triple-Speed Ethernet MegaCore Function |
| 56 | Resource Center" of Altera. |
| 57 | |
Suji Velupillai | c89782d | 2017-07-10 14:05:41 -0700 | [diff] [blame] | 58 | config BCM_SF2_ETH |
| 59 | bool "Broadcom SF2 (Starfighter2) Ethernet support" |
| 60 | select PHYLIB |
| 61 | help |
| 62 | This is an abstract framework which provides a generic interface |
| 63 | to MAC and DMA management for multiple Broadcom SoCs such as |
| 64 | Cygnus, NSP and bcm28155_ap platforms. |
| 65 | |
| 66 | config BCM_SF2_ETH_DEFAULT_PORT |
| 67 | int "Broadcom SF2 (Starfighter2) Ethernet default port number" |
| 68 | depends on BCM_SF2_ETH |
| 69 | default 0 |
| 70 | help |
| 71 | Default port number for the Starfighter2 ethernet driver. |
| 72 | |
| 73 | config BCM_SF2_ETH_GMAC |
| 74 | bool "Broadcom SF2 (Starfighter2) GMAC Ethernet support" |
| 75 | depends on BCM_SF2_ETH |
| 76 | help |
| 77 | This flag enables the ethernet support for Broadcom platforms with |
| 78 | GMAC such as Cygnus. This driver is based on the framework provided |
| 79 | by the BCM_SF2_ETH driver. |
| 80 | Say Y to any bcmcygnus based platforms. |
| 81 | |
Stephen Warren | ba4dfef | 2016-10-21 14:46:47 -0600 | [diff] [blame] | 82 | config DWC_ETH_QOS |
| 83 | bool "Synopsys DWC Ethernet QOS device support" |
| 84 | depends on DM_ETH |
| 85 | select PHYLIB |
| 86 | help |
| 87 | This driver supports the Synopsys Designware Ethernet QOS (Quality |
| 88 | Of Service) IP block. The IP supports many options for bus type, |
| 89 | clocking/reset structure, and feature list. This driver currently |
| 90 | supports the specific configuration used in NVIDIA's Tegra186 chip, |
| 91 | but should be extensible to other combinations quite easily. |
| 92 | |
Simon Glass | c294ac5 | 2015-08-19 09:33:41 -0600 | [diff] [blame] | 93 | config E1000 |
| 94 | bool "Intel PRO/1000 Gigabit Ethernet support" |
| 95 | help |
| 96 | This driver supports Intel(R) PRO/1000 gigabit ethernet family of |
| 97 | adapters. For more information on how to identify your adapter, go |
| 98 | to the Adapter & Driver ID Guide at: |
| 99 | |
| 100 | <http://support.intel.com/support/network/adapter/pro100/21397.htm> |
| 101 | |
| 102 | config E1000_SPI_GENERIC |
| 103 | bool "Allow access to the Intel 8257x SPI bus" |
| 104 | depends on E1000 |
| 105 | help |
| 106 | Allow generic access to the SPI bus on the Intel 8257x, for |
| 107 | example with the "sspi" command. |
| 108 | |
| 109 | config E1000_SPI |
| 110 | bool "Enable SPI bus utility code" |
| 111 | depends on E1000 |
| 112 | help |
| 113 | Utility code for direct access to the SPI bus on Intel 8257x. |
| 114 | This does not do anything useful unless you set at least one |
| 115 | of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC. |
| 116 | |
| 117 | config CMD_E1000 |
| 118 | bool "Enable the e1000 command" |
| 119 | depends on E1000 |
| 120 | help |
| 121 | This enables the 'e1000' management command for E1000 devices. When |
| 122 | used on devices with SPI support you can reprogram the EEPROM from |
| 123 | U-Boot. |
| 124 | |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 125 | config ETH_SANDBOX |
| 126 | depends on DM_ETH && SANDBOX |
| 127 | default y |
| 128 | bool "Sandbox: Mocked Ethernet driver" |
| 129 | help |
| 130 | This driver simply responds with fake ARP replies and ping |
| 131 | replies that are used to verify network stack functionality |
| 132 | |
| 133 | This driver is particularly useful in the test/dm/eth.c tests |
| 134 | |
Joe Hershberger | a346ca7 | 2015-03-22 17:09:21 -0500 | [diff] [blame] | 135 | config ETH_SANDBOX_RAW |
| 136 | depends on DM_ETH && SANDBOX |
| 137 | default y |
| 138 | bool "Sandbox: Bridge to Linux Raw Sockets" |
| 139 | help |
| 140 | This driver is a bridge from the bottom of the network stack |
| 141 | in U-Boot to the RAW AF_PACKET API in Linux. This allows real |
| 142 | network traffic to be tested from within sandbox. See |
| 143 | board/sandbox/README.sandbox for more details. |
| 144 | |
Simon Glass | ef48f6d | 2015-04-05 16:07:34 -0600 | [diff] [blame] | 145 | config ETH_DESIGNWARE |
| 146 | bool "Synopsys Designware Ethernet MAC" |
Thomas Chou | 25af71c | 2015-12-07 20:53:29 +0800 | [diff] [blame] | 147 | select PHYLIB |
Simon Glass | ef48f6d | 2015-04-05 16:07:34 -0600 | [diff] [blame] | 148 | help |
| 149 | This MAC is present in SoCs from various vendors. It supports |
| 150 | 100Mbit and 1 Gbit operation. You must enable CONFIG_PHYLIB to |
| 151 | provide the PHY (physical media interface). |
| 152 | |
Marek Vasut | 215a065 | 2018-08-13 19:32:14 +0200 | [diff] [blame^] | 153 | config ETH_DESIGNWARE_SOCFPGA |
| 154 | bool "Altera SoCFPGA extras for Synopsys Designware Ethernet MAC" |
| 155 | depends on DM_ETH && ETH_DESIGNWARE |
| 156 | help |
| 157 | The Altera SoCFPGA requires additional configuration of the |
| 158 | Altera system manager to correctly interface with the PHY. |
| 159 | This code handles those SoC specifics. |
| 160 | |
Max Filippov | f072712 | 2016-08-05 18:26:15 +0300 | [diff] [blame] | 161 | config ETHOC |
| 162 | bool "OpenCores 10/100 Mbps Ethernet MAC" |
| 163 | help |
| 164 | This MAC is present in OpenRISC and Xtensa XTFPGA boards. |
| 165 | |
Peng Fan | fbada48 | 2018-03-28 20:54:14 +0800 | [diff] [blame] | 166 | config FEC_MXC_SHARE_MDIO |
| 167 | bool "Share the MDIO bus for FEC controller" |
| 168 | depends on FEC_MXC |
| 169 | |
| 170 | config FEC_MXC_MDIO_BASE |
| 171 | hex "MDIO base address for the FEC controller" |
| 172 | depends on FEC_MXC_SHARE_MDIO |
| 173 | help |
| 174 | This specifies the MDIO registers base address. It is used when |
| 175 | two FEC controllers share MDIO bus. |
| 176 | |
Jagan Teki | 97d29ca | 2016-10-08 18:00:12 +0530 | [diff] [blame] | 177 | config FEC_MXC |
| 178 | bool "FEC Ethernet controller" |
Peng Fan | fbada48 | 2018-03-28 20:54:14 +0800 | [diff] [blame] | 179 | depends on MX5 || MX6 || MX7 |
Jagan Teki | 97d29ca | 2016-10-08 18:00:12 +0530 | [diff] [blame] | 180 | help |
| 181 | This driver supports the 10/100 Fast Ethernet controller for |
| 182 | NXP i.MX processors. |
| 183 | |
Tom Rini | 8dc1b17 | 2017-05-26 11:18:53 -0400 | [diff] [blame] | 184 | config FTMAC100 |
| 185 | bool "Ftmac100 Ethernet Support" |
| 186 | help |
| 187 | This MAC is present in Andestech SoCs. |
| 188 | |
Chris Packham | ed52ea5 | 2018-05-03 23:00:35 +1200 | [diff] [blame] | 189 | config MVGBE |
| 190 | bool "Marvell Orion5x/Kirkwood network interface support" |
| 191 | depends on KIRKWOOD || ORION5X |
Chris Packham | fb73107 | 2018-07-09 21:34:00 +1200 | [diff] [blame] | 192 | select PHYLIB if DM_ETH |
Chris Packham | ed52ea5 | 2018-05-03 23:00:35 +1200 | [diff] [blame] | 193 | help |
| 194 | This driver supports the network interface units in the |
| 195 | Marvell Orion5x and Kirkwood SoCs |
| 196 | |
Chris Packham | 7654f62 | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 197 | config MVNETA |
Miquel Raynal | e7ab2cc | 2017-12-28 15:43:09 +0100 | [diff] [blame] | 198 | bool "Marvell Armada XP/385/3700 network interface support" |
| 199 | depends on ARMADA_XP || ARMADA_38X || ARMADA_3700 |
Chris Packham | 7654f62 | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 200 | select PHYLIB |
| 201 | help |
| 202 | This driver supports the network interface units in the |
Miquel Raynal | e7ab2cc | 2017-12-28 15:43:09 +0100 | [diff] [blame] | 203 | Marvell ARMADA XP, ARMADA 38X and ARMADA 3700 SoCs |
Chris Packham | 7654f62 | 2017-08-21 20:17:03 +1200 | [diff] [blame] | 204 | |
Stefan Roese | 99d4c6d | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 205 | config MVPP2 |
Stefan Roese | e7935c4 | 2017-02-15 11:42:59 +0100 | [diff] [blame] | 206 | bool "Marvell Armada 375/7K/8K network interface support" |
| 207 | depends on ARMADA_375 || ARMADA_8K |
Stefan Roese | 99d4c6d | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 208 | select PHYLIB |
| 209 | help |
| 210 | This driver supports the network interface units in the |
Stefan Roese | e7935c4 | 2017-02-15 11:42:59 +0100 | [diff] [blame] | 211 | Marvell ARMADA 375, 7K and 8K SoCs. |
Stefan Roese | 99d4c6d | 2016-02-10 07:22:10 +0100 | [diff] [blame] | 212 | |
Wenyou Yang | ebcb40a | 2016-11-02 10:06:55 +0800 | [diff] [blame] | 213 | config MACB |
| 214 | bool "Cadence MACB/GEM Ethernet Interface" |
| 215 | depends on DM_ETH |
| 216 | select PHYLIB |
| 217 | help |
| 218 | The Cadence MACB ethernet interface is found on many Atmel |
| 219 | AT91 and SAMA5 parts. This driver also supports the Cadence |
| 220 | GEM (Gigabit Ethernet MAC) found in some ARM SoC devices. |
| 221 | Say Y to include support for the MACB/GEM chip. |
| 222 | |
Wilson Lee | 4bf5691 | 2017-08-22 20:25:07 -0700 | [diff] [blame] | 223 | config MACB_ZYNQ |
| 224 | bool "Cadence MACB/GEM Ethernet Interface for Xilinx Zynq" |
| 225 | depends on MACB |
| 226 | help |
| 227 | The Cadence MACB ethernet interface was used on Zynq platform. |
| 228 | Say Y to enable support for the MACB/GEM in Zynq chip. |
| 229 | |
Bin Meng | b68fe15 | 2015-08-27 22:25:58 -0700 | [diff] [blame] | 230 | config PCH_GBE |
| 231 | bool "Intel Platform Controller Hub EG20T GMAC driver" |
| 232 | depends on DM_ETH && DM_PCI |
| 233 | select PHYLIB |
| 234 | help |
| 235 | This MAC is present in Intel Platform Controller Hub EG20T. It |
| 236 | supports 10/100/1000 Mbps operation. |
| 237 | |
Mylène Josserand | 751b0be | 2017-04-02 12:59:08 +0200 | [diff] [blame] | 238 | config RGMII |
| 239 | bool "Enable RGMII" |
| 240 | help |
| 241 | Enable the support of the Reduced Gigabit Media-Independent |
| 242 | Interface (RGMII). |
| 243 | |
Bin Meng | 86e9dc8 | 2016-03-21 06:47:41 -0700 | [diff] [blame] | 244 | config RTL8139 |
| 245 | bool "Realtek 8139 series Ethernet controller driver" |
| 246 | help |
| 247 | This driver supports Realtek 8139 series fast ethernet family of |
| 248 | PCI chipsets/adapters. |
| 249 | |
Bin Meng | 0764f24 | 2016-03-21 06:47:42 -0700 | [diff] [blame] | 250 | config RTL8169 |
| 251 | bool "Realtek 8169 series Ethernet controller driver" |
| 252 | help |
| 253 | This driver supports Realtek 8169 series gigabit ethernet family of |
| 254 | PCI/PCIe chipsets/adapters. |
| 255 | |
Adam Ford | 8daec2d | 2017-09-05 15:20:44 -0500 | [diff] [blame] | 256 | config SMC911X |
| 257 | bool "SMSC LAN911x and LAN921x controller driver" |
| 258 | |
| 259 | if SMC911X |
| 260 | |
| 261 | config SMC911X_BASE |
| 262 | hex "SMC911X Base Address" |
| 263 | help |
| 264 | Define this to hold the physical address |
| 265 | of the device (I/O space) |
| 266 | |
| 267 | choice |
| 268 | prompt "SMC911X bus width" |
| 269 | default SMC911X_16_BIT |
| 270 | |
| 271 | config SMC911X_32_BIT |
| 272 | bool "Enable 32-bit interface" |
| 273 | |
| 274 | config SMC911X_16_BIT |
| 275 | bool "Enable 16-bit interface" |
| 276 | help |
| 277 | Define this if data bus is 16 bits. If your processor |
| 278 | automatically converts one 32 bit word to two 16 bit |
| 279 | words you may also try CONFIG_SMC911X_32_BIT. |
| 280 | |
| 281 | endchoice |
| 282 | endif #SMC911X |
| 283 | |
Mylène Josserand | 4d43d06 | 2017-04-02 12:59:03 +0200 | [diff] [blame] | 284 | config SUN7I_GMAC |
| 285 | bool "Enable Allwinner GMAC Ethernet support" |
| 286 | help |
| 287 | Enable the support for Sun7i GMAC Ethernet controller |
| 288 | |
Stefan Mavrodiev | aba3924 | 2017-11-03 08:56:51 +0200 | [diff] [blame] | 289 | config SUN7I_GMAC_FORCE_TXERR |
| 290 | bool "Force PA17 as gmac function" |
| 291 | depends on SUN7I_GMAC |
| 292 | help |
| 293 | Some ethernet phys needs TXERR control. Since the GMAC |
| 294 | doesn't have such signal, setting PA17 as GMAC function |
| 295 | makes the pin output low, which enables data transmission. |
| 296 | |
Mylène Josserand | abc3e4d | 2017-04-02 12:59:07 +0200 | [diff] [blame] | 297 | config SUN4I_EMAC |
| 298 | bool "Allwinner Sun4i Ethernet MAC support" |
| 299 | depends on DM_ETH |
Artturi Alm | 6270a3f | 2017-11-08 05:08:58 +0200 | [diff] [blame] | 300 | select PHYLIB |
Mylène Josserand | abc3e4d | 2017-04-02 12:59:07 +0200 | [diff] [blame] | 301 | help |
| 302 | This driver supports the Allwinner based SUN4I Ethernet MAC. |
| 303 | |
Amit Singh Tomar | a29710c | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 304 | config SUN8I_EMAC |
| 305 | bool "Allwinner Sun8i Ethernet MAC support" |
| 306 | depends on DM_ETH |
| 307 | select PHYLIB |
Philipp Tomsich | 449ea2c | 2017-03-26 18:50:23 +0200 | [diff] [blame] | 308 | select PHY_GIGE |
Amit Singh Tomar | a29710c | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 309 | help |
| 310 | This driver supports the Allwinner based SUN8I/SUN50I Ethernet MAC. |
| 311 | It can be found in H3/A64/A83T based SoCs and compatible with both |
Tom Rini | 7131d2d | 2017-02-20 09:38:03 -0500 | [diff] [blame] | 312 | External and Internal PHYs. |
Amit Singh Tomar | a29710c | 2016-07-06 17:59:44 +0530 | [diff] [blame] | 313 | |
Nobuhiro Iwamatsu | dcd18ea | 2017-12-01 16:08:03 +0900 | [diff] [blame] | 314 | config SH_ETHER |
| 315 | bool "Renesas SH Ethernet MAC" |
| 316 | select PHYLIB |
| 317 | help |
| 318 | This driver supports the Ethernet for Renesas SH and ARM SoCs. |
| 319 | |
Michal Simek | 338a5f2 | 2015-12-09 16:54:42 +0100 | [diff] [blame] | 320 | config XILINX_AXIEMAC |
| 321 | depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) |
| 322 | select PHYLIB |
| 323 | select MII |
| 324 | bool "Xilinx AXI Ethernet" |
| 325 | help |
| 326 | This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. |
| 327 | |
Michal Simek | 3229c86 | 2015-12-11 09:41:49 +0100 | [diff] [blame] | 328 | config XILINX_EMACLITE |
Zubair Lutfullah Kakakhel | 2f1f05f | 2016-07-27 12:25:09 +0100 | [diff] [blame] | 329 | depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) |
Michal Simek | 3229c86 | 2015-12-11 09:41:49 +0100 | [diff] [blame] | 330 | select PHYLIB |
| 331 | select MII |
| 332 | bool "Xilinx Ethernetlite" |
| 333 | help |
| 334 | This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. |
| 335 | |
Michal Simek | 596e578 | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 336 | config ZYNQ_GEM |
| 337 | depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP) |
Michal Simek | 7bccc75 | 2015-12-11 09:14:31 +0100 | [diff] [blame] | 338 | select PHYLIB |
Michal Simek | 596e578 | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 339 | bool "Xilinx Ethernet GEM" |
| 340 | help |
Michal Simek | c942810 | 2015-12-09 16:53:52 +0100 | [diff] [blame] | 341 | This MAC is present in Xilinx Zynq and ZynqMP SoCs. |
Michal Simek | 596e578 | 2015-11-30 14:34:52 +0100 | [diff] [blame] | 342 | |
Purna Chandra Mandal | 23e7578 | 2016-01-28 15:30:21 +0530 | [diff] [blame] | 343 | config PIC32_ETH |
| 344 | bool "Microchip PIC32 Ethernet Support" |
| 345 | depends on DM_ETH && MACH_PIC32 |
| 346 | select PHYLIB |
| 347 | help |
| 348 | This driver implements 10/100 Mbps Ethernet and MAC layer for |
| 349 | Microchip PIC32 microcontrollers. |
| 350 | |
Sjoerd Simons | 0125bcf | 2017-01-11 11:46:11 +0100 | [diff] [blame] | 351 | config GMAC_ROCKCHIP |
| 352 | bool "Rockchip Synopsys Designware Ethernet MAC" |
| 353 | depends on DM_ETH && ETH_DESIGNWARE |
| 354 | help |
| 355 | This driver provides Rockchip SoCs network support based on the |
| 356 | Synopsys Designware driver. |
| 357 | |
Marek Vasut | 8ae51b6 | 2017-05-13 15:54:28 +0200 | [diff] [blame] | 358 | config RENESAS_RAVB |
| 359 | bool "Renesas Ethernet AVB MAC" |
| 360 | depends on DM_ETH && RCAR_GEN3 |
| 361 | select PHYLIB |
| 362 | help |
| 363 | This driver implements support for the Ethernet AVB block in |
| 364 | Renesas M3 and H3 SoCs. |
| 365 | |
Christophe Leroy | fad51ac | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 366 | config MPC8XX_FEC |
| 367 | bool "Fast Ethernet Controller on MPC8XX" |
Christophe Leroy | ee1e600 | 2018-03-16 17:20:41 +0100 | [diff] [blame] | 368 | depends on MPC8xx |
Christophe Leroy | fad51ac | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 369 | select MII |
| 370 | help |
| 371 | This driver implements support for the Fast Ethernet Controller |
| 372 | on MPC8XX |
| 373 | |
Kunihiko Hayashi | a892779 | 2018-05-24 19:24:37 +0900 | [diff] [blame] | 374 | config SNI_AVE |
| 375 | bool "Socionext AVE Ethernet support" |
| 376 | depends on DM_ETH && ARCH_UNIPHIER |
| 377 | select PHYLIB |
| 378 | select SYSCON |
| 379 | select REGMAP |
| 380 | help |
| 381 | This driver implements support for the Socionext AVE Ethernet |
| 382 | controller, as found on the Socionext UniPhier family. |
| 383 | |
Christophe Leroy | fad51ac | 2017-07-06 10:33:23 +0200 | [diff] [blame] | 384 | config ETHER_ON_FEC1 |
| 385 | bool "FEC1" |
| 386 | depends on MPC8XX_FEC |
| 387 | default y |
| 388 | |
| 389 | config FEC1_PHY |
| 390 | int "FEC1 PHY" |
| 391 | depends on ETHER_ON_FEC1 |
| 392 | default -1 |
| 393 | help |
| 394 | Define to the hardcoded PHY address which corresponds |
| 395 | to the given FEC; i. e. |
| 396 | #define CONFIG_FEC1_PHY 4 |
| 397 | means that the PHY with address 4 is connected to FEC1 |
| 398 | |
| 399 | When set to -1, means to probe for first available. |
| 400 | |
| 401 | config PHY_NORXERR |
| 402 | bool "PHY_NORXERR" |
| 403 | depends on ETHER_ON_FEC1 |
| 404 | default n |
| 405 | help |
| 406 | The PHY does not have a RXERR line (RMII only). |
| 407 | (so program the FEC to ignore it). |
| 408 | |
| 409 | config ETHER_ON_FEC2 |
| 410 | bool "FEC2" |
| 411 | depends on MPC8XX_FEC && MPC885 |
| 412 | default y |
| 413 | |
| 414 | config FEC2_PHY |
| 415 | int "FEC2 PHY" |
| 416 | depends on ETHER_ON_FEC2 |
| 417 | default -1 |
| 418 | help |
| 419 | Define to the hardcoded PHY address which corresponds |
| 420 | to the given FEC; i. e. |
| 421 | #define CONFIG_FEC1_PHY 4 |
| 422 | means that the PHY with address 4 is connected to FEC1 |
| 423 | |
| 424 | When set to -1, means to probe for first available. |
| 425 | |
| 426 | config FEC2_PHY_NORXERR |
| 427 | bool "PHY_NORXERR" |
| 428 | depends on ETHER_ON_FEC2 |
| 429 | default n |
| 430 | help |
| 431 | The PHY does not have a RXERR line (RMII only). |
| 432 | (so program the FEC to ignore it). |
| 433 | |
Ahmed Mansour | 541d576 | 2017-12-15 16:01:01 -0500 | [diff] [blame] | 434 | config SYS_DPAA_QBMAN |
| 435 | bool "Device tree fixup for QBMan on freescale SOCs" |
| 436 | depends on (ARM || PPC) && !SPL_BUILD |
| 437 | default y if ARCH_B4860 || \ |
| 438 | ARCH_B4420 || \ |
| 439 | ARCH_P1023 || \ |
| 440 | ARCH_P2041 || \ |
| 441 | ARCH_T1023 || \ |
| 442 | ARCH_T1024 || \ |
| 443 | ARCH_T1040 || \ |
| 444 | ARCH_T1042 || \ |
| 445 | ARCH_T2080 || \ |
| 446 | ARCH_T2081 || \ |
| 447 | ARCH_T4240 || \ |
| 448 | ARCH_T4160 || \ |
| 449 | ARCH_P4080 || \ |
| 450 | ARCH_P3041 || \ |
| 451 | ARCH_P5040 || \ |
| 452 | ARCH_P5020 || \ |
| 453 | ARCH_LS1043A || \ |
| 454 | ARCH_LS1046A |
| 455 | help |
| 456 | QBman fixups to allow deep sleep in DPAA 1 SOCs |
| 457 | |
Mario Six | 1715105 | 2018-03-28 14:38:18 +0200 | [diff] [blame] | 458 | config TSEC_ENET |
| 459 | select PHYLIB |
| 460 | bool "Enable Three-Speed Ethernet Controller" |
| 461 | help |
| 462 | This driver implements support for the (Enhanced) Three-Speed |
| 463 | Ethernet Controller found on Freescale SoCs. |
| 464 | |
Joe Hershberger | 3ea143a | 2015-03-22 17:09:13 -0500 | [diff] [blame] | 465 | endif # NETDEVICES |