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Stelian Popd99a8ff2008-05-08 20:52:22 +02001/*
2 * (C) Copyright 2007-2008
Stelian Popc9e798d2011-11-01 00:00:39 +01003 * Stelian Pop <stelian@popies.net>
Stelian Popd99a8ff2008-05-08 20:52:22 +02004 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Stelian Popd99a8ff2008-05-08 20:52:22 +02009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14/* ARM asynchronous clock */
Xu, Hongf7aea462011-07-31 22:49:00 +000015#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
Achim Ehrlich7c966a82010-02-24 10:29:16 +010016#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
Stelian Popd99a8ff2008-05-08 20:52:22 +020017
Xu, Hongf7aea462011-07-31 22:49:00 +000018#ifdef CONFIG_AT91SAM9G10
19#define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020020#else
Xu, Hongf7aea462011-07-31 22:49:00 +000021#define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020022#endif
Xu, Hongf7aea462011-07-31 22:49:00 +000023
24#include <asm/hardware.h>
25
Xu, Hongf7aea462011-07-31 22:49:00 +000026#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
27#define CONFIG_SETUP_MEMORY_TAGS
28#define CONFIG_INITRD_TAG
Stelian Popd99a8ff2008-05-08 20:52:22 +020029
30#define CONFIG_SKIP_LOWLEVEL_INIT
Stelian Popd99a8ff2008-05-08 20:52:22 +020031
Xu, Hongf7aea462011-07-31 22:49:00 +000032#define CONFIG_DISPLAY_CPUINFO
33
34#define CONFIG_ATMEL_LEGACY
35#define CONFIG_SYS_TEXT_BASE 0x21f00000
36
Stelian Popd99a8ff2008-05-08 20:52:22 +020037/*
38 * Hardware drivers
39 */
Xu, Hongf7aea462011-07-31 22:49:00 +000040
41/* gpio */
42#define CONFIG_AT91_GPIO
43#define CONFIG_AT91_GPIO_PULLUP 1
44
45/* serial console */
46#define CONFIG_ATMEL_USART
47#define CONFIG_USART_BASE ATMEL_BASE_DBGU
48#define CONFIG_USART_ID ATMEL_ID_SYS
49#define CONFIG_BAUDRATE 115200
Stelian Popd99a8ff2008-05-08 20:52:22 +020050
Stelian Pop820f2a92008-05-08 14:52:30 +020051/* LCD */
Xu, Hongf7aea462011-07-31 22:49:00 +000052#define CONFIG_LCD
Stelian Pop820f2a92008-05-08 14:52:30 +020053#define LCD_BPP LCD_COLOR8
Xu, Hongf7aea462011-07-31 22:49:00 +000054#define CONFIG_LCD_LOGO
Stelian Pop820f2a92008-05-08 14:52:30 +020055#undef LCD_TEST_PATTERN
Xu, Hongf7aea462011-07-31 22:49:00 +000056#define CONFIG_LCD_INFO
57#define CONFIG_LCD_INFO_BELOW_LOGO
58#define CONFIG_SYS_WHITE_ON_BLACK
59#define CONFIG_ATMEL_LCD
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020060#ifdef CONFIG_AT91SAM9261EK
Xu, Hongf7aea462011-07-31 22:49:00 +000061#define CONFIG_ATMEL_LCD_BGR555
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020062#endif
Xu, Hongf7aea462011-07-31 22:49:00 +000063
64#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Stelian Pop820f2a92008-05-08 14:52:30 +020065
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010066/* LED */
67#define CONFIG_AT91_LED
68#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
69#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
70#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
71
Stelian Popd99a8ff2008-05-08 20:52:22 +020072
Stelian Popd99a8ff2008-05-08 20:52:22 +020073/*
74 * BOOTP options
75 */
Xu, Hongf7aea462011-07-31 22:49:00 +000076#define CONFIG_BOOTP_BOOTFILESIZE
77#define CONFIG_BOOTP_BOOTPATH
78#define CONFIG_BOOTP_GATEWAY
79#define CONFIG_BOOTP_HOSTNAME
Stelian Popd99a8ff2008-05-08 20:52:22 +020080
81/*
82 * Command line configuration.
83 */
Xu, Hongf7aea462011-07-31 22:49:00 +000084#define CONFIG_CMD_NAND
Stelian Popd99a8ff2008-05-08 20:52:22 +020085
86/* SDRAM */
87#define CONFIG_NR_DRAM_BANKS 1
Xu, Hongf7aea462011-07-31 22:49:00 +000088#define CONFIG_SYS_SDRAM_BASE 0x20000000
89#define CONFIG_SYS_SDRAM_SIZE 0x04000000
90#define CONFIG_SYS_INIT_SP_ADDR \
91 (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
Stelian Popd99a8ff2008-05-08 20:52:22 +020092
93/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARD4758ebd2009-03-27 23:26:44 +010094#define CONFIG_ATMEL_DATAFLASH_SPI
Xu, Hongf7aea462011-07-31 22:49:00 +000095#define CONFIG_HAS_DATAFLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020096#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
97#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
98#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
Xu, Hongf7aea462011-07-31 22:49:00 +000099#define AT91_SPI_CLK 15000000
100#define DATAFLASH_TCSS (0x1a << 16)
101#define DATAFLASH_TCHS (0x1 << 24)
Stelian Popd99a8ff2008-05-08 20:52:22 +0200102
103/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100104#ifdef CONFIG_CMD_NAND
105#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200106#define CONFIG_SYS_MAX_NAND_DEVICE 1
107#define CONFIG_SYS_NAND_BASE 0x40000000
Xu, Hongf7aea462011-07-31 22:49:00 +0000108#define CONFIG_SYS_NAND_DBW_8
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100109/* our ALE is AD22 */
110#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
111/* our CLE is AD21 */
112#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
113#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
114#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
Wolfgang Denk2eb99ca2009-07-18 21:52:24 +0200115
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100116#endif
Stelian Popd99a8ff2008-05-08 20:52:22 +0200117
118/* NOR flash - no real flash on this board */
Xu, Hongf7aea462011-07-31 22:49:00 +0000119#define CONFIG_SYS_NO_FLASH
Stelian Popd99a8ff2008-05-08 20:52:22 +0200120
121/* Ethernet */
Xu, Hongf7aea462011-07-31 22:49:00 +0000122#define CONFIG_DRIVER_DM9000
Stelian Popd99a8ff2008-05-08 20:52:22 +0200123#define CONFIG_DM9000_BASE 0x30000000
124#define DM9000_IO CONFIG_DM9000_BASE
125#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
Xu, Hongf7aea462011-07-31 22:49:00 +0000126#define CONFIG_DM9000_USE_16BIT
127#define CONFIG_DM9000_NO_SROM
Stelian Popd99a8ff2008-05-08 20:52:22 +0200128#define CONFIG_NET_RETRY_COUNT 20
Xu, Hongf7aea462011-07-31 22:49:00 +0000129#define CONFIG_RESET_PHY_R
Stelian Popd99a8ff2008-05-08 20:52:22 +0200130
131/* USB */
Jean-Christophe PLAGNIOL-VILLARD2b7178a2009-03-27 23:26:44 +0100132#define CONFIG_USB_ATMEL
Bo Shendcd2f1a2013-10-21 16:14:00 +0800133#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
Xu, Hongf7aea462011-07-31 22:49:00 +0000134#define CONFIG_USB_OHCI_NEW
135#define CONFIG_DOS_PARTITION
136#define CONFIG_SYS_USB_OHCI_CPU_INIT
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +0200138#ifdef CONFIG_AT91SAM9G10EK
139#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
140#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +0200142#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200143#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Xu, Hongf7aea462011-07-31 22:49:00 +0000144#define CONFIG_USB_STORAGE
Stelian Popd99a8ff2008-05-08 20:52:22 +0200145
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200146#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200147
Xu, Hongf7aea462011-07-31 22:49:00 +0000148#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200149#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Popd99a8ff2008-05-08 20:52:22 +0200150
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200151#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
Stelian Popd99a8ff2008-05-08 20:52:22 +0200152
153/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Xu, Hongf7aea462011-07-31 22:49:00 +0000154#define CONFIG_ENV_IS_IN_DATAFLASH
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200155#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100156#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200157#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200158#define CONFIG_ENV_SIZE 0x4200
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000159#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
Stelian Popd99a8ff2008-05-08 20:52:22 +0200160#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
161 "root=/dev/mtdblock0 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200162 "mtdparts=atmel_nand:-(root) " \
Stelian Popd99a8ff2008-05-08 20:52:22 +0200163 "rw rootfstype=jffs2"
164
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100165#elif CONFIG_SYS_USE_DATAFLASH_CS3
166
167/* bootstrap + u-boot + env + linux in dataflash on CS3 */
Xu, Hongf7aea462011-07-31 22:49:00 +0000168#define CONFIG_ENV_IS_IN_DATAFLASH
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100169#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
170#define CONFIG_ENV_OFFSET 0x4200
171#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
172#define CONFIG_ENV_SIZE 0x4200
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000173#define CONFIG_BOOTCOMMAND "cp.b 0xD0084000 0x22000000 0x210000; bootm"
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100174#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
175 "root=/dev/mtdblock0 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200176 "mtdparts=atmel_nand:-(root) " \
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100177 "rw rootfstype=jffs2"
178
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200179#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200180
181/* bootstrap + u-boot + env + linux in nandflash */
Xu, Hongf7aea462011-07-31 22:49:00 +0000182#define CONFIG_ENV_IS_IN_NAND
Bo Shen0c58cfa2013-02-20 00:16:25 +0000183#define CONFIG_ENV_OFFSET 0xc0000
184#define CONFIG_ENV_OFFSET_REDUND 0x100000
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200185#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Bo Shen0c58cfa2013-02-20 00:16:25 +0000186#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
187#define CONFIG_BOOTARGS \
188 "console=ttyS0,115200 earlyprintk " \
189 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
190 "256k(env),256k(env_redundant),256k(spare)," \
191 "512k(dtb),6M(kernel)ro,-(rootfs) " \
192 "root=/dev/mtdblock7 rw rootfstype=jffs2"
Stelian Popd99a8ff2008-05-08 20:52:22 +0200193#endif
194
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200195#define CONFIG_SYS_CBSIZE 256
196#define CONFIG_SYS_MAXARGS 16
Xu, Hongf7aea462011-07-31 22:49:00 +0000197#define CONFIG_SYS_LONGHELP
198#define CONFIG_CMDLINE_EDITING
Alexandre Bellonie139cb32012-07-02 04:26:58 +0000199#define CONFIG_AUTO_COMPLETE
Stelian Popd99a8ff2008-05-08 20:52:22 +0200200
Stelian Popd99a8ff2008-05-08 20:52:22 +0200201/*
202 * Size of malloc() pool
203 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200204#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
Stelian Popd99a8ff2008-05-08 20:52:22 +0200205
Stelian Popd99a8ff2008-05-08 20:52:22 +0200206#endif