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Ilya Yanok4ab779c2012-02-07 23:30:22 +00001/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on omap3_evm_config.h
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Ilya Yanok4ab779c2012-02-07 23:30:22 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * High Level Configuration Options
14 */
15#define CONFIG_OMAP /* in a TI OMAP core */
Ilya Yanok4ab779c2012-02-07 23:30:22 +000016#define CONFIG_OMAP3_MCX /* working with mcx */
Marek Vasut308252a2012-07-21 05:02:23 +000017#define CONFIG_OMAP_GPIO
Lokesh Vutla806d2792013-07-30 11:36:30 +053018#define CONFIG_OMAP_COMMON
Nishanth Menonc6f90e12015-03-09 17:12:08 -050019/* Common ARM Erratas */
20#define CONFIG_ARM_ERRATA_454179
21#define CONFIG_ARM_ERRATA_430973
22#define CONFIG_ARM_ERRATA_621766
Ilya Yanok4ab779c2012-02-07 23:30:22 +000023
24#define MACH_TYPE_MCX 3656
25#define CONFIG_MACH_TYPE MACH_TYPE_MCX
Stefano Babic3ae6abb2012-06-13 22:34:44 +000026#define CONFIG_BOARD_LATE_INIT
Ilya Yanok4ab779c2012-02-07 23:30:22 +000027
Anatolij Gustschineb5e1292015-04-08 13:49:41 +020028
Ilya Yanok4ab779c2012-02-07 23:30:22 +000029#define CONFIG_SYS_CACHELINE_SIZE 64
30
31#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
32
33#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menon987ec582015-03-09 17:12:04 -050034#include <asm/arch/omap.h>
Ilya Yanok4ab779c2012-02-07 23:30:22 +000035
36#define CONFIG_OF_LIBFDT
37#define CONFIG_FIT
38
39/*
40 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
41 * and older u-boot.bin with the new U-Boot SPL.
42 */
43#define CONFIG_SYS_TEXT_BASE 0x80008000
44
45/*
46 * Display CPU and Board information
47 */
48#define CONFIG_DISPLAY_CPUINFO
49#define CONFIG_DISPLAY_BOARDINFO
50
51/* Clock Defines */
52#define V_OSCK 26000000 /* Clock output from T2 */
53#define V_SCLK (V_OSCK >> 1)
54
55#define CONFIG_MISC_INIT_R
56
57#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
58#define CONFIG_SETUP_MEMORY_TAGS
59#define CONFIG_INITRD_TAG
60#define CONFIG_REVISION_TAG
61
62/*
63 * Size of malloc() pool
64 */
65#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
66#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
67/*
68 * DDR related
69 */
70#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
71
72/*
73 * Hardware drivers
74 */
75
76/*
77 * NS16550 Configuration
78 */
79#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
80
Ilya Yanok4ab779c2012-02-07 23:30:22 +000081#define CONFIG_SYS_NS16550_SERIAL
82#define CONFIG_SYS_NS16550_REG_SIZE (-4)
83#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84
85/*
86 * select serial console configuration
87 */
88#define CONFIG_CONS_INDEX 3
89#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
90#define CONFIG_SERIAL3 3 /* UART3 */
91
92/* allow to overwrite serial and ethaddr */
93#define CONFIG_ENV_OVERWRITE
94#define CONFIG_BAUDRATE 115200
95#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
96 115200}
97#define CONFIG_MMC
98#define CONFIG_OMAP_HSMMC
99#define CONFIG_GENERIC_MMC
100#define CONFIG_DOS_PARTITION
101
102/* EHCI */
103#define CONFIG_USB_STORAGE
Stefano Babic92671102014-02-14 12:51:25 +0100104#define CONFIG_OMAP3_GPIO_2
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000105#define CONFIG_OMAP3_GPIO_5
106#define CONFIG_USB_EHCI
107#define CONFIG_USB_EHCI_OMAP
108#define CONFIG_USB_ULPI
109#define CONFIG_USB_ULPI_VIEWPORT_OMAP
Stefano Babic8c735b92012-10-16 04:07:04 +0000110#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000111#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
Stefano Babic01d10aa2015-07-26 15:18:14 +0200112#define CONFIG_USB_HOST_ETHER
113#define CONFIG_USB_ETHER_ASIX
114#define CONFIG_USB_ETHER_MCS7830
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000115
116/* commands to include */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000117#define CONFIG_CMD_EXT2 /* EXT2 Support */
118#define CONFIG_CMD_FAT /* FAT support */
119#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
120
121#define CONFIG_CMD_DATE
122#define CONFIG_CMD_I2C /* I2C serial bus support */
123#define CONFIG_CMD_MMC /* MMC support */
124#define CONFIG_CMD_FAT /* FAT support */
125#define CONFIG_CMD_USB
126#define CONFIG_CMD_NAND /* NAND support */
127#define CONFIG_CMD_DHCP
128#define CONFIG_CMD_PING
129#define CONFIG_CMD_CACHE
130#define CONFIG_CMD_UBI
131#define CONFIG_CMD_UBIFS
132#define CONFIG_RBTREE
133#define CONFIG_LZO
134#define CONFIG_MTD_PARTITIONS
135#define CONFIG_MTD_DEVICE
136#define CONFIG_CMD_MTDPARTS
137
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000138#define CONFIG_SYS_NO_FLASH
Heiko Schocher6789e842013-10-22 11:03:18 +0200139#define CONFIG_SYS_I2C
140#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
141#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
142#define CONFIG_SYS_I2C_OMAP34XX
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000143
144/* RTC */
145#define CONFIG_RTC_DS1337
146#define CONFIG_SYS_I2C_RTC_ADDR 0x68
147
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000148#define CONFIG_CMD_MII
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000149/*
150 * Board NAND Info.
151 */
152#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
153 /* to access nand */
154#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
155 /* to access */
156 /* nand at CS0 */
157
158#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
159 /* NAND devices */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000160#define CONFIG_JFFS2_NAND
161/* nand device jffs2 lives on */
162#define CONFIG_JFFS2_DEV "nand0"
163/* start of jffs2 partition */
164#define CONFIG_JFFS2_PART_OFFSET 0x680000
165#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
166
167/* Environment information */
Stefano Babic8f1fae22012-10-20 23:56:07 +0000168#define CONFIG_BOOTDELAY 3
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000169
170#define CONFIG_BOOTFILE "uImage"
171
Stefano Babicf89a8b62012-06-13 22:34:43 +0000172/* Setup MTD for NAND on the SOM */
173#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
174#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
175 "1m(u-boot),256k(env1)," \
176 "256k(env2),6m(kernel),6m(k_recovery)," \
177 "8m(fs_recovery),-(common_data)"
178
179#define CONFIG_HOSTNAME mcx
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000180#define CONFIG_EXTRA_ENV_SETTINGS \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000181 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
182 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
183 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
184 "addfb=setenv bootargs ${bootargs} vram=6M " \
185 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
186 "addip_sta=setenv bootargs ${bootargs} " \
187 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
188 "${netmask}:${hostname}:eth0:off\0" \
189 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
190 "addip=if test -n ${ipdyn};then run addip_dyn;" \
191 "else run addip_sta;fi\0" \
192 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
193 "addtty=setenv bootargs ${bootargs} " \
194 "console=${consoledev},${baudrate}\0" \
195 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
196 "baudrate=115200\0" \
197 "consoledev=ttyO2\0" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200198 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000199 "loadaddr=0x82000000\0" \
200 "load=tftp ${loadaddr} ${u-boot}\0" \
201 "load_k=tftp ${loadaddr} ${bootfile}\0" \
202 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
203 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200204 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000205 "mmcargs=root=/dev/mmcblk0p2 rw " \
206 "rootfstype=ext3 rootwait\0" \
207 "mmcboot=echo Booting from mmc ...; " \
208 "run mmcargs; " \
209 "run addip addtty addmtd addfb addeth addmisc;" \
210 "run loaduimage; " \
211 "bootm ${loadaddr}\0" \
212 "net_nfs=run load_k; " \
213 "run nfsargs; " \
214 "run addip addtty addmtd addfb addeth addmisc;" \
215 "bootm ${loadaddr}\0" \
216 "nfsargs=setenv bootargs root=/dev/nfs rw " \
217 "nfsroot=${serverip}:${rootpath}\0" \
Anatolij Gustschin4a8c3f62014-10-24 20:13:51 +0200218 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000219 "uboot_addr=0x80000\0" \
220 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
221 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
222 "updatemlo=nandecc hw;nand erase 0 20000;" \
223 "nand write ${loadaddr} 0 20000\0" \
224 "upd=if run load;then echo Updating u-boot;if run update;" \
225 "then echo U-Boot updated;" \
226 "else echo Error updating u-boot !;" \
227 "echo Board without bootloader !!;" \
228 "fi;" \
229 "else echo U-Boot not downloaded..exiting;fi\0" \
230 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
231 "bootscript=echo Running bootscript from mmc ...; " \
232 "source ${loadaddr}\0" \
233 "nandargs=setenv bootargs ubi.mtd=7 " \
234 "root=ubi0:rootfs rootfstype=ubifs\0" \
235 "nandboot=echo Booting from nand ...; " \
236 "run nandargs; " \
237 "ubi part nand0,4;" \
238 "ubi readvol ${loadaddr} kernel;" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000239 "run addtty addmtd addfb addeth addmisc;" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000240 "bootm ${loadaddr}\0" \
Stefano Babic8f1fae22012-10-20 23:56:07 +0000241 "preboot=ubi part nand0,7;" \
242 "ubi readvol ${loadaddr} splash;" \
243 "bmp display ${loadaddr};" \
244 "gpio set 55\0" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000245 "swupdate_args=setenv bootargs root=/dev/ram " \
246 "quiet loglevel=1 " \
247 "consoleblank=0 ${swupdate_misc}\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000248 "swupdate=echo Running Sw-Update...;" \
249 "if printenv mtdparts;then echo Starting SwUpdate...; " \
250 "else mtdparts default;fi; " \
251 "ubi part nand0,5;" \
252 "ubi readvol 0x82000000 kernel_recovery;" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000253 "ubi part nand0,6;" \
254 "ubi readvol 0x84000000 fs_recovery;" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000255 "run swupdate_args; " \
256 "setenv bootargs ${bootargs} " \
257 "${mtdparts} " \
258 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \
259 "omapdss.def_disp=lcd;" \
Stefano Babica5d64db2014-02-14 12:51:27 +0100260 "bootm 0x82000000 0x84000000\0" \
261 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
262 "then source 82000000;else run nandboot;fi\0"
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000263
264#define CONFIG_AUTO_COMPLETE
Detlev Zundel48a4ee52012-02-08 04:49:02 +0000265#define CONFIG_CMDLINE_EDITING
266
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000267/*
268 * Miscellaneous configurable options
269 */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000270#define CONFIG_SYS_LONGHELP /* undef to save memory */
271#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Stefano Babic992a27d2012-06-13 22:34:41 +0000272#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000273/* Print Buffer Size */
274#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
275 sizeof(CONFIG_SYS_PROMPT) + 16)
276#define CONFIG_SYS_MAXARGS 16 /* max number of command */
277 /* args */
278/* Boot Argument Buffer Size */
279#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
280/* memtest works on */
281#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
282#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
283 0x01F00000) /* 31MB */
284
285#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
286 /* address */
Stefano Babic8f1fae22012-10-20 23:56:07 +0000287#define CONFIG_PREBOOT
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000288
289/*
290 * AM3517 has 12 GP timers, they can be driven by the system clock
291 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
292 * This rate is divided by a local divisor.
293 */
294#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
295#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000296
297/*
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000298 * Physical Memory Map
299 */
300#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
301#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000302#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
303
304/*
305 * FLASH and environment organization
306 */
307
308/* **** PISMO SUPPORT *** */
Stefano Babic62321e22015-07-26 15:18:13 +0200309#define CONFIG_NAND
310#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000311#define CONFIG_NAND_OMAP_GPMC
Stefano Babic62321e22015-07-26 15:18:13 +0200312#define CONFIG_NAND_OMAP_GPMC_PREFETCH
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000313#define CONFIG_ENV_IS_IN_NAND
Stefano Babicf89a8b62012-06-13 22:34:43 +0000314#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000315
Stefano Babicf89a8b62012-06-13 22:34:43 +0000316/* Redundant Environment */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000317#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
318#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
319#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
Stefano Babicf89a8b62012-06-13 22:34:43 +0000320#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
321 2 * CONFIG_SYS_ENV_SECT_SIZE)
322#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000323
324/* Flash banks JFFS2 should use */
325#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
326 CONFIG_SYS_MAX_NAND_DEVICE)
327#define CONFIG_SYS_JFFS2_MEM_NAND
328/* use flash_info[2] */
329#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
330#define CONFIG_SYS_JFFS2_NUM_BANKS 1
331
332#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
333#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
334#define CONFIG_SYS_INIT_RAM_SIZE 0x800
335#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
336 CONFIG_SYS_INIT_RAM_SIZE - \
337 GENERATED_GBL_DATA_SIZE)
338
339/* Defines for SPL */
Tom Rini47f7bca2012-08-13 12:03:19 -0700340#define CONFIG_SPL_FRAMEWORK
Tom Rinid7cb93b2012-08-14 12:26:08 -0700341#define CONFIG_SPL_BOARD_INIT
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000342#define CONFIG_SPL_NAND_SIMPLE
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000343
344#define CONFIG_SPL_LIBCOMMON_SUPPORT
345#define CONFIG_SPL_LIBDISK_SUPPORT
346#define CONFIG_SPL_I2C_SUPPORT
347#define CONFIG_SPL_MMC_SUPPORT
348#define CONFIG_SPL_FAT_SUPPORT
349#define CONFIG_SPL_LIBGENERIC_SUPPORT
350#define CONFIG_SPL_SERIAL_SUPPORT
351#define CONFIG_SPL_POWER_SUPPORT
352#define CONFIG_SPL_NAND_SUPPORT
Scott Wood6f2f01b2012-09-20 19:09:07 -0500353#define CONFIG_SPL_NAND_BASE
354#define CONFIG_SPL_NAND_DRIVERS
355#define CONFIG_SPL_NAND_ECC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000356#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
357
358#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinie0820cc2012-05-08 07:29:31 +0000359#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000360#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
361
362/* move malloc and bss high to prevent clashing with the main image */
363#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
364#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
365#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
366#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
367
368#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
Paul Kocialkowskie2ccdf82014-11-08 23:14:55 +0100369#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET205b4f32014-10-15 17:53:11 +0200370#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000371
372/* NAND boot config */
373#define CONFIG_SYS_NAND_PAGE_COUNT 64
374#define CONFIG_SYS_NAND_PAGE_SIZE 2048
375#define CONFIG_SYS_NAND_OOBSIZE 64
376#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
377#define CONFIG_SYS_NAND_5_ADDR_CYCLE
378#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
379#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
380 48, 49, 50, 51, 52, 53, 54, 55,\
381 56, 57, 58, 59, 60, 61, 62, 63}
382#define CONFIG_SYS_NAND_ECCSIZE 256
383#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3f719062013-11-18 19:03:01 +0530384#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
Stefano Babic92671102014-02-14 12:51:25 +0100385#define CONFIG_SPL_NAND_SOFTECC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000386
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000387#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
388
389#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
390
391/*
392 * ethernet support
393 *
394 */
395#if defined(CONFIG_CMD_NET)
396#define CONFIG_DRIVER_TI_EMAC
397#define CONFIG_DRIVER_TI_EMAC_USE_RMII
398#define CONFIG_MII
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000399#define CONFIG_BOOTP_DNS
400#define CONFIG_BOOTP_DNS2
401#define CONFIG_BOOTP_SEND_HOSTNAME
402#define CONFIG_NET_RETRY_COUNT 10
403#endif
404
Stefano Babic8f1fae22012-10-20 23:56:07 +0000405#define CONFIG_VIDEO
406#define CONFIG_CFB_CONSOLE
407#define CONFIG_VGA_AS_SINGLE_DEVICE
408#define CONFIG_SPLASH_SCREEN
409#define CONFIG_VIDEO_BMP_RLE8
410#define CONFIG_CMD_BMP
411#define CONFIG_VIDEO_OMAP3
412#define CONFIG_SYS_CONSOLE_IS_IN_ENV
413
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000414#endif /* __CONFIG_H */