wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 4 | * Marius Groeger <mgroeger@sysgo.de> |
| 5 | * |
| 6 | * (C) Copyright 2002 |
| 7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 8 | * Alex Zuepke <azu@sysgo.de> |
| 9 | * |
| 10 | * (C) Copyright 2002 |
| 11 | * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> |
| 12 | * |
| 13 | * See file CREDITS for list of people who contributed to this |
| 14 | * project. |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or |
| 17 | * modify it under the terms of the GNU General Public License as |
| 18 | * published by the Free Software Foundation; either version 2 of |
| 19 | * the License, or (at your option) any later version. |
| 20 | * |
| 21 | * This program is distributed in the hope that it will be useful, |
| 22 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 23 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 24 | * GNU General Public License for more details. |
| 25 | * |
| 26 | * You should have received a copy of the GNU General Public License |
| 27 | * along with this program; if not, write to the Free Software |
| 28 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 29 | * MA 02111-1307 USA |
| 30 | */ |
| 31 | |
| 32 | #include <common.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 33 | |
wdenk | 281e00a | 2004-08-01 22:48:16 +0000 | [diff] [blame^] | 34 | #include <arm920t.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 35 | #include <asm/proc-armv/ptrace.h> |
| 36 | |
| 37 | extern void reset_cpu(ulong addr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 38 | |
| 39 | #ifdef CONFIG_USE_IRQ |
| 40 | /* enable IRQ interrupts */ |
| 41 | void enable_interrupts (void) |
| 42 | { |
| 43 | unsigned long temp; |
| 44 | __asm__ __volatile__("mrs %0, cpsr\n" |
| 45 | "bic %0, %0, #0x80\n" |
| 46 | "msr cpsr_c, %0" |
| 47 | : "=r" (temp) |
| 48 | : |
| 49 | : "memory"); |
| 50 | } |
| 51 | |
| 52 | |
| 53 | /* |
| 54 | * disable IRQ/FIQ interrupts |
| 55 | * returns true if interrupts had been enabled before we disabled them |
| 56 | */ |
| 57 | int disable_interrupts (void) |
| 58 | { |
| 59 | unsigned long old,temp; |
| 60 | __asm__ __volatile__("mrs %0, cpsr\n" |
| 61 | "orr %1, %0, #0xc0\n" |
| 62 | "msr cpsr_c, %1" |
| 63 | : "=r" (old), "=r" (temp) |
| 64 | : |
| 65 | : "memory"); |
| 66 | return (old & 0x80) == 0; |
| 67 | } |
| 68 | #else |
| 69 | void enable_interrupts (void) |
| 70 | { |
| 71 | return; |
| 72 | } |
| 73 | int disable_interrupts (void) |
| 74 | { |
| 75 | return 0; |
| 76 | } |
| 77 | #endif |
| 78 | |
| 79 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 80 | void bad_mode (void) |
| 81 | { |
| 82 | panic ("Resetting CPU ...\n"); |
| 83 | reset_cpu (0); |
| 84 | } |
| 85 | |
| 86 | void show_regs (struct pt_regs *regs) |
| 87 | { |
| 88 | unsigned long flags; |
| 89 | const char *processor_modes[] = { |
| 90 | "USER_26", "FIQ_26", "IRQ_26", "SVC_26", |
| 91 | "UK4_26", "UK5_26", "UK6_26", "UK7_26", |
| 92 | "UK8_26", "UK9_26", "UK10_26", "UK11_26", |
| 93 | "UK12_26", "UK13_26", "UK14_26", "UK15_26", |
| 94 | "USER_32", "FIQ_32", "IRQ_32", "SVC_32", |
| 95 | "UK4_32", "UK5_32", "UK6_32", "ABT_32", |
| 96 | "UK8_32", "UK9_32", "UK10_32", "UND_32", |
| 97 | "UK12_32", "UK13_32", "UK14_32", "SYS_32", |
| 98 | }; |
| 99 | |
| 100 | flags = condition_codes (regs); |
| 101 | |
| 102 | printf ("pc : [<%08lx>] lr : [<%08lx>]\n" |
| 103 | "sp : %08lx ip : %08lx fp : %08lx\n", |
| 104 | instruction_pointer (regs), |
| 105 | regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp); |
| 106 | printf ("r10: %08lx r9 : %08lx r8 : %08lx\n", |
| 107 | regs->ARM_r10, regs->ARM_r9, regs->ARM_r8); |
| 108 | printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n", |
| 109 | regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4); |
| 110 | printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n", |
| 111 | regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0); |
| 112 | printf ("Flags: %c%c%c%c", |
| 113 | flags & CC_N_BIT ? 'N' : 'n', |
| 114 | flags & CC_Z_BIT ? 'Z' : 'z', |
| 115 | flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v'); |
| 116 | printf (" IRQs %s FIQs %s Mode %s%s\n", |
| 117 | interrupts_enabled (regs) ? "on" : "off", |
| 118 | fast_interrupts_enabled (regs) ? "on" : "off", |
| 119 | processor_modes[processor_mode (regs)], |
| 120 | thumb_mode (regs) ? " (T)" : ""); |
| 121 | } |
| 122 | |
| 123 | void do_undefined_instruction (struct pt_regs *pt_regs) |
| 124 | { |
| 125 | printf ("undefined instruction\n"); |
| 126 | show_regs (pt_regs); |
| 127 | bad_mode (); |
| 128 | } |
| 129 | |
| 130 | void do_software_interrupt (struct pt_regs *pt_regs) |
| 131 | { |
| 132 | printf ("software interrupt\n"); |
| 133 | show_regs (pt_regs); |
| 134 | bad_mode (); |
| 135 | } |
| 136 | |
| 137 | void do_prefetch_abort (struct pt_regs *pt_regs) |
| 138 | { |
| 139 | printf ("prefetch abort\n"); |
| 140 | show_regs (pt_regs); |
| 141 | bad_mode (); |
| 142 | } |
| 143 | |
| 144 | void do_data_abort (struct pt_regs *pt_regs) |
| 145 | { |
| 146 | printf ("data abort\n"); |
| 147 | show_regs (pt_regs); |
| 148 | bad_mode (); |
| 149 | } |
| 150 | |
| 151 | void do_not_used (struct pt_regs *pt_regs) |
| 152 | { |
| 153 | printf ("not used\n"); |
| 154 | show_regs (pt_regs); |
| 155 | bad_mode (); |
| 156 | } |
| 157 | |
| 158 | void do_fiq (struct pt_regs *pt_regs) |
| 159 | { |
| 160 | printf ("fast interrupt request\n"); |
| 161 | show_regs (pt_regs); |
| 162 | bad_mode (); |
| 163 | } |
| 164 | |
| 165 | void do_irq (struct pt_regs *pt_regs) |
| 166 | { |
| 167 | printf ("interrupt request\n"); |
| 168 | show_regs (pt_regs); |
| 169 | bad_mode (); |
| 170 | } |