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Stefan Roese6e7fb6e2005-11-29 18:18:21 +01001/*
2 * (C) Copyright 2005
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 * John Otken, jotken@softadvances.com
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25/************************************************************************
26 * luan.h - configuration for LUAN board
27 ***********************************************************************/
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*-----------------------------------------------------------------------
32 * High Level Configuration Options
33 *----------------------------------------------------------------------*/
34#define CONFIG_LUAN 1 /* Board is Luan */
35#define CONFIG_440SP 1 /* Specific PPC440SP support */
36#define CONFIG_4xx 1 /* PPC4xx family */
37#define CONFIG_440 1
38#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
39
Stefan Roese00cdb4c2007-03-08 10:13:16 +010040#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +010041#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
42
43/*-----------------------------------------------------------------------
44 * Base addresses -- Note these are effective addresses where the
45 * actual resources get mapped (not physical addresses)
46 *----------------------------------------------------------------------*/
47#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
48#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc */
49#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
50#define CFG_SDRAM_BASE 0x00000000 /* MUST be zero */
51
52#define CFG_LARGE_FLASH 0xffc00000 /* 4MB flash address CS0 */
53#define CFG_SMALL_FLASH 0xff900000 /* 1MB flash address CS2 */
54#define CFG_SRAM_BASE 0xff800000 /* 1MB SRAM address CS2 */
55#define CFG_EPLD_BASE 0xff000000 /* EPLD and FRAM CS1 */
56
57#define CFG_ISRAM_BASE 0xf8000000 /* internal 8k SRAM (L2 cache) */
58
59#define CFG_PERIPHERAL_BASE 0xf0000000 /* internal peripherals */
60
61#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
62#define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
63#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
64
65#if CFG_LARGE_FLASH == 0xffc00000
66#define CFG_FLASH_BASE CFG_LARGE_FLASH
67#else
68#define CFG_FLASH_BASE CFG_SMALL_FLASH
69#endif
70
71#undef CFG_DRAM_TEST
72#if CFG_SRAM_BASE
73#define CFG_KBYTES_SDRAM 1024*2
74#else
75#define CFG_KBYTES_SDRAM 1024
76#endif
77
78/*-----------------------------------------------------------------------
79 * Initial RAM & stack pointer (placed in SDRAM)
80 *----------------------------------------------------------------------*/
81#define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE
82#define CFG_INIT_RAM_END (8 << 10)
83#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
84#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
85#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
86
87/*-----------------------------------------------------------------------
88 * Serial Port
89 *----------------------------------------------------------------------*/
90#define CFG_EXT_SERIAL_CLOCK 11059200 /* external 11.059MHz clk */
91#define CONFIG_BAUDRATE 115200
92#undef CONFIG_SERIAL_MULTI
93#undef CONFIG_UART1_CONSOLE /* define if you want console on UART1 */
94
95#define CFG_BAUDRATE_TABLE \
96 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
97
98/*-----------------------------------------------------------------------
99 * Environment
100 *----------------------------------------------------------------------*/
101/*
102 * Define here the location of the environment variables (FLASH or EEPROM).
103 * Note: DENX encourages to use redundant environment in FLASH.
104 */
105#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
106
107/*-----------------------------------------------------------------------
108 * FLASH related
109 *----------------------------------------------------------------------*/
110#define CFG_MAX_FLASH_BANKS 3 /* max number of memory banks */
111#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
112
113#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
114#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
115
116#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
117
118#define CFG_FLASH_ADDR0 0x555
119#define CFG_FLASH_ADDR1 0x2aa
120#define CFG_FLASH_WORD_SIZE unsigned char
121
122#ifdef CFG_ENV_IS_IN_FLASH
123#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
124#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
125#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
126
127/* Address and size of Redundant Environment Sector */
128#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
129#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
130#endif /* CFG_ENV_IS_IN_FLASH */
131
132/*-----------------------------------------------------------------------
133 * DDR SDRAM
134 *----------------------------------------------------------------------*/
Stefan Roese00cdb4c2007-03-08 10:13:16 +0100135#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
136#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
Stefan Roesee4bbed22007-06-01 13:45:24 +0200137#define CONFIG_DDR_ECC 1 /* with ECC support */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100138
139/*-----------------------------------------------------------------------
140 * I2C
141 *----------------------------------------------------------------------*/
142#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
143#undef CONFIG_SOFT_I2C /* I2C bit-banged */
144#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
145#define CFG_I2C_SLAVE 0x7F
146
Stefan Roese4f92ed52006-08-07 14:33:32 +0200147#define CFG_I2C_MULTI_EEPROMS
148#define CFG_I2C_EEPROM_ADDR (0xa8>>1)
149#define CFG_I2C_EEPROM_ADDR_LEN 1
150#define CFG_EEPROM_PAGE_WRITE_ENABLE
151#define CFG_EEPROM_PAGE_WRITE_BITS 3
152#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
153
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100154#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +0100155 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100156 "echo"
157
158#undef CONFIG_BOOTARGS
159
160#define CONFIG_EXTRA_ENV_SETTINGS \
161 "netdev=eth0\0" \
162 "hostname=luan\0" \
163 "nfsargs=setenv bootargs root=/dev/nfs rw " \
164 "nfsroot=$(serverip):$(rootpath)\0" \
165 "ramargs=setenv bootargs root=/dev/ram rw\0" \
166 "addip=setenv bootargs $(bootargs) " \
167 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
168 ":$(hostname):$(netdev):off panic=1\0" \
169 "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
170 "flash_nfs=run nfsargs addip addtty;" \
171 "bootm $(kernel_addr)\0" \
172 "flash_self=run ramargs addip addtty;" \
173 "bootm $(kernel_addr) $(ramdisk_addr)\0" \
174 "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;" \
175 "bootm\0" \
176 "rootpath=/opt/eldk/ppc_4xx\0" \
177 "bootfile=/tftpboot/luan/uImage\0" \
178 "kernel_addr=fc000000\0" \
179 "ramdisk_addr=fc100000\0" \
Stefan Roese5a753f92007-02-07 16:51:08 +0100180 "initrd_high=30000000\0" \
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100181 "load=tftp 100000 /tftpboot/luan/u-boot.bin\0" \
182 "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
183 "cp.b 100000 fffc0000 40000;" \
184 "setenv filesize;saveenv\0" \
Detlev Zundeld8ab58b2008-03-06 16:45:53 +0100185 "upd=run load update\0" \
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100186 ""
187#define CONFIG_BOOTCOMMAND "run flash_self"
188
189#if 0
190#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
191#else
192#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
193#endif
194
195#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
196#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
197
Stefan Roesea00eccf2008-05-08 11:05:15 +0200198#define CONFIG_HAS_ETH0
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100199#define CONFIG_MII 1 /* MII PHY management */
200#define CONFIG_PHY_ADDR 1
201#define CONFIG_CIS8201_PHY 1 /* Enable 'special' RGMII mode for Cicada phy */
202#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
203
204#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
205
206#define CONFIG_NETCONSOLE /* include NetConsole support */
207#define CONFIG_NET_MULTI /* needed for NetConsole */
208
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100209#ifdef DEBUG
210#define CONFIG_PANIC_HANG
211#else
212#define CONFIG_HW_WATCHDOG /* watchdog */
213#endif
214
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500215/*
Jon Loeliger7f5c0152007-07-10 09:38:02 -0500216 * BOOTP options
217 */
218#define CONFIG_BOOTP_BOOTFILESIZE
219#define CONFIG_BOOTP_BOOTPATH
220#define CONFIG_BOOTP_GATEWAY
221#define CONFIG_BOOTP_HOSTNAME
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100222
Jon Loeliger7f5c0152007-07-10 09:38:02 -0500223/*
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500224 * Command line configuration.
225 */
226#include <config_cmd_default.h>
227
228#define CONFIG_CMD_ASKENV
229#define CONFIG_CMD_DHCP
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500230#define CONFIG_CMD_EEPROM
231#define CONFIG_CMD_I2C
232#define CONFIG_CMD_IRQ
233#define CONFIG_CMD_MII
234#define CONFIG_CMD_NET
235#define CONFIG_CMD_NFS
236#define CONFIG_CMD_PCI
237#define CONFIG_CMD_PING
238#define CONFIG_CMD_REGINFO
239#define CONFIG_CMD_SDRAM
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100240
241/*
242 * Miscellaneous configurable options
243 */
244#define CFG_LONGHELP /* undef to save memory */
245#define CFG_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500246#if defined(CONFIG_CMD_KGDB)
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100247#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
248#else
249#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
250#endif
251#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
252#define CFG_MAXARGS 16 /* max number of command args */
253#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
254
255#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
256#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
257
258#define CFG_LOAD_ADDR 0x100000 /* default load address */
259#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
260#undef CONFIG_LYNXKDI /* support kdi files */
261
262#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
263
Stefan Roese4f92ed52006-08-07 14:33:32 +0200264#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
265#define CONFIG_LOOPW 1 /* enable loopw command */
266#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
267#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
268#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
269
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100270/*-----------------------------------------------------------------------
271 * PCI stuff
272 *-----------------------------------------------------------------------
273 */
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500274#if defined(CONFIG_CMD_PCI)
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100275
276/* General PCI */
277#define CONFIG_PCI /* include pci support */
278#define CONFIG_PCI_PNP /* do (not) pci plug-and-play */
279#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
280
281/* Board-specific PCI */
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100282#define CFG_PCI_TARGET_INIT
283#undef CFG_PCI_MASTER_INIT
284
285#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
286#define CFG_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */
287
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500288#endif
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100289
290/*
291 * For booting Linux, the board info and command line data
292 * have to be in the first 8 MB of memory, since this is
293 * the maximum mapped by the Linux kernel during initialization.
294 */
295#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
296
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100297/*
298 * Internal Definitions
299 *
300 * Boot Flags
301 */
302#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
303#define BOOTFLAG_WARM 0x02 /* Software reboot */
304
Jon Loeliger9bbb1c02007-07-04 22:32:57 -0500305#if defined(CONFIG_CMD_KGDB)
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100306#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
307#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
308#endif
309
Stefan Roesea00eccf2008-05-08 11:05:15 +0200310/* pass open firmware flat tree */
311#define CONFIG_OF_LIBFDT 1
312#define CONFIG_OF_BOARD_SETUP 1
313
Stefan Roese6e7fb6e2005-11-29 18:18:21 +0100314#endif /* __CONFIG_H */