Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Gateworks Corporation |
| 4 | * Tim Harvey <tharvey@gateworks.com> |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __PFUZE100_PMIC_H_ |
| 8 | #define __PFUZE100_PMIC_H_ |
| 9 | |
Peng Fan | 1c1f607 | 2015-08-14 11:36:16 +0200 | [diff] [blame] | 10 | /* Device ID */ |
| 11 | enum {PFUZE100 = 0x10, PFUZE200 = 0x11, PFUZE3000 = 0x30}; |
| 12 | |
| 13 | #define PFUZE100_REGULATOR_DRIVER "pfuze100_regulator" |
| 14 | |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 15 | /* PFUZE100 registers */ |
| 16 | enum { |
| 17 | PFUZE100_DEVICEID = 0x00, |
| 18 | PFUZE100_REVID = 0x03, |
| 19 | PFUZE100_FABID = 0x04, |
| 20 | |
Philip Oberfichtner | a194d59 | 2022-03-18 12:04:37 +0100 | [diff] [blame] | 21 | PFUZE100_MEMA = 0x1c, |
| 22 | PFUZE100_MEMB = 0x1d, |
| 23 | PFUZE100_MEMC = 0x1e, |
| 24 | PFUZE100_MEMD = 0x1f, |
| 25 | |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 26 | PFUZE100_SW1ABVOL = 0x20, |
Fabio Estevam | 66ca09f | 2014-05-09 13:15:42 -0300 | [diff] [blame] | 27 | PFUZE100_SW1ABSTBY = 0x21, |
Peng Fan | ccbb187 | 2015-01-08 21:00:36 +0800 | [diff] [blame] | 28 | PFUZE100_SW1ABOFF = 0x22, |
| 29 | PFUZE100_SW1ABMODE = 0x23, |
Peng Fan | 3fd10f3 | 2015-05-18 13:37:26 +0800 | [diff] [blame] | 30 | PFUZE100_SW1ABCONF = 0x24, |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 31 | PFUZE100_SW1CVOL = 0x2e, |
Fabio Estevam | 66ca09f | 2014-05-09 13:15:42 -0300 | [diff] [blame] | 32 | PFUZE100_SW1CSTBY = 0x2f, |
Peng Fan | ccbb187 | 2015-01-08 21:00:36 +0800 | [diff] [blame] | 33 | PFUZE100_SW1COFF = 0x30, |
| 34 | PFUZE100_SW1CMODE = 0x31, |
Fabio Estevam | 66ca09f | 2014-05-09 13:15:42 -0300 | [diff] [blame] | 35 | PFUZE100_SW1CCONF = 0x32, |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 36 | PFUZE100_SW2VOL = 0x35, |
Peng Fan | ccbb187 | 2015-01-08 21:00:36 +0800 | [diff] [blame] | 37 | PFUZE100_SW2STBY = 0x36, |
| 38 | PFUZE100_SW2OFF = 0x37, |
| 39 | PFUZE100_SW2MODE = 0x38, |
| 40 | PFUZE100_SW2CONF = 0x39, |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 41 | PFUZE100_SW3AVOL = 0x3c, |
Peng Fan | ccbb187 | 2015-01-08 21:00:36 +0800 | [diff] [blame] | 42 | PFUZE100_SW3ASTBY = 0x3D, |
| 43 | PFUZE100_SW3AOFF = 0x3E, |
| 44 | PFUZE100_SW3AMODE = 0x3F, |
| 45 | PFUZE100_SW3ACONF = 0x40, |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 46 | PFUZE100_SW3BVOL = 0x43, |
Peng Fan | ccbb187 | 2015-01-08 21:00:36 +0800 | [diff] [blame] | 47 | PFUZE100_SW3BSTBY = 0x44, |
| 48 | PFUZE100_SW3BOFF = 0x45, |
| 49 | PFUZE100_SW3BMODE = 0x46, |
| 50 | PFUZE100_SW3BCONF = 0x47, |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 51 | PFUZE100_SW4VOL = 0x4a, |
Peng Fan | ccbb187 | 2015-01-08 21:00:36 +0800 | [diff] [blame] | 52 | PFUZE100_SW4STBY = 0x4b, |
| 53 | PFUZE100_SW4OFF = 0x4c, |
| 54 | PFUZE100_SW4MODE = 0x4d, |
| 55 | PFUZE100_SW4CONF = 0x4e, |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 56 | PFUZE100_SWBSTCON1 = 0x66, |
| 57 | PFUZE100_VREFDDRCON = 0x6a, |
| 58 | PFUZE100_VSNVSVOL = 0x6b, |
| 59 | PFUZE100_VGEN1VOL = 0x6c, |
| 60 | PFUZE100_VGEN2VOL = 0x6d, |
| 61 | PFUZE100_VGEN3VOL = 0x6e, |
| 62 | PFUZE100_VGEN4VOL = 0x6f, |
| 63 | PFUZE100_VGEN5VOL = 0x70, |
| 64 | PFUZE100_VGEN6VOL = 0x71, |
| 65 | |
Peng Fan | 1c1f607 | 2015-08-14 11:36:16 +0200 | [diff] [blame] | 66 | PFUZE100_NUM_OF_REGS = 0x7f, |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 67 | }; |
| 68 | |
Peng Fan | 8fa4635 | 2015-08-07 16:43:45 +0800 | [diff] [blame] | 69 | /* Registor offset based on VOLT register */ |
| 70 | #define PFUZE100_VOL_OFFSET 0 |
| 71 | #define PFUZE100_STBY_OFFSET 1 |
| 72 | #define PFUZE100_OFF_OFFSET 2 |
| 73 | #define PFUZE100_MODE_OFFSET 3 |
| 74 | #define PFUZE100_CONF_OFFSET 4 |
| 75 | |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 76 | /* |
Ye.Li | 36523e9 | 2014-11-06 16:28:58 +0800 | [diff] [blame] | 77 | * Buck Regulators |
| 78 | */ |
| 79 | |
Peng Fan | ee52f1a | 2015-01-09 16:59:41 +0800 | [diff] [blame] | 80 | #define PFUZE100_SW1ABC_SETP(x) ((x - 3000) / 250) |
| 81 | |
Ye.Li | 36523e9 | 2014-11-06 16:28:58 +0800 | [diff] [blame] | 82 | /* SW1A/B/C Output Voltage Configuration */ |
| 83 | #define SW1x_0_300V 0 |
| 84 | #define SW1x_0_325V 1 |
| 85 | #define SW1x_0_350V 2 |
| 86 | #define SW1x_0_375V 3 |
| 87 | #define SW1x_0_400V 4 |
| 88 | #define SW1x_0_425V 5 |
| 89 | #define SW1x_0_450V 6 |
| 90 | #define SW1x_0_475V 7 |
| 91 | #define SW1x_0_500V 8 |
| 92 | #define SW1x_0_525V 9 |
| 93 | #define SW1x_0_550V 10 |
| 94 | #define SW1x_0_575V 11 |
| 95 | #define SW1x_0_600V 12 |
| 96 | #define SW1x_0_625V 13 |
| 97 | #define SW1x_0_650V 14 |
| 98 | #define SW1x_0_675V 15 |
| 99 | #define SW1x_0_700V 16 |
| 100 | #define SW1x_0_725V 17 |
| 101 | #define SW1x_0_750V 18 |
| 102 | #define SW1x_0_775V 19 |
| 103 | #define SW1x_0_800V 20 |
| 104 | #define SW1x_0_825V 21 |
| 105 | #define SW1x_0_850V 22 |
| 106 | #define SW1x_0_875V 23 |
| 107 | #define SW1x_0_900V 24 |
| 108 | #define SW1x_0_925V 25 |
| 109 | #define SW1x_0_950V 26 |
| 110 | #define SW1x_0_975V 27 |
| 111 | #define SW1x_1_000V 28 |
| 112 | #define SW1x_1_025V 29 |
| 113 | #define SW1x_1_050V 30 |
| 114 | #define SW1x_1_075V 31 |
| 115 | #define SW1x_1_100V 32 |
| 116 | #define SW1x_1_125V 33 |
| 117 | #define SW1x_1_150V 34 |
| 118 | #define SW1x_1_175V 35 |
| 119 | #define SW1x_1_200V 36 |
| 120 | #define SW1x_1_225V 37 |
| 121 | #define SW1x_1_250V 38 |
| 122 | #define SW1x_1_275V 39 |
| 123 | #define SW1x_1_300V 40 |
| 124 | #define SW1x_1_325V 41 |
| 125 | #define SW1x_1_350V 42 |
| 126 | #define SW1x_1_375V 43 |
| 127 | #define SW1x_1_400V 44 |
| 128 | #define SW1x_1_425V 45 |
| 129 | #define SW1x_1_450V 46 |
| 130 | #define SW1x_1_475V 47 |
| 131 | #define SW1x_1_500V 48 |
| 132 | #define SW1x_1_525V 49 |
| 133 | #define SW1x_1_550V 50 |
| 134 | #define SW1x_1_575V 51 |
| 135 | #define SW1x_1_600V 52 |
| 136 | #define SW1x_1_625V 53 |
| 137 | #define SW1x_1_650V 54 |
| 138 | #define SW1x_1_675V 55 |
| 139 | #define SW1x_1_700V 56 |
| 140 | #define SW1x_1_725V 57 |
| 141 | #define SW1x_1_750V 58 |
| 142 | #define SW1x_1_775V 59 |
| 143 | #define SW1x_1_800V 60 |
| 144 | #define SW1x_1_825V 61 |
| 145 | #define SW1x_1_850V 62 |
| 146 | #define SW1x_1_875V 63 |
| 147 | |
| 148 | #define SW1x_NORMAL_MASK 0x3f |
| 149 | #define SW1x_STBY_MASK 0x3f |
| 150 | #define SW1x_OFF_MASK 0x3f |
| 151 | |
Peng Fan | 8fa4635 | 2015-08-07 16:43:45 +0800 | [diff] [blame] | 152 | #define SW_MODE_MASK 0xf |
| 153 | #define SW_MODE_SHIFT 0 |
| 154 | |
Ye.Li | 36523e9 | 2014-11-06 16:28:58 +0800 | [diff] [blame] | 155 | #define SW1xCONF_DVSSPEED_MASK 0xc0 |
| 156 | #define SW1xCONF_DVSSPEED_2US 0x00 |
| 157 | #define SW1xCONF_DVSSPEED_4US 0x40 |
| 158 | #define SW1xCONF_DVSSPEED_8US 0x80 |
| 159 | #define SW1xCONF_DVSSPEED_16US 0xc0 |
| 160 | |
| 161 | /* |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 162 | * LDO Configuration |
| 163 | */ |
| 164 | |
| 165 | /* VGEN1/2 Voltage Configuration */ |
| 166 | #define LDOA_0_80V 0 |
| 167 | #define LDOA_0_85V 1 |
| 168 | #define LDOA_0_90V 2 |
| 169 | #define LDOA_0_95V 3 |
| 170 | #define LDOA_1_00V 4 |
| 171 | #define LDOA_1_05V 5 |
| 172 | #define LDOA_1_10V 6 |
| 173 | #define LDOA_1_15V 7 |
| 174 | #define LDOA_1_20V 8 |
| 175 | #define LDOA_1_25V 9 |
| 176 | #define LDOA_1_30V 10 |
| 177 | #define LDOA_1_35V 11 |
| 178 | #define LDOA_1_40V 12 |
| 179 | #define LDOA_1_45V 13 |
| 180 | #define LDOA_1_50V 14 |
| 181 | #define LDOA_1_55V 15 |
| 182 | |
| 183 | /* VGEN3/4/5/6 Voltage Configuration */ |
| 184 | #define LDOB_1_80V 0 |
| 185 | #define LDOB_1_90V 1 |
| 186 | #define LDOB_2_00V 2 |
| 187 | #define LDOB_2_10V 3 |
| 188 | #define LDOB_2_20V 4 |
| 189 | #define LDOB_2_30V 5 |
| 190 | #define LDOB_2_40V 6 |
| 191 | #define LDOB_2_50V 7 |
| 192 | #define LDOB_2_60V 8 |
| 193 | #define LDOB_2_70V 9 |
| 194 | #define LDOB_2_80V 10 |
| 195 | #define LDOB_2_90V 11 |
| 196 | #define LDOB_3_00V 12 |
| 197 | #define LDOB_3_10V 13 |
| 198 | #define LDOB_3_20V 14 |
| 199 | #define LDOB_3_30V 15 |
| 200 | |
| 201 | #define LDO_VOL_MASK 0xf |
Tim Harvey | 76962d0 | 2015-04-03 16:56:16 -0700 | [diff] [blame] | 202 | #define LDO_EN (1 << 4) |
Peng Fan | 8fa4635 | 2015-08-07 16:43:45 +0800 | [diff] [blame] | 203 | #define LDO_MODE_SHIFT 4 |
| 204 | #define LDO_MODE_MASK (1 << 4) |
| 205 | #define LDO_MODE_OFF 0 |
| 206 | #define LDO_MODE_ON 1 |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 207 | |
Peng Fan | 8fa4635 | 2015-08-07 16:43:45 +0800 | [diff] [blame] | 208 | #define VREFDDRCON_EN (1 << 4) |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 209 | /* |
| 210 | * Boost Regulator |
| 211 | */ |
| 212 | |
| 213 | /* SWBST Output Voltage */ |
| 214 | #define SWBST_5_00V 0 |
| 215 | #define SWBST_5_05V 1 |
| 216 | #define SWBST_5_10V 2 |
| 217 | #define SWBST_5_15V 3 |
| 218 | |
| 219 | #define SWBST_VOL_MASK 0x3 |
Peng Fan | 430abe1 | 2015-08-07 16:43:41 +0800 | [diff] [blame] | 220 | #define SWBST_MODE_MASK 0xC |
Peng Fan | 8fa4635 | 2015-08-07 16:43:45 +0800 | [diff] [blame] | 221 | #define SWBST_MODE_SHIFT 0x2 |
| 222 | #define SWBST_MODE_OFF 0 |
| 223 | #define SWBST_MODE_PFM 1 |
| 224 | #define SWBST_MODE_AUTO 2 |
| 225 | #define SWBST_MODE_APS 3 |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 226 | |
Peng Fan | ccbb187 | 2015-01-08 21:00:36 +0800 | [diff] [blame] | 227 | /* |
| 228 | * Regulator Mode Control |
| 229 | * |
| 230 | * OFF: The regulator is switched off and the output voltage is discharged. |
| 231 | * PFM: In this mode, the regulator is always in PFM mode, which is useful |
| 232 | * at light loads for optimized efficiency. |
| 233 | * PWM: In this mode, the regulator is always in PWM mode operation |
| 234 | * regardless of load conditions. |
| 235 | * APS: In this mode, the regulator moves automatically between pulse |
| 236 | * skipping mode and PWM mode depending on load conditions. |
| 237 | * |
| 238 | * SWxMODE[3:0] |
| 239 | * Normal Mode | Standby Mode | value |
| 240 | * OFF OFF 0x0 |
| 241 | * PWM OFF 0x1 |
| 242 | * PFM OFF 0x3 |
| 243 | * APS OFF 0x4 |
| 244 | * PWM PWM 0x5 |
| 245 | * PWM APS 0x6 |
| 246 | * APS APS 0x8 |
| 247 | * APS PFM 0xc |
| 248 | * PWM PFM 0xd |
| 249 | */ |
| 250 | #define OFF_OFF 0x0 |
| 251 | #define PWM_OFF 0x1 |
| 252 | #define PFM_OFF 0x3 |
| 253 | #define APS_OFF 0x4 |
| 254 | #define PWM_PWM 0x5 |
| 255 | #define PWM_APS 0x6 |
| 256 | #define APS_APS 0x8 |
| 257 | #define APS_PFM 0xc |
| 258 | #define PWM_PFM 0xd |
| 259 | |
Stefano Babic | a4f7d09 | 2015-02-11 12:35:46 +0100 | [diff] [blame] | 260 | #define SWITCH_SIZE 0x7 |
| 261 | |
Tim Harvey | 93a6d92 | 2014-04-22 21:53:56 -0700 | [diff] [blame] | 262 | int power_pfuze100_init(unsigned char bus); |
Tim Harvey | 91baa6f | 2014-02-12 23:48:12 -0800 | [diff] [blame] | 263 | #endif |