blob: 8926c26b0bdfcf4bf8930131db0f8b9060173eb7 [file] [log] [blame]
Chris Packhama6477f72018-06-25 22:34:57 +12001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2016 Allied Telesis <www.alliedtelesis.co.nz>
4 */
5
6#ifndef _CONFIG_SBX81LIFXCAT_H
7#define _CONFIG_SBX81LIFXCAT_H
8
Chris Packhama6477f72018-06-25 22:34:57 +12009/* additions for new ARM relocation support */
10#define CONFIG_SYS_SDRAM_BASE 0x00000000
11
Chris Packhama6477f72018-06-25 22:34:57 +120012/*
13 * NS16550 Configuration
14 */
Chris Packhama6477f72018-06-25 22:34:57 +120015#define CONFIG_SYS_NS16550_SERIAL
16#define CONFIG_SYS_NS16550_REG_SIZE (-4)
17#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
18#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
19
20/*
21 * Serial Port configuration
22 * The following definitions let you select what serial you want to use
23 * for your console driver.
24 */
25
Chris Packhama6477f72018-06-25 22:34:57 +120026#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
27#define MTDPARTS_MTDOOPS "errlog"
Chris Packhama6477f72018-06-25 22:34:57 +120028
29/*
30 * Environment variables configurations
31 */
Chris Packhama6477f72018-06-25 22:34:57 +120032
33/*
34 * U-Boot bootcode configuration
35 */
36
37#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */
Chris Packhama6477f72018-06-25 22:34:57 +120038
39/*
40 * For booting Linux, the board info and command line data
41 * have to be in the first 8 MB of memory, since this is
42 * the maximum mapped by the Linux kernel during initialization.
43 */
44#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/
45
46/* size in bytes reserved for initial data */
47
48#include <asm/arch/config.h>
49/* There is no PHY directly connected so don't ask it for link status */
Chris Packhama6477f72018-06-25 22:34:57 +120050
51/*
Chris Packhama6477f72018-06-25 22:34:57 +120052 * Ethernet Driver configuration
53 */
54#ifdef CONFIG_CMD_NET
Chris Packhama6477f72018-06-25 22:34:57 +120055#define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */
56#define CONFIG_PHY_BASE_ADR 0x01
Chris Packhama6477f72018-06-25 22:34:57 +120057#endif /* CONFIG_CMD_NET */
58
Chris Packhama6477f72018-06-25 22:34:57 +120059#endif /* _CONFIG_SBX81LIFXCAT_H */