Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Giuseppe Pagano | 164d984 | 2013-11-28 12:32:48 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2011 Freescale Semiconductor, Inc. |
Giuseppe Pagano | 164d984 | 2013-11-28 12:32:48 +0100 | [diff] [blame] | 4 | */ |
| 5 | |
Stefano Babic | 552a848 | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 6 | #include <asm/mach-imx/iomux-v3.h> |
Giuseppe Pagano | 164d984 | 2013-11-28 12:32:48 +0100 | [diff] [blame] | 7 | #include <asm/arch/iomux.h> |
| 8 | #include <asm/io.h> |
Stefano Babic | f5514e4 | 2013-12-19 11:04:33 +0100 | [diff] [blame] | 9 | #include <asm/arch/clock.h> |
Tim Harvey | 22452fd | 2014-05-07 22:24:47 -0700 | [diff] [blame] | 10 | #include <asm/arch/sys_proto.h> |
Giuseppe Pagano | 164d984 | 2013-11-28 12:32:48 +0100 | [diff] [blame] | 11 | |
| 12 | int setup_sata(void) |
| 13 | { |
Fabio Estevam | 0a11d6f | 2014-07-09 17:59:54 -0300 | [diff] [blame] | 14 | struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; |
Tim Harvey | 22452fd | 2014-05-07 22:24:47 -0700 | [diff] [blame] | 15 | int ret; |
Giuseppe Pagano | 164d984 | 2013-11-28 12:32:48 +0100 | [diff] [blame] | 16 | |
Peng Fan | aff3756 | 2016-05-23 18:36:00 +0800 | [diff] [blame] | 17 | if (!is_mx6dq() && !is_mx6dqp()) |
Tim Harvey | 22452fd | 2014-05-07 22:24:47 -0700 | [diff] [blame] | 18 | return 1; |
| 19 | |
| 20 | ret = enable_sata_clock(); |
Giuseppe Pagano | 164d984 | 2013-11-28 12:32:48 +0100 | [diff] [blame] | 21 | if (ret) |
| 22 | return ret; |
| 23 | |
| 24 | clrsetbits_le32(&iomuxc_regs->gpr[13], |
| 25 | IOMUXC_GPR13_SATA_MASK, |
| 26 | IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB |
| 27 | |IOMUXC_GPR13_SATA_PHY_7_SATA2M |
| 28 | |IOMUXC_GPR13_SATA_SPEED_3G |
| 29 | |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT) |
| 30 | |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED |
| 31 | |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16 |
| 32 | |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB |
| 33 | |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V |
| 34 | |IOMUXC_GPR13_SATA_PHY_1_SLOW); |
| 35 | |
| 36 | return 0; |
| 37 | } |