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Mike Frysinger1c587432009-03-27 19:27:58 -04001/*
2 * Driver for SST serial flashes
3 *
4 * (C) Copyright 2000-2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Copyright 2008, Network Appliance Inc.
7 * Jason McMullan <mcmullan@netapp.com>
8 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
9 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
10 * Copyright (c) 2008-2009 Analog Devices Inc.
11 *
12 * Licensed under the GPL-2 or later.
13 */
14
15#include <common.h>
16#include <malloc.h>
17#include <spi_flash.h>
18
19#include "spi_flash_internal.h"
20
Mike Frysinger1c587432009-03-27 19:27:58 -040021#define CMD_SST_BP 0x02 /* Byte Program */
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053022#define CMD_SST_AAI_WP 0xAD /* Auto Address Incr Word Program */
Mike Frysinger1c587432009-03-27 19:27:58 -040023
24#define SST_SR_WIP (1 << 0) /* Write-in-Progress */
25#define SST_SR_WEL (1 << 1) /* Write enable */
26#define SST_SR_BP0 (1 << 2) /* Block Protection 0 */
27#define SST_SR_BP1 (1 << 3) /* Block Protection 1 */
28#define SST_SR_BP2 (1 << 4) /* Block Protection 2 */
29#define SST_SR_AAI (1 << 6) /* Addressing mode */
30#define SST_SR_BPL (1 << 7) /* BP bits lock */
31
Mike Frysinger8875bdb2011-04-25 06:59:54 +000032#define SST_FEAT_WP (1 << 0) /* Supports AAI word program */
33#define SST_FEAT_MBP (1 << 1) /* Supports multibyte program */
34
Mike Frysinger1c587432009-03-27 19:27:58 -040035struct sst_spi_flash_params {
36 u8 idcode1;
Mike Frysinger8875bdb2011-04-25 06:59:54 +000037 u8 flags;
Mike Frysinger1c587432009-03-27 19:27:58 -040038 u16 nr_sectors;
39 const char *name;
40};
41
42struct sst_spi_flash {
43 struct spi_flash flash;
44 const struct sst_spi_flash_params *params;
45};
46
Mike Frysinger1c587432009-03-27 19:27:58 -040047static const struct sst_spi_flash_params sst_spi_flash_table[] = {
48 {
Mike Frysingerdd541262009-06-19 03:27:28 -040049 .idcode1 = 0x8d,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000050 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040051 .nr_sectors = 128,
52 .name = "SST25VF040B",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053053 },
54 {
Mike Frysingerdd541262009-06-19 03:27:28 -040055 .idcode1 = 0x8e,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000056 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040057 .nr_sectors = 256,
58 .name = "SST25VF080B",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053059 },
60 {
Mike Frysingerdd541262009-06-19 03:27:28 -040061 .idcode1 = 0x41,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000062 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040063 .nr_sectors = 512,
64 .name = "SST25VF016B",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053065 },
66 {
Mike Frysingerdd541262009-06-19 03:27:28 -040067 .idcode1 = 0x4a,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000068 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040069 .nr_sectors = 1024,
70 .name = "SST25VF032B",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053071 },
72 {
James Kosin1c091f52011-04-13 15:12:18 -040073 .idcode1 = 0x4b,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000074 .flags = SST_FEAT_MBP,
James Kosin1c091f52011-04-13 15:12:18 -040075 .nr_sectors = 2048,
76 .name = "SST25VF064C",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053077 },
78 {
Mike Frysinger1c587432009-03-27 19:27:58 -040079 .idcode1 = 0x01,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000080 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -040081 .nr_sectors = 16,
Mike Frysinger1c587432009-03-27 19:27:58 -040082 .name = "SST25WF512",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053083 },
84 {
Mike Frysinger1c587432009-03-27 19:27:58 -040085 .idcode1 = 0x02,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000086 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -040087 .nr_sectors = 32,
Mike Frysinger1c587432009-03-27 19:27:58 -040088 .name = "SST25WF010",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053089 },
90 {
Mike Frysinger1c587432009-03-27 19:27:58 -040091 .idcode1 = 0x03,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000092 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -040093 .nr_sectors = 64,
Mike Frysinger1c587432009-03-27 19:27:58 -040094 .name = "SST25WF020",
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +053095 },
96 {
Mike Frysinger1c587432009-03-27 19:27:58 -040097 .idcode1 = 0x04,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000098 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -040099 .nr_sectors = 128,
Mike Frysinger1c587432009-03-27 19:27:58 -0400100 .name = "SST25WF040",
101 },
Jagannadha Sutradharudu Teki04e15642013-07-29 23:48:00 +0530102 {
103 .idcode1 = 0x05,
104 .flags = SST_FEAT_WP,
105 .nr_sectors = 256,
106 .name = "SST25WF080",
107 },
Mike Frysinger1c587432009-03-27 19:27:58 -0400108};
109
110static int
Mike Frysinger1c587432009-03-27 19:27:58 -0400111sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
112{
113 int ret;
114 u8 cmd[4] = {
115 CMD_SST_BP,
116 offset >> 16,
117 offset >> 8,
118 offset,
119 };
120
121 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
Jagannadha Sutradharudu Teki5928b9a2013-07-29 22:43:57 +0530122 spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
Mike Frysinger1c587432009-03-27 19:27:58 -0400123
Mike Frysinger7a6d2a72012-03-04 23:12:23 -0500124 ret = spi_flash_cmd_write_enable(flash);
Mike Frysinger1c587432009-03-27 19:27:58 -0400125 if (ret)
126 return ret;
127
128 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
129 if (ret)
130 return ret;
131
Mike Frysinger61630452011-01-10 02:20:12 -0500132 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
Mike Frysinger1c587432009-03-27 19:27:58 -0400133}
134
135static int
Mike Frysinger8875bdb2011-04-25 06:59:54 +0000136sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, const void *buf)
Mike Frysinger1c587432009-03-27 19:27:58 -0400137{
138 size_t actual, cmd_len;
139 int ret;
140 u8 cmd[4];
141
142 ret = spi_claim_bus(flash->spi);
143 if (ret) {
144 debug("SF: Unable to claim SPI bus\n");
145 return ret;
146 }
147
148 /* If the data is not word aligned, write out leading single byte */
149 actual = offset % 2;
150 if (actual) {
151 ret = sst_byte_write(flash, offset, buf);
152 if (ret)
153 goto done;
154 }
155 offset += actual;
156
Mike Frysinger7a6d2a72012-03-04 23:12:23 -0500157 ret = spi_flash_cmd_write_enable(flash);
Mike Frysinger1c587432009-03-27 19:27:58 -0400158 if (ret)
159 goto done;
160
161 cmd_len = 4;
162 cmd[0] = CMD_SST_AAI_WP;
163 cmd[1] = offset >> 16;
164 cmd[2] = offset >> 8;
165 cmd[3] = offset;
166
167 for (; actual < len - 1; actual += 2) {
168 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
Jagannadha Sutradharudu Teki5928b9a2013-07-29 22:43:57 +0530169 spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
170 cmd[0], offset);
Mike Frysinger1c587432009-03-27 19:27:58 -0400171
172 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
Jagannadha Sutradharudu Teki4f441482013-05-28 01:10:04 +0530173 buf + actual, 2);
Mike Frysinger1c587432009-03-27 19:27:58 -0400174 if (ret) {
175 debug("SF: sst word program failed\n");
176 break;
177 }
178
Mike Frysinger61630452011-01-10 02:20:12 -0500179 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
Mike Frysinger1c587432009-03-27 19:27:58 -0400180 if (ret)
181 break;
182
183 cmd_len = 1;
184 offset += 2;
185 }
186
187 if (!ret)
Mike Frysinger7a6d2a72012-03-04 23:12:23 -0500188 ret = spi_flash_cmd_write_disable(flash);
Mike Frysinger1c587432009-03-27 19:27:58 -0400189
190 /* If there is a single trailing byte, write it out */
191 if (!ret && actual != len)
192 ret = sst_byte_write(flash, offset, buf + actual);
193
194 done:
195 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
196 ret ? "failure" : "success", len, offset - actual);
197
198 spi_release_bus(flash->spi);
199 return ret;
200}
201
Mike Frysinger1c587432009-03-27 19:27:58 -0400202struct spi_flash *
203spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode)
204{
205 const struct sst_spi_flash_params *params;
206 struct sst_spi_flash *stm;
207 size_t i;
208
209 for (i = 0; i < ARRAY_SIZE(sst_spi_flash_table); ++i) {
210 params = &sst_spi_flash_table[i];
211 if (params->idcode1 == idcode[2])
212 break;
213 }
214
215 if (i == ARRAY_SIZE(sst_spi_flash_table)) {
216 debug("SF: Unsupported SST ID %02x\n", idcode[1]);
217 return NULL;
218 }
219
Simon Glassc0f87dd2013-03-11 06:08:03 +0000220 stm = spi_flash_alloc(struct sst_spi_flash, spi, params->name);
Mike Frysinger1c587432009-03-27 19:27:58 -0400221 if (!stm) {
222 debug("SF: Failed to allocate memory\n");
223 return NULL;
224 }
225
226 stm->params = params;
Mike Frysinger1c587432009-03-27 19:27:58 -0400227
Mike Frysinger8875bdb2011-04-25 06:59:54 +0000228 if (stm->params->flags & SST_FEAT_WP)
229 stm->flash.write = sst_write_wp;
Mike Frysingerc4e932c2012-03-04 22:35:50 -0500230 stm->flash.page_size = 256;
231 stm->flash.sector_size = 4096;
Richard Retanubun4e6a5152011-02-16 16:37:22 -0500232 stm->flash.size = stm->flash.sector_size * params->nr_sectors;
Mike Frysinger1c587432009-03-27 19:27:58 -0400233
234 /* Flash powers up read-only, so clear BP# bits */
Mike Frysinger41e17132012-03-04 23:18:17 -0500235 spi_flash_cmd_write_status(&stm->flash, 0);
Mike Frysinger1c587432009-03-27 19:27:58 -0400236
237 return &stm->flash;
238}