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Mike Frysinger1c587432009-03-27 19:27:58 -04001/*
2 * Driver for SST serial flashes
3 *
4 * (C) Copyright 2000-2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 * Copyright 2008, Network Appliance Inc.
7 * Jason McMullan <mcmullan@netapp.com>
8 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
9 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
10 * Copyright (c) 2008-2009 Analog Devices Inc.
11 *
12 * Licensed under the GPL-2 or later.
13 */
14
15#include <common.h>
16#include <malloc.h>
17#include <spi_flash.h>
18
19#include "spi_flash_internal.h"
20
21#define CMD_SST_WREN 0x06 /* Write Enable */
22#define CMD_SST_WRDI 0x04 /* Write Disable */
23#define CMD_SST_RDSR 0x05 /* Read Status Register */
24#define CMD_SST_WRSR 0x01 /* Write Status Register */
25#define CMD_SST_READ 0x03 /* Read Data Bytes */
26#define CMD_SST_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */
27#define CMD_SST_BP 0x02 /* Byte Program */
28#define CMD_SST_AAI_WP 0xAD /* Auto Address Increment Word Program */
29#define CMD_SST_SE 0x20 /* Sector Erase */
30
31#define SST_SR_WIP (1 << 0) /* Write-in-Progress */
32#define SST_SR_WEL (1 << 1) /* Write enable */
33#define SST_SR_BP0 (1 << 2) /* Block Protection 0 */
34#define SST_SR_BP1 (1 << 3) /* Block Protection 1 */
35#define SST_SR_BP2 (1 << 4) /* Block Protection 2 */
36#define SST_SR_AAI (1 << 6) /* Addressing mode */
37#define SST_SR_BPL (1 << 7) /* BP bits lock */
38
Mike Frysinger8875bdb2011-04-25 06:59:54 +000039#define SST_FEAT_WP (1 << 0) /* Supports AAI word program */
40#define SST_FEAT_MBP (1 << 1) /* Supports multibyte program */
41
Mike Frysinger1c587432009-03-27 19:27:58 -040042struct sst_spi_flash_params {
43 u8 idcode1;
Mike Frysinger8875bdb2011-04-25 06:59:54 +000044 u8 flags;
Mike Frysinger1c587432009-03-27 19:27:58 -040045 u16 nr_sectors;
46 const char *name;
47};
48
49struct sst_spi_flash {
50 struct spi_flash flash;
51 const struct sst_spi_flash_params *params;
52};
53
54static inline struct sst_spi_flash *to_sst_spi_flash(struct spi_flash *flash)
55{
56 return container_of(flash, struct sst_spi_flash, flash);
57}
58
59#define SST_SECTOR_SIZE (4 * 1024)
Mike Frysinger8875bdb2011-04-25 06:59:54 +000060#define SST_PAGE_SIZE 256
Mike Frysinger1c587432009-03-27 19:27:58 -040061static const struct sst_spi_flash_params sst_spi_flash_table[] = {
62 {
Mike Frysingerdd541262009-06-19 03:27:28 -040063 .idcode1 = 0x8d,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000064 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040065 .nr_sectors = 128,
66 .name = "SST25VF040B",
67 },{
68 .idcode1 = 0x8e,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000069 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040070 .nr_sectors = 256,
71 .name = "SST25VF080B",
72 },{
73 .idcode1 = 0x41,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000074 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040075 .nr_sectors = 512,
76 .name = "SST25VF016B",
77 },{
78 .idcode1 = 0x4a,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000079 .flags = SST_FEAT_WP,
Mike Frysingerdd541262009-06-19 03:27:28 -040080 .nr_sectors = 1024,
81 .name = "SST25VF032B",
82 },{
James Kosin1c091f52011-04-13 15:12:18 -040083 .idcode1 = 0x4b,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000084 .flags = SST_FEAT_MBP,
James Kosin1c091f52011-04-13 15:12:18 -040085 .nr_sectors = 2048,
86 .name = "SST25VF064C",
87 },{
Mike Frysinger1c587432009-03-27 19:27:58 -040088 .idcode1 = 0x01,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000089 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -040090 .nr_sectors = 16,
Mike Frysinger1c587432009-03-27 19:27:58 -040091 .name = "SST25WF512",
92 },{
93 .idcode1 = 0x02,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000094 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -040095 .nr_sectors = 32,
Mike Frysinger1c587432009-03-27 19:27:58 -040096 .name = "SST25WF010",
97 },{
98 .idcode1 = 0x03,
Mike Frysinger8875bdb2011-04-25 06:59:54 +000099 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -0400100 .nr_sectors = 64,
Mike Frysinger1c587432009-03-27 19:27:58 -0400101 .name = "SST25WF020",
102 },{
103 .idcode1 = 0x04,
Mike Frysinger8875bdb2011-04-25 06:59:54 +0000104 .flags = SST_FEAT_WP,
Mike Frysinger7d907f02009-06-19 03:20:06 -0400105 .nr_sectors = 128,
Mike Frysinger1c587432009-03-27 19:27:58 -0400106 .name = "SST25WF040",
107 },
108};
109
110static int
Mike Frysinger1c587432009-03-27 19:27:58 -0400111sst_enable_writing(struct spi_flash *flash)
112{
Mike Frysinger2744a4e2011-04-23 23:05:55 +0000113 int ret = spi_flash_cmd_write_enable(flash);
Mike Frysinger1c587432009-03-27 19:27:58 -0400114 if (ret)
115 debug("SF: Enabling Write failed\n");
116 return ret;
117}
118
119static int
120sst_disable_writing(struct spi_flash *flash)
121{
Mike Frysinger66ecb7c2011-04-25 06:59:53 +0000122 int ret = spi_flash_cmd_write_disable(flash);
Mike Frysinger1c587432009-03-27 19:27:58 -0400123 if (ret)
124 debug("SF: Disabling Write failed\n");
125 return ret;
126}
127
128static int
Mike Frysinger1c587432009-03-27 19:27:58 -0400129sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
130{
131 int ret;
132 u8 cmd[4] = {
133 CMD_SST_BP,
134 offset >> 16,
135 offset >> 8,
136 offset,
137 };
138
139 debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
140 spi_w8r8(flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
141
142 ret = sst_enable_writing(flash);
143 if (ret)
144 return ret;
145
146 ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
147 if (ret)
148 return ret;
149
Mike Frysinger61630452011-01-10 02:20:12 -0500150 return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
Mike Frysinger1c587432009-03-27 19:27:58 -0400151}
152
153static int
Mike Frysinger8875bdb2011-04-25 06:59:54 +0000154sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, const void *buf)
Mike Frysinger1c587432009-03-27 19:27:58 -0400155{
156 size_t actual, cmd_len;
157 int ret;
158 u8 cmd[4];
159
160 ret = spi_claim_bus(flash->spi);
161 if (ret) {
162 debug("SF: Unable to claim SPI bus\n");
163 return ret;
164 }
165
166 /* If the data is not word aligned, write out leading single byte */
167 actual = offset % 2;
168 if (actual) {
169 ret = sst_byte_write(flash, offset, buf);
170 if (ret)
171 goto done;
172 }
173 offset += actual;
174
175 ret = sst_enable_writing(flash);
176 if (ret)
177 goto done;
178
179 cmd_len = 4;
180 cmd[0] = CMD_SST_AAI_WP;
181 cmd[1] = offset >> 16;
182 cmd[2] = offset >> 8;
183 cmd[3] = offset;
184
185 for (; actual < len - 1; actual += 2) {
186 debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
187 spi_w8r8(flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
188 offset);
189
190 ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
191 buf + actual, 2);
192 if (ret) {
193 debug("SF: sst word program failed\n");
194 break;
195 }
196
Mike Frysinger61630452011-01-10 02:20:12 -0500197 ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
Mike Frysinger1c587432009-03-27 19:27:58 -0400198 if (ret)
199 break;
200
201 cmd_len = 1;
202 offset += 2;
203 }
204
205 if (!ret)
206 ret = sst_disable_writing(flash);
207
208 /* If there is a single trailing byte, write it out */
209 if (!ret && actual != len)
210 ret = sst_byte_write(flash, offset, buf + actual);
211
212 done:
213 debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
214 ret ? "failure" : "success", len, offset - actual);
215
216 spi_release_bus(flash->spi);
217 return ret;
218}
219
Mike Frysingerf8f07572011-04-12 01:51:29 -0400220static int sst_erase(struct spi_flash *flash, u32 offset, size_t len)
Mike Frysinger1c587432009-03-27 19:27:58 -0400221{
Richard Retanubun4e6a5152011-02-16 16:37:22 -0500222 return spi_flash_cmd_erase(flash, CMD_SST_SE, offset, len);
Mike Frysinger1c587432009-03-27 19:27:58 -0400223}
224
225static int
226sst_unlock(struct spi_flash *flash)
227{
228 int ret;
229 u8 cmd, status;
230
231 ret = sst_enable_writing(flash);
232 if (ret)
233 return ret;
234
235 cmd = CMD_SST_WRSR;
236 status = 0;
237 ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &status, 1);
238 if (ret)
239 debug("SF: Unable to set status byte\n");
240
241 debug("SF: sst: status = %x\n", spi_w8r8(flash->spi, CMD_SST_RDSR));
242
243 return ret;
244}
245
246struct spi_flash *
247spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode)
248{
249 const struct sst_spi_flash_params *params;
250 struct sst_spi_flash *stm;
251 size_t i;
252
253 for (i = 0; i < ARRAY_SIZE(sst_spi_flash_table); ++i) {
254 params = &sst_spi_flash_table[i];
255 if (params->idcode1 == idcode[2])
256 break;
257 }
258
259 if (i == ARRAY_SIZE(sst_spi_flash_table)) {
260 debug("SF: Unsupported SST ID %02x\n", idcode[1]);
261 return NULL;
262 }
263
264 stm = malloc(sizeof(*stm));
265 if (!stm) {
266 debug("SF: Failed to allocate memory\n");
267 return NULL;
268 }
269
270 stm->params = params;
271 stm->flash.spi = spi;
272 stm->flash.name = params->name;
273
Mike Frysinger8875bdb2011-04-25 06:59:54 +0000274 if (stm->params->flags & SST_FEAT_WP)
275 stm->flash.write = sst_write_wp;
276 else
277 stm->flash.write = spi_flash_cmd_write_multi;
Mike Frysinger1c587432009-03-27 19:27:58 -0400278 stm->flash.erase = sst_erase;
Mike Frysingerc5910872011-04-12 01:34:55 -0400279 stm->flash.read = spi_flash_cmd_read_fast;
Mike Frysinger8875bdb2011-04-25 06:59:54 +0000280 stm->flash.page_size = SST_PAGE_SIZE;
Richard Retanubun4e6a5152011-02-16 16:37:22 -0500281 stm->flash.sector_size = SST_SECTOR_SIZE;
282 stm->flash.size = stm->flash.sector_size * params->nr_sectors;
Mike Frysinger1c587432009-03-27 19:27:58 -0400283
284 /* Flash powers up read-only, so clear BP# bits */
285 sst_unlock(&stm->flash);
286
287 return &stm->flash;
288}