blob: 7183afcff2af52eafcd6b3f9d9c2b4d9c03509f9 [file] [log] [blame]
Andy Fleming272cc702008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming272cc702008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Sjoerd Simons8e3332e2015-08-30 16:55:45 -060013#include <dm.h>
14#include <dm/device-internal.h>
Stephen Warrend4622df2014-05-23 12:47:06 -060015#include <errno.h>
Andy Fleming272cc702008-10-30 16:41:01 -050016#include <mmc.h>
17#include <part.h>
18#include <malloc.h>
Simon Glasscf92e052015-09-02 17:24:58 -060019#include <memalign.h>
Andy Fleming272cc702008-10-30 16:41:01 -050020#include <linux/list.h>
Rabin Vincent9b1f9422009-04-05 13:30:54 +053021#include <div64.h>
Paul Burtonda61fa52013-09-09 15:30:26 +010022#include "mmc_private.h"
Andy Fleming272cc702008-10-30 16:41:01 -050023
Jeroen Hofstee750121c2014-07-12 21:24:08 +020024__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000025{
26 return -1;
27}
28
29int mmc_getwp(struct mmc *mmc)
30{
31 int wp;
32
33 wp = board_mmc_getwp(mmc);
34
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000035 if (wp < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020036 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000038 else
39 wp = 0;
40 }
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000041
42 return wp;
43}
44
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +020045__weak int board_mmc_getcd(struct mmc *mmc)
46{
Stefano Babic11fdade2010-02-05 15:04:43 +010047 return -1;
48}
49
Paul Burtonda61fa52013-09-09 15:30:26 +010050int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
Andy Fleming272cc702008-10-30 16:41:01 -050051{
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000052 int ret;
Marek Vasut8635ff92012-03-15 18:41:35 +000053
Marek Vasut8635ff92012-03-15 18:41:35 +000054#ifdef CONFIG_MMC_TRACE
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000055 int i;
56 u8 *ptr;
57
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020060 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Bin Meng7863ce52016-03-17 21:53:14 -070061 if (ret) {
62 printf("\t\tRET\t\t\t %d\n", ret);
63 } else {
64 switch (cmd->resp_type) {
65 case MMC_RSP_NONE:
66 printf("\t\tMMC_RSP_NONE\n");
67 break;
68 case MMC_RSP_R1:
69 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
70 cmd->response[0]);
71 break;
72 case MMC_RSP_R1b:
73 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
74 cmd->response[0]);
75 break;
76 case MMC_RSP_R2:
77 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
78 cmd->response[0]);
79 printf("\t\t \t\t 0x%08X \n",
80 cmd->response[1]);
81 printf("\t\t \t\t 0x%08X \n",
82 cmd->response[2]);
83 printf("\t\t \t\t 0x%08X \n",
84 cmd->response[3]);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000085 printf("\n");
Bin Meng7863ce52016-03-17 21:53:14 -070086 printf("\t\t\t\t\tDUMPING DATA\n");
87 for (i = 0; i < 4; i++) {
88 int j;
89 printf("\t\t\t\t\t%03d - ", i*4);
90 ptr = (u8 *)&cmd->response[i];
91 ptr += 3;
92 for (j = 0; j < 4; j++)
93 printf("%02X ", *ptr--);
94 printf("\n");
95 }
96 break;
97 case MMC_RSP_R3:
98 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
99 cmd->response[0]);
100 break;
101 default:
102 printf("\t\tERROR MMC rsp not supported\n");
103 break;
Bin Meng53e8e402016-03-17 21:53:13 -0700104 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000105 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000106#else
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200107 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000108#endif
Marek Vasut8635ff92012-03-15 18:41:35 +0000109 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500110}
111
Paul Burtonda61fa52013-09-09 15:30:26 +0100112int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000113{
114 struct mmc_cmd cmd;
Jan Kloetzked617c422012-02-05 22:29:12 +0000115 int err, retries = 5;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000116#ifdef CONFIG_MMC_TRACE
117 int status;
118#endif
119
120 cmd.cmdidx = MMC_CMD_SEND_STATUS;
121 cmd.resp_type = MMC_RSP_R1;
Marek Vasutaaf3d412011-08-10 09:24:48 +0200122 if (!mmc_host_is_spi(mmc))
123 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000124
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500125 while (1) {
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000126 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzked617c422012-02-05 22:29:12 +0000127 if (!err) {
128 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
129 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
130 MMC_STATE_PRG)
131 break;
132 else if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton56196822013-09-04 16:12:25 +0100133#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzked617c422012-02-05 22:29:12 +0000134 printf("Status Error: 0x%08X\n",
135 cmd.response[0]);
Paul Burton56196822013-09-04 16:12:25 +0100136#endif
Jan Kloetzked617c422012-02-05 22:29:12 +0000137 return COMM_ERR;
138 }
139 } else if (--retries < 0)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000140 return err;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000141
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500142 if (timeout-- <= 0)
143 break;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000144
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500145 udelay(1000);
146 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000147
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000148#ifdef CONFIG_MMC_TRACE
149 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
150 printf("CURR STATE:%d\n", status);
151#endif
Jongman Heo5b0c9422012-06-03 21:32:13 +0000152 if (timeout <= 0) {
Paul Burton56196822013-09-04 16:12:25 +0100153#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000154 printf("Timeout waiting card ready\n");
Paul Burton56196822013-09-04 16:12:25 +0100155#endif
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000156 return TIMEOUT;
157 }
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500158 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
159 return SWITCH_ERR;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000160
161 return 0;
162}
163
Paul Burtonda61fa52013-09-09 15:30:26 +0100164int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Fleming272cc702008-10-30 16:41:01 -0500165{
166 struct mmc_cmd cmd;
167
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600168 if (mmc->ddr_mode)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900169 return 0;
170
Andy Fleming272cc702008-10-30 16:41:01 -0500171 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
172 cmd.resp_type = MMC_RSP_R1;
173 cmd.cmdarg = len;
Andy Fleming272cc702008-10-30 16:41:01 -0500174
175 return mmc_send_cmd(mmc, &cmd, NULL);
176}
177
Sascha Silbeff8fef52013-06-14 13:07:25 +0200178static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000179 lbaint_t blkcnt)
Andy Fleming272cc702008-10-30 16:41:01 -0500180{
181 struct mmc_cmd cmd;
182 struct mmc_data data;
183
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700184 if (blkcnt > 1)
185 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
186 else
187 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Fleming272cc702008-10-30 16:41:01 -0500188
189 if (mmc->high_capacity)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700190 cmd.cmdarg = start;
Andy Fleming272cc702008-10-30 16:41:01 -0500191 else
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700192 cmd.cmdarg = start * mmc->read_bl_len;
Andy Fleming272cc702008-10-30 16:41:01 -0500193
194 cmd.resp_type = MMC_RSP_R1;
Andy Fleming272cc702008-10-30 16:41:01 -0500195
196 data.dest = dst;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700197 data.blocks = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500198 data.blocksize = mmc->read_bl_len;
199 data.flags = MMC_DATA_READ;
200
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700201 if (mmc_send_cmd(mmc, &cmd, &data))
202 return 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500203
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700204 if (blkcnt > 1) {
205 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
206 cmd.cmdarg = 0;
207 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700208 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton56196822013-09-04 16:12:25 +0100209#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700210 printf("mmc fail to send stop cmd\n");
Paul Burton56196822013-09-04 16:12:25 +0100211#endif
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700212 return 0;
213 }
Andy Fleming272cc702008-10-30 16:41:01 -0500214 }
215
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700216 return blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500217}
218
Simon Glass4101f682016-02-29 15:25:34 -0700219static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
Stephen Warren7c4213f2015-12-07 11:38:48 -0700220 lbaint_t blkcnt, void *dst)
Andy Fleming272cc702008-10-30 16:41:01 -0500221{
Simon Glassbcce53d2016-02-29 15:25:51 -0700222 int dev_num = block_dev->devnum;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700223 int err;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700224 lbaint_t cur, blocks_todo = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500225
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700226 if (blkcnt == 0)
227 return 0;
228
229 struct mmc *mmc = find_mmc_device(dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500230 if (!mmc)
231 return 0;
232
Simon Glass69f45cd2016-05-01 13:52:29 -0600233 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
Stephen Warren873cc1d2015-12-07 11:38:49 -0700234 if (err < 0)
235 return 0;
236
Simon Glassc40fdca2016-05-01 13:52:35 -0600237 if ((start + blkcnt) > block_dev->lba) {
Paul Burton56196822013-09-04 16:12:25 +0100238#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbeff8fef52013-06-14 13:07:25 +0200239 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Simon Glassc40fdca2016-05-01 13:52:35 -0600240 start + blkcnt, block_dev->lba);
Paul Burton56196822013-09-04 16:12:25 +0100241#endif
Lei Wend2bf29e2010-09-13 22:07:27 +0800242 return 0;
243 }
Andy Fleming272cc702008-10-30 16:41:01 -0500244
Simon Glass11692992015-06-23 15:38:50 -0600245 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
246 debug("%s: Failed to set blocklen\n", __func__);
Andy Fleming272cc702008-10-30 16:41:01 -0500247 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600248 }
Andy Fleming272cc702008-10-30 16:41:01 -0500249
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700250 do {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200251 cur = (blocks_todo > mmc->cfg->b_max) ?
252 mmc->cfg->b_max : blocks_todo;
Simon Glass11692992015-06-23 15:38:50 -0600253 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
254 debug("%s: Failed to read blocks\n", __func__);
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700255 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600256 }
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700257 blocks_todo -= cur;
258 start += cur;
259 dst += cur * mmc->read_bl_len;
260 } while (blocks_todo > 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500261
262 return blkcnt;
263}
264
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000265static int mmc_go_idle(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500266{
267 struct mmc_cmd cmd;
268 int err;
269
270 udelay(1000);
271
272 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
273 cmd.cmdarg = 0;
274 cmd.resp_type = MMC_RSP_NONE;
Andy Fleming272cc702008-10-30 16:41:01 -0500275
276 err = mmc_send_cmd(mmc, &cmd, NULL);
277
278 if (err)
279 return err;
280
281 udelay(2000);
282
283 return 0;
284}
285
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000286static int sd_send_op_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500287{
288 int timeout = 1000;
289 int err;
290 struct mmc_cmd cmd;
291
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500292 while (1) {
Andy Fleming272cc702008-10-30 16:41:01 -0500293 cmd.cmdidx = MMC_CMD_APP_CMD;
294 cmd.resp_type = MMC_RSP_R1;
295 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500296
297 err = mmc_send_cmd(mmc, &cmd, NULL);
298
299 if (err)
300 return err;
301
302 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
303 cmd.resp_type = MMC_RSP_R3;
Stefano Babic250de122010-01-20 18:20:39 +0100304
305 /*
306 * Most cards do not answer if some reserved bits
307 * in the ocr are set. However, Some controller
308 * can set bit 7 (reserved for low voltages), but
309 * how to manage low voltages SD card is not yet
310 * specified.
311 */
Thomas Choud52ebf12010-12-24 13:12:21 +0000312 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200313 (mmc->cfg->voltages & 0xff8000);
Andy Fleming272cc702008-10-30 16:41:01 -0500314
315 if (mmc->version == SD_VERSION_2)
316 cmd.cmdarg |= OCR_HCS;
317
318 err = mmc_send_cmd(mmc, &cmd, NULL);
319
320 if (err)
321 return err;
322
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500323 if (cmd.response[0] & OCR_BUSY)
324 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500325
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500326 if (timeout-- <= 0)
327 return UNUSABLE_ERR;
328
329 udelay(1000);
330 }
Andy Fleming272cc702008-10-30 16:41:01 -0500331
332 if (mmc->version != SD_VERSION_2)
333 mmc->version = SD_VERSION_1_0;
334
Thomas Choud52ebf12010-12-24 13:12:21 +0000335 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
336 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
337 cmd.resp_type = MMC_RSP_R3;
338 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000339
340 err = mmc_send_cmd(mmc, &cmd, NULL);
341
342 if (err)
343 return err;
344 }
345
Rabin Vincent998be3d2009-04-05 13:30:56 +0530346 mmc->ocr = cmd.response[0];
Andy Fleming272cc702008-10-30 16:41:01 -0500347
348 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
349 mmc->rca = 0;
350
351 return 0;
352}
353
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500354static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
Andy Fleming272cc702008-10-30 16:41:01 -0500355{
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500356 struct mmc_cmd cmd;
Andy Fleming272cc702008-10-30 16:41:01 -0500357 int err;
358
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500359 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd.resp_type = MMC_RSP_R3;
361 cmd.cmdarg = 0;
Rob Herring5a203972015-03-23 17:56:59 -0500362 if (use_arg && !mmc_host_is_spi(mmc))
363 cmd.cmdarg = OCR_HCS |
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200364 (mmc->cfg->voltages &
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500365 (mmc->ocr & OCR_VOLTAGE_MASK)) |
366 (mmc->ocr & OCR_ACCESS_MODE);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000367
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500368 err = mmc_send_cmd(mmc, &cmd, NULL);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000369 if (err)
370 return err;
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500371 mmc->ocr = cmd.response[0];
Che-Liang Chioue9550442012-11-28 15:21:13 +0000372 return 0;
373}
374
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200375static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000376{
Che-Liang Chioue9550442012-11-28 15:21:13 +0000377 int err, i;
378
Andy Fleming272cc702008-10-30 16:41:01 -0500379 /* Some cards seem to need this */
380 mmc_go_idle(mmc);
381
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000382 /* Asking to the card its capabilities */
Che-Liang Chioue9550442012-11-28 15:21:13 +0000383 for (i = 0; i < 2; i++) {
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500384 err = mmc_send_op_cond_iter(mmc, i != 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500385 if (err)
386 return err;
387
Che-Liang Chioue9550442012-11-28 15:21:13 +0000388 /* exit if not busy (flag seems to be inverted) */
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500389 if (mmc->ocr & OCR_BUSY)
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500390 break;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000391 }
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500392 mmc->op_cond_pending = 1;
393 return 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000394}
Andy Fleming272cc702008-10-30 16:41:01 -0500395
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200396static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000397{
398 struct mmc_cmd cmd;
399 int timeout = 1000;
400 uint start;
401 int err;
402
403 mmc->op_cond_pending = 0;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500404 if (!(mmc->ocr & OCR_BUSY)) {
405 start = get_timer(0);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500406 while (1) {
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500407 err = mmc_send_op_cond_iter(mmc, 1);
408 if (err)
409 return err;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500410 if (mmc->ocr & OCR_BUSY)
411 break;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500412 if (get_timer(start) > timeout)
413 return UNUSABLE_ERR;
414 udelay(100);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500415 }
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500416 }
Andy Fleming272cc702008-10-30 16:41:01 -0500417
Thomas Choud52ebf12010-12-24 13:12:21 +0000418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
421 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000422
423 err = mmc_send_cmd(mmc, &cmd, NULL);
424
425 if (err)
426 return err;
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500427
428 mmc->ocr = cmd.response[0];
Thomas Choud52ebf12010-12-24 13:12:21 +0000429 }
430
Andy Fleming272cc702008-10-30 16:41:01 -0500431 mmc->version = MMC_VERSION_UNKNOWN;
Andy Fleming272cc702008-10-30 16:41:01 -0500432
433 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrendef816a2014-01-30 16:11:12 -0700434 mmc->rca = 1;
Andy Fleming272cc702008-10-30 16:41:01 -0500435
436 return 0;
437}
438
439
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000440static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Fleming272cc702008-10-30 16:41:01 -0500441{
442 struct mmc_cmd cmd;
443 struct mmc_data data;
444 int err;
445
446 /* Get the Card Status Register */
447 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
448 cmd.resp_type = MMC_RSP_R1;
449 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500450
Yoshihiro Shimodacdfd1ac2012-06-07 19:09:11 +0000451 data.dest = (char *)ext_csd;
Andy Fleming272cc702008-10-30 16:41:01 -0500452 data.blocks = 1;
Simon Glass8bfa1952013-04-03 08:54:30 +0000453 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -0500454 data.flags = MMC_DATA_READ;
455
456 err = mmc_send_cmd(mmc, &cmd, &data);
457
458 return err;
459}
460
461
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000462static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Fleming272cc702008-10-30 16:41:01 -0500463{
464 struct mmc_cmd cmd;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000465 int timeout = 1000;
466 int ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500467
468 cmd.cmdidx = MMC_CMD_SWITCH;
469 cmd.resp_type = MMC_RSP_R1b;
470 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000471 (index << 16) |
472 (value << 8);
Andy Fleming272cc702008-10-30 16:41:01 -0500473
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000474 ret = mmc_send_cmd(mmc, &cmd, NULL);
475
476 /* Waiting for the ready status */
Jan Kloetzke93ad0d12012-02-05 22:29:11 +0000477 if (!ret)
478 ret = mmc_send_status(mmc, timeout);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000479
480 return ret;
481
Andy Fleming272cc702008-10-30 16:41:01 -0500482}
483
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000484static int mmc_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500485{
Simon Glass8bfa1952013-04-03 08:54:30 +0000486 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Andy Fleming272cc702008-10-30 16:41:01 -0500487 char cardtype;
488 int err;
489
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600490 mmc->card_caps = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500491
Thomas Choud52ebf12010-12-24 13:12:21 +0000492 if (mmc_host_is_spi(mmc))
493 return 0;
494
Andy Fleming272cc702008-10-30 16:41:01 -0500495 /* Only version 4 supports high-speed */
496 if (mmc->version < MMC_VERSION_4)
497 return 0;
498
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600499 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
500
Andy Fleming272cc702008-10-30 16:41:01 -0500501 err = mmc_send_ext_csd(mmc, ext_csd);
502
503 if (err)
504 return err;
505
Lei Wen0560db12011-10-03 20:35:10 +0000506 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -0500507
508 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
509
510 if (err)
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500511 return err == SWITCH_ERR ? 0 : err;
Andy Fleming272cc702008-10-30 16:41:01 -0500512
513 /* Now check to see that it worked */
514 err = mmc_send_ext_csd(mmc, ext_csd);
515
516 if (err)
517 return err;
518
519 /* No high-speed support */
Lei Wen0560db12011-10-03 20:35:10 +0000520 if (!ext_csd[EXT_CSD_HS_TIMING])
Andy Fleming272cc702008-10-30 16:41:01 -0500521 return 0;
522
523 /* High Speed is set, there are two types: 52MHz and 26MHz */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900524 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Andrew Gabbasov201d5ac2014-12-01 06:59:10 -0600525 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900526 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Andy Fleming272cc702008-10-30 16:41:01 -0500527 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900528 } else {
Andy Fleming272cc702008-10-30 16:41:01 -0500529 mmc->card_caps |= MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900530 }
Andy Fleming272cc702008-10-30 16:41:01 -0500531
532 return 0;
533}
534
Stephen Warrenf866a462013-06-11 15:14:01 -0600535static int mmc_set_capacity(struct mmc *mmc, int part_num)
536{
537 switch (part_num) {
538 case 0:
539 mmc->capacity = mmc->capacity_user;
540 break;
541 case 1:
542 case 2:
543 mmc->capacity = mmc->capacity_boot;
544 break;
545 case 3:
546 mmc->capacity = mmc->capacity_rpmb;
547 break;
548 case 4:
549 case 5:
550 case 6:
551 case 7:
552 mmc->capacity = mmc->capacity_gp[part_num - 4];
553 break;
554 default:
555 return -1;
556 }
557
Simon Glassc40fdca2016-05-01 13:52:35 -0600558 mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Stephen Warrenf866a462013-06-11 15:14:01 -0600559
560 return 0;
561}
562
Simon Glassfdbb1392016-05-01 13:52:37 -0600563static int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
Lei Wenbc897b12011-05-02 16:26:26 +0000564{
Stephen Warrenf866a462013-06-11 15:14:01 -0600565 int ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000566
Stephen Warrenf866a462013-06-11 15:14:01 -0600567 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
568 (mmc->part_config & ~PART_ACCESS_MASK)
569 | (part_num & PART_ACCESS_MASK));
Stephen Warrenf866a462013-06-11 15:14:01 -0600570
Peter Bigot6dc93e72014-09-02 18:31:23 -0500571 /*
572 * Set the capacity if the switch succeeded or was intended
573 * to return to representing the raw device.
574 */
Stephen Warren873cc1d2015-12-07 11:38:49 -0700575 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
Peter Bigot6dc93e72014-09-02 18:31:23 -0500576 ret = mmc_set_capacity(mmc, part_num);
Simon Glassfdbb1392016-05-01 13:52:37 -0600577 mmc_get_blk_desc(mmc)->hwpart = part_num;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700578 }
Peter Bigot6dc93e72014-09-02 18:31:23 -0500579
580 return ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000581}
582
Simon Glasse17d1142016-05-01 13:52:26 -0600583static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)
584{
585 struct mmc *mmc = find_mmc_device(desc->devnum);
586 int ret;
587
588 if (!mmc)
589 return -ENODEV;
590
591 if (mmc->block_dev.hwpart == hwpart)
592 return 0;
593
594 if (mmc->part_config == MMCPART_NOAVAILABLE)
595 return -EMEDIUMTYPE;
596
Simon Glassfdbb1392016-05-01 13:52:37 -0600597 ret = mmc_switch_part(mmc, hwpart);
Simon Glasse17d1142016-05-01 13:52:26 -0600598 if (ret)
599 return ret;
600
601 return 0;
602}
603
Simon Glassff3882a2016-05-01 13:52:25 -0600604int mmc_select_hwpart(int dev_num, int hwpart)
605{
606 struct mmc *mmc = find_mmc_device(dev_num);
607 int ret;
608
609 if (!mmc)
610 return -ENODEV;
611
612 if (mmc->block_dev.hwpart == hwpart)
613 return 0;
614
615 if (mmc->part_config == MMCPART_NOAVAILABLE)
616 return -EMEDIUMTYPE;
617
Simon Glassfdbb1392016-05-01 13:52:37 -0600618 ret = mmc_switch_part(mmc, hwpart);
Simon Glassff3882a2016-05-01 13:52:25 -0600619 if (ret)
620 return ret;
621
622 return 0;
623}
624
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100625int mmc_hwpart_config(struct mmc *mmc,
626 const struct mmc_hwpart_conf *conf,
627 enum mmc_hwpart_conf_mode mode)
628{
629 u8 part_attrs = 0;
630 u32 enh_size_mult;
631 u32 enh_start_addr;
632 u32 gp_size_mult[4];
633 u32 max_enh_size_mult;
634 u32 tot_enh_size_mult = 0;
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100635 u8 wr_rel_set;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100636 int i, pidx, err;
637 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
638
639 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
640 return -EINVAL;
641
642 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
643 printf("eMMC >= 4.4 required for enhanced user data area\n");
644 return -EMEDIUMTYPE;
645 }
646
647 if (!(mmc->part_support & PART_SUPPORT)) {
648 printf("Card does not support partitioning\n");
649 return -EMEDIUMTYPE;
650 }
651
652 if (!mmc->hc_wp_grp_size) {
653 printf("Card does not define HC WP group size\n");
654 return -EMEDIUMTYPE;
655 }
656
657 /* check partition alignment and total enhanced size */
658 if (conf->user.enh_size) {
659 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
660 conf->user.enh_start % mmc->hc_wp_grp_size) {
661 printf("User data enhanced area not HC WP group "
662 "size aligned\n");
663 return -EINVAL;
664 }
665 part_attrs |= EXT_CSD_ENH_USR;
666 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
667 if (mmc->high_capacity) {
668 enh_start_addr = conf->user.enh_start;
669 } else {
670 enh_start_addr = (conf->user.enh_start << 9);
671 }
672 } else {
673 enh_size_mult = 0;
674 enh_start_addr = 0;
675 }
676 tot_enh_size_mult += enh_size_mult;
677
678 for (pidx = 0; pidx < 4; pidx++) {
679 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
680 printf("GP%i partition not HC WP group size "
681 "aligned\n", pidx+1);
682 return -EINVAL;
683 }
684 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
685 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
686 part_attrs |= EXT_CSD_ENH_GP(pidx);
687 tot_enh_size_mult += gp_size_mult[pidx];
688 }
689 }
690
691 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
692 printf("Card does not support enhanced attribute\n");
693 return -EMEDIUMTYPE;
694 }
695
696 err = mmc_send_ext_csd(mmc, ext_csd);
697 if (err)
698 return err;
699
700 max_enh_size_mult =
701 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
702 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
703 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
704 if (tot_enh_size_mult > max_enh_size_mult) {
705 printf("Total enhanced size exceeds maximum (%u > %u)\n",
706 tot_enh_size_mult, max_enh_size_mult);
707 return -EMEDIUMTYPE;
708 }
709
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100710 /* The default value of EXT_CSD_WR_REL_SET is device
711 * dependent, the values can only be changed if the
712 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
713 * changed only once and before partitioning is completed. */
714 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
715 if (conf->user.wr_rel_change) {
716 if (conf->user.wr_rel_set)
717 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
718 else
719 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
720 }
721 for (pidx = 0; pidx < 4; pidx++) {
722 if (conf->gp_part[pidx].wr_rel_change) {
723 if (conf->gp_part[pidx].wr_rel_set)
724 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
725 else
726 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
727 }
728 }
729
730 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
731 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
732 puts("Card does not support host controlled partition write "
733 "reliability settings\n");
734 return -EMEDIUMTYPE;
735 }
736
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100737 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
738 EXT_CSD_PARTITION_SETTING_COMPLETED) {
739 printf("Card already partitioned\n");
740 return -EPERM;
741 }
742
743 if (mode == MMC_HWPART_CONF_CHECK)
744 return 0;
745
746 /* Partitioning requires high-capacity size definitions */
747 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
748 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
749 EXT_CSD_ERASE_GROUP_DEF, 1);
750
751 if (err)
752 return err;
753
754 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
755
756 /* update erase group size to be high-capacity */
757 mmc->erase_grp_size =
758 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
759
760 }
761
762 /* all OK, write the configuration */
763 for (i = 0; i < 4; i++) {
764 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
765 EXT_CSD_ENH_START_ADDR+i,
766 (enh_start_addr >> (i*8)) & 0xFF);
767 if (err)
768 return err;
769 }
770 for (i = 0; i < 3; i++) {
771 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
772 EXT_CSD_ENH_SIZE_MULT+i,
773 (enh_size_mult >> (i*8)) & 0xFF);
774 if (err)
775 return err;
776 }
777 for (pidx = 0; pidx < 4; pidx++) {
778 for (i = 0; i < 3; i++) {
779 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
780 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
781 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
782 if (err)
783 return err;
784 }
785 }
786 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
787 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
788 if (err)
789 return err;
790
791 if (mode == MMC_HWPART_CONF_SET)
792 return 0;
793
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100794 /* The WR_REL_SET is a write-once register but shall be
795 * written before setting PART_SETTING_COMPLETED. As it is
796 * write-once we can only write it when completing the
797 * partitioning. */
798 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
799 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
800 EXT_CSD_WR_REL_SET, wr_rel_set);
801 if (err)
802 return err;
803 }
804
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100805 /* Setting PART_SETTING_COMPLETED confirms the partition
806 * configuration but it only becomes effective after power
807 * cycle, so we do not adjust the partition related settings
808 * in the mmc struct. */
809
810 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
811 EXT_CSD_PARTITION_SETTING,
812 EXT_CSD_PARTITION_SETTING_COMPLETED);
813 if (err)
814 return err;
815
816 return 0;
817}
818
Thierry Reding48972d92012-01-02 01:15:37 +0000819int mmc_getcd(struct mmc *mmc)
820{
821 int cd;
822
823 cd = board_mmc_getcd(mmc);
824
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000825 if (cd < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200826 if (mmc->cfg->ops->getcd)
827 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000828 else
829 cd = 1;
830 }
Thierry Reding48972d92012-01-02 01:15:37 +0000831
832 return cd;
833}
834
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000835static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Fleming272cc702008-10-30 16:41:01 -0500836{
837 struct mmc_cmd cmd;
838 struct mmc_data data;
839
840 /* Switch the frequency */
841 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
842 cmd.resp_type = MMC_RSP_R1;
843 cmd.cmdarg = (mode << 31) | 0xffffff;
844 cmd.cmdarg &= ~(0xf << (group * 4));
845 cmd.cmdarg |= value << (group * 4);
Andy Fleming272cc702008-10-30 16:41:01 -0500846
847 data.dest = (char *)resp;
848 data.blocksize = 64;
849 data.blocks = 1;
850 data.flags = MMC_DATA_READ;
851
852 return mmc_send_cmd(mmc, &cmd, &data);
853}
854
855
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000856static int sd_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500857{
858 int err;
859 struct mmc_cmd cmd;
Anton staaff781dd32011-10-03 13:54:59 +0000860 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
861 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Andy Fleming272cc702008-10-30 16:41:01 -0500862 struct mmc_data data;
863 int timeout;
864
865 mmc->card_caps = 0;
866
Thomas Choud52ebf12010-12-24 13:12:21 +0000867 if (mmc_host_is_spi(mmc))
868 return 0;
869
Andy Fleming272cc702008-10-30 16:41:01 -0500870 /* Read the SCR to find out if this card supports higher speeds */
871 cmd.cmdidx = MMC_CMD_APP_CMD;
872 cmd.resp_type = MMC_RSP_R1;
873 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -0500874
875 err = mmc_send_cmd(mmc, &cmd, NULL);
876
877 if (err)
878 return err;
879
880 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
881 cmd.resp_type = MMC_RSP_R1;
882 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500883
884 timeout = 3;
885
886retry_scr:
Anton staaff781dd32011-10-03 13:54:59 +0000887 data.dest = (char *)scr;
Andy Fleming272cc702008-10-30 16:41:01 -0500888 data.blocksize = 8;
889 data.blocks = 1;
890 data.flags = MMC_DATA_READ;
891
892 err = mmc_send_cmd(mmc, &cmd, &data);
893
894 if (err) {
895 if (timeout--)
896 goto retry_scr;
897
898 return err;
899 }
900
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300901 mmc->scr[0] = __be32_to_cpu(scr[0]);
902 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Fleming272cc702008-10-30 16:41:01 -0500903
904 switch ((mmc->scr[0] >> 24) & 0xf) {
Bin Meng53e8e402016-03-17 21:53:13 -0700905 case 0:
906 mmc->version = SD_VERSION_1_0;
907 break;
908 case 1:
909 mmc->version = SD_VERSION_1_10;
910 break;
911 case 2:
912 mmc->version = SD_VERSION_2;
913 if ((mmc->scr[0] >> 15) & 0x1)
914 mmc->version = SD_VERSION_3;
915 break;
916 default:
917 mmc->version = SD_VERSION_1_0;
918 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500919 }
920
Alagu Sankarb44c7082010-05-12 15:08:24 +0530921 if (mmc->scr[0] & SD_DATA_4BIT)
922 mmc->card_caps |= MMC_MODE_4BIT;
923
Andy Fleming272cc702008-10-30 16:41:01 -0500924 /* Version 1.0 doesn't support switching */
925 if (mmc->version == SD_VERSION_1_0)
926 return 0;
927
928 timeout = 4;
929 while (timeout--) {
930 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaff781dd32011-10-03 13:54:59 +0000931 (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500932
933 if (err)
934 return err;
935
936 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300937 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Fleming272cc702008-10-30 16:41:01 -0500938 break;
939 }
940
Andy Fleming272cc702008-10-30 16:41:01 -0500941 /* If high-speed isn't supported, we return */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300942 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
Andy Fleming272cc702008-10-30 16:41:01 -0500943 return 0;
944
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000945 /*
946 * If the host doesn't support SD_HIGHSPEED, do not switch card to
947 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
948 * This can avoid furthur problem when the card runs in different
949 * mode between the host.
950 */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200951 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
952 (mmc->cfg->host_caps & MMC_MODE_HS)))
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000953 return 0;
954
Anton staaff781dd32011-10-03 13:54:59 +0000955 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500956
957 if (err)
958 return err;
959
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300960 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
Andy Fleming272cc702008-10-30 16:41:01 -0500961 mmc->card_caps |= MMC_MODE_HS;
962
963 return 0;
964}
965
966/* frequency bases */
967/* divided by 10 to be nice to platforms without floating point */
Mike Frysinger5f837c22010-10-20 01:15:53 +0000968static const int fbase[] = {
Andy Fleming272cc702008-10-30 16:41:01 -0500969 10000,
970 100000,
971 1000000,
972 10000000,
973};
974
975/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
976 * to platforms without floating point.
977 */
Mike Frysinger5f837c22010-10-20 01:15:53 +0000978static const int multipliers[] = {
Andy Fleming272cc702008-10-30 16:41:01 -0500979 0, /* reserved */
980 10,
981 12,
982 13,
983 15,
984 20,
985 25,
986 30,
987 35,
988 40,
989 45,
990 50,
991 55,
992 60,
993 70,
994 80,
995};
996
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000997static void mmc_set_ios(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500998{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200999 if (mmc->cfg->ops->set_ios)
1000 mmc->cfg->ops->set_ios(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001001}
1002
1003void mmc_set_clock(struct mmc *mmc, uint clock)
1004{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001005 if (clock > mmc->cfg->f_max)
1006 clock = mmc->cfg->f_max;
Andy Fleming272cc702008-10-30 16:41:01 -05001007
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001008 if (clock < mmc->cfg->f_min)
1009 clock = mmc->cfg->f_min;
Andy Fleming272cc702008-10-30 16:41:01 -05001010
1011 mmc->clock = clock;
1012
1013 mmc_set_ios(mmc);
1014}
1015
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001016static void mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Fleming272cc702008-10-30 16:41:01 -05001017{
1018 mmc->bus_width = width;
1019
1020 mmc_set_ios(mmc);
1021}
1022
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001023static int mmc_startup(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001024{
Stephen Warrenf866a462013-06-11 15:14:01 -06001025 int err, i;
Andy Fleming272cc702008-10-30 16:41:01 -05001026 uint mult, freq;
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001027 u64 cmult, csize, capacity;
Andy Fleming272cc702008-10-30 16:41:01 -05001028 struct mmc_cmd cmd;
Simon Glass8bfa1952013-04-03 08:54:30 +00001029 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1030 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001031 int timeout = 1000;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001032 bool has_parts = false;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001033 bool part_completed;
Simon Glassc40fdca2016-05-01 13:52:35 -06001034 struct blk_desc *bdesc;
Andy Fleming272cc702008-10-30 16:41:01 -05001035
Thomas Choud52ebf12010-12-24 13:12:21 +00001036#ifdef CONFIG_MMC_SPI_CRC_ON
1037 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1038 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1039 cmd.resp_type = MMC_RSP_R1;
1040 cmd.cmdarg = 1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001041 err = mmc_send_cmd(mmc, &cmd, NULL);
1042
1043 if (err)
1044 return err;
1045 }
1046#endif
1047
Andy Fleming272cc702008-10-30 16:41:01 -05001048 /* Put the Card in Identify Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001049 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1050 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Fleming272cc702008-10-30 16:41:01 -05001051 cmd.resp_type = MMC_RSP_R2;
1052 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001053
1054 err = mmc_send_cmd(mmc, &cmd, NULL);
1055
1056 if (err)
1057 return err;
1058
1059 memcpy(mmc->cid, cmd.response, 16);
1060
1061 /*
1062 * For MMC cards, set the Relative Address.
1063 * For SD cards, get the Relatvie Address.
1064 * This also puts the cards into Standby State
1065 */
Thomas Choud52ebf12010-12-24 13:12:21 +00001066 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1067 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1068 cmd.cmdarg = mmc->rca << 16;
1069 cmd.resp_type = MMC_RSP_R6;
Andy Fleming272cc702008-10-30 16:41:01 -05001070
Thomas Choud52ebf12010-12-24 13:12:21 +00001071 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001072
Thomas Choud52ebf12010-12-24 13:12:21 +00001073 if (err)
1074 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001075
Thomas Choud52ebf12010-12-24 13:12:21 +00001076 if (IS_SD(mmc))
1077 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1078 }
Andy Fleming272cc702008-10-30 16:41:01 -05001079
1080 /* Get the Card-Specific Data */
1081 cmd.cmdidx = MMC_CMD_SEND_CSD;
1082 cmd.resp_type = MMC_RSP_R2;
1083 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001084
1085 err = mmc_send_cmd(mmc, &cmd, NULL);
1086
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001087 /* Waiting for the ready status */
1088 mmc_send_status(mmc, timeout);
1089
Andy Fleming272cc702008-10-30 16:41:01 -05001090 if (err)
1091 return err;
1092
Rabin Vincent998be3d2009-04-05 13:30:56 +05301093 mmc->csd[0] = cmd.response[0];
1094 mmc->csd[1] = cmd.response[1];
1095 mmc->csd[2] = cmd.response[2];
1096 mmc->csd[3] = cmd.response[3];
Andy Fleming272cc702008-10-30 16:41:01 -05001097
1098 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301099 int version = (cmd.response[0] >> 26) & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -05001100
1101 switch (version) {
Bin Meng53e8e402016-03-17 21:53:13 -07001102 case 0:
1103 mmc->version = MMC_VERSION_1_2;
1104 break;
1105 case 1:
1106 mmc->version = MMC_VERSION_1_4;
1107 break;
1108 case 2:
1109 mmc->version = MMC_VERSION_2_2;
1110 break;
1111 case 3:
1112 mmc->version = MMC_VERSION_3;
1113 break;
1114 case 4:
1115 mmc->version = MMC_VERSION_4;
1116 break;
1117 default:
1118 mmc->version = MMC_VERSION_1_2;
1119 break;
Andy Fleming272cc702008-10-30 16:41:01 -05001120 }
1121 }
1122
1123 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301124 freq = fbase[(cmd.response[0] & 0x7)];
1125 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Fleming272cc702008-10-30 16:41:01 -05001126
1127 mmc->tran_speed = freq * mult;
1128
Markus Niebelab711882013-12-16 13:40:46 +01001129 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincent998be3d2009-04-05 13:30:56 +05301130 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001131
1132 if (IS_SD(mmc))
1133 mmc->write_bl_len = mmc->read_bl_len;
1134 else
Rabin Vincent998be3d2009-04-05 13:30:56 +05301135 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001136
1137 if (mmc->high_capacity) {
1138 csize = (mmc->csd[1] & 0x3f) << 16
1139 | (mmc->csd[2] & 0xffff0000) >> 16;
1140 cmult = 8;
1141 } else {
1142 csize = (mmc->csd[1] & 0x3ff) << 2
1143 | (mmc->csd[2] & 0xc0000000) >> 30;
1144 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1145 }
1146
Stephen Warrenf866a462013-06-11 15:14:01 -06001147 mmc->capacity_user = (csize + 1) << (cmult + 2);
1148 mmc->capacity_user *= mmc->read_bl_len;
1149 mmc->capacity_boot = 0;
1150 mmc->capacity_rpmb = 0;
1151 for (i = 0; i < 4; i++)
1152 mmc->capacity_gp[i] = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001153
Simon Glass8bfa1952013-04-03 08:54:30 +00001154 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1155 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001156
Simon Glass8bfa1952013-04-03 08:54:30 +00001157 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1158 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001159
Markus Niebelab711882013-12-16 13:40:46 +01001160 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1161 cmd.cmdidx = MMC_CMD_SET_DSR;
1162 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1163 cmd.resp_type = MMC_RSP_NONE;
1164 if (mmc_send_cmd(mmc, &cmd, NULL))
1165 printf("MMC: SET_DSR failed\n");
1166 }
1167
Andy Fleming272cc702008-10-30 16:41:01 -05001168 /* Select the card, and put it into Transfer Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001169 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1170 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargavfe8f7062011-10-05 03:13:23 +00001171 cmd.resp_type = MMC_RSP_R1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001172 cmd.cmdarg = mmc->rca << 16;
Thomas Choud52ebf12010-12-24 13:12:21 +00001173 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001174
Thomas Choud52ebf12010-12-24 13:12:21 +00001175 if (err)
1176 return err;
1177 }
Andy Fleming272cc702008-10-30 16:41:01 -05001178
Lei Wene6f99a52011-06-22 17:03:31 +00001179 /*
1180 * For SD, its erase group is always one sector
1181 */
1182 mmc->erase_grp_size = 1;
Lei Wenbc897b12011-05-02 16:26:26 +00001183 mmc->part_config = MMCPART_NOAVAILABLE;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301184 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1185 /* check ext_csd version and capacity */
1186 err = mmc_send_ext_csd(mmc, ext_csd);
Diego Santa Cruz9cf199e2014-12-23 10:50:28 +01001187 if (err)
1188 return err;
1189 if (ext_csd[EXT_CSD_REV] >= 2) {
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001190 /*
1191 * According to the JEDEC Standard, the value of
1192 * ext_csd's capacity is valid if the value is more
1193 * than 2GB
1194 */
Lei Wen0560db12011-10-03 20:35:10 +00001195 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1196 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1197 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1198 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
Simon Glass8bfa1952013-04-03 08:54:30 +00001199 capacity *= MMC_MAX_BLOCK_LEN;
Łukasz Majewskib1f1e8212011-07-05 02:19:44 +00001200 if ((capacity >> 20) > 2 * 1024)
Stephen Warrenf866a462013-06-11 15:14:01 -06001201 mmc->capacity_user = capacity;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301202 }
Lei Wenbc897b12011-05-02 16:26:26 +00001203
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001204 switch (ext_csd[EXT_CSD_REV]) {
1205 case 1:
1206 mmc->version = MMC_VERSION_4_1;
1207 break;
1208 case 2:
1209 mmc->version = MMC_VERSION_4_2;
1210 break;
1211 case 3:
1212 mmc->version = MMC_VERSION_4_3;
1213 break;
1214 case 5:
1215 mmc->version = MMC_VERSION_4_41;
1216 break;
1217 case 6:
1218 mmc->version = MMC_VERSION_4_5;
1219 break;
Markus Niebeledab7232014-11-18 15:13:53 +01001220 case 7:
1221 mmc->version = MMC_VERSION_5_0;
1222 break;
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001223 }
1224
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001225 /* The partition data may be non-zero but it is only
1226 * effective if PARTITION_SETTING_COMPLETED is set in
1227 * EXT_CSD, so ignore any data if this bit is not set,
1228 * except for enabling the high-capacity group size
1229 * definition (see below). */
1230 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1231 EXT_CSD_PARTITION_SETTING_COMPLETED);
1232
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001233 /* store the partition info of emmc */
1234 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1235 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1236 ext_csd[EXT_CSD_BOOT_MULT])
1237 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001238 if (part_completed &&
1239 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001240 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1241
1242 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1243
1244 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1245
1246 for (i = 0; i < 4; i++) {
1247 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001248 uint mult = (ext_csd[idx + 2] << 16) +
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001249 (ext_csd[idx + 1] << 8) + ext_csd[idx];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001250 if (mult)
1251 has_parts = true;
1252 if (!part_completed)
1253 continue;
1254 mmc->capacity_gp[i] = mult;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001255 mmc->capacity_gp[i] *=
1256 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1257 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruzf8e89d62014-12-23 10:50:21 +01001258 mmc->capacity_gp[i] <<= 19;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001259 }
1260
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001261 if (part_completed) {
1262 mmc->enh_user_size =
1263 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1264 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1265 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1266 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1267 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1268 mmc->enh_user_size <<= 19;
1269 mmc->enh_user_start =
1270 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1271 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1272 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1273 ext_csd[EXT_CSD_ENH_START_ADDR];
1274 if (mmc->high_capacity)
1275 mmc->enh_user_start <<= 9;
1276 }
Diego Santa Cruza7f852b2014-12-23 10:50:22 +01001277
Lei Wene6f99a52011-06-22 17:03:31 +00001278 /*
Oliver Metz1937e5a2013-10-01 20:32:07 +02001279 * Host needs to enable ERASE_GRP_DEF bit if device is
1280 * partitioned. This bit will be lost every time after a reset
1281 * or power off. This will affect erase size.
Lei Wene6f99a52011-06-22 17:03:31 +00001282 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001283 if (part_completed)
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001284 has_parts = true;
Oliver Metz1937e5a2013-10-01 20:32:07 +02001285 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001286 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1287 has_parts = true;
1288 if (has_parts) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001289 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1290 EXT_CSD_ERASE_GROUP_DEF, 1);
1291
1292 if (err)
1293 return err;
Hannes Petermaier021a8052014-08-08 09:47:22 +02001294 else
1295 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001296 }
Oliver Metz1937e5a2013-10-01 20:32:07 +02001297
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001298 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001299 /* Read out group size from ext_csd */
Lei Wen0560db12011-10-03 20:35:10 +00001300 mmc->erase_grp_size =
Diego Santa Cruza4ff9f82014-12-23 10:50:24 +01001301 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Markus Niebeld7b29122014-11-18 15:11:42 +01001302 /*
1303 * if high capacity and partition setting completed
1304 * SEC_COUNT is valid even if it is smaller than 2 GiB
1305 * JEDEC Standard JESD84-B45, 6.2.4
1306 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001307 if (mmc->high_capacity && part_completed) {
Markus Niebeld7b29122014-11-18 15:11:42 +01001308 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1309 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1310 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1311 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1312 capacity *= MMC_MAX_BLOCK_LEN;
1313 mmc->capacity_user = capacity;
1314 }
Simon Glass8bfa1952013-04-03 08:54:30 +00001315 } else {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001316 /* Calculate the group size from the csd value. */
Lei Wene6f99a52011-06-22 17:03:31 +00001317 int erase_gsz, erase_gmul;
1318 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1319 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1320 mmc->erase_grp_size = (erase_gsz + 1)
1321 * (erase_gmul + 1);
1322 }
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001323
1324 mmc->hc_wp_grp_size = 1024
1325 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1326 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruz9e41a002014-12-23 10:50:33 +01001327
1328 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301329 }
1330
Simon Glassc40fdca2016-05-01 13:52:35 -06001331 err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
Stephen Warrenf866a462013-06-11 15:14:01 -06001332 if (err)
1333 return err;
1334
Andy Fleming272cc702008-10-30 16:41:01 -05001335 if (IS_SD(mmc))
1336 err = sd_change_freq(mmc);
1337 else
1338 err = mmc_change_freq(mmc);
1339
1340 if (err)
1341 return err;
1342
1343 /* Restrict card's capabilities by what the host can do */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001344 mmc->card_caps &= mmc->cfg->host_caps;
Andy Fleming272cc702008-10-30 16:41:01 -05001345
1346 if (IS_SD(mmc)) {
1347 if (mmc->card_caps & MMC_MODE_4BIT) {
1348 cmd.cmdidx = MMC_CMD_APP_CMD;
1349 cmd.resp_type = MMC_RSP_R1;
1350 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001351
1352 err = mmc_send_cmd(mmc, &cmd, NULL);
1353 if (err)
1354 return err;
1355
1356 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1357 cmd.resp_type = MMC_RSP_R1;
1358 cmd.cmdarg = 2;
Andy Fleming272cc702008-10-30 16:41:01 -05001359 err = mmc_send_cmd(mmc, &cmd, NULL);
1360 if (err)
1361 return err;
1362
1363 mmc_set_bus_width(mmc, 4);
1364 }
1365
1366 if (mmc->card_caps & MMC_MODE_HS)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001367 mmc->tran_speed = 50000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001368 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001369 mmc->tran_speed = 25000000;
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -06001370 } else if (mmc->version >= MMC_VERSION_4) {
1371 /* Only version 4 of MMC supports wider bus widths */
Andy Fleming7798f6d2012-10-31 19:02:38 +00001372 int idx;
1373
1374 /* An array of possible bus widths in order of preference */
1375 static unsigned ext_csd_bits[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001376 EXT_CSD_DDR_BUS_WIDTH_8,
1377 EXT_CSD_DDR_BUS_WIDTH_4,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001378 EXT_CSD_BUS_WIDTH_8,
1379 EXT_CSD_BUS_WIDTH_4,
1380 EXT_CSD_BUS_WIDTH_1,
1381 };
1382
1383 /* An array to map CSD bus widths to host cap bits */
1384 static unsigned ext_to_hostcaps[] = {
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001385 [EXT_CSD_DDR_BUS_WIDTH_4] =
1386 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1387 [EXT_CSD_DDR_BUS_WIDTH_8] =
1388 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001389 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1390 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1391 };
1392
1393 /* An array to map chosen bus width to an integer */
1394 static unsigned widths[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001395 8, 4, 8, 4, 1,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001396 };
1397
1398 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1399 unsigned int extw = ext_csd_bits[idx];
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001400 unsigned int caps = ext_to_hostcaps[extw];
Andy Fleming7798f6d2012-10-31 19:02:38 +00001401
1402 /*
Andrew Gabbasovbf477072014-12-25 10:22:24 -06001403 * If the bus width is still not changed,
1404 * don't try to set the default again.
1405 * Otherwise, recover from switch attempts
1406 * by switching to 1-bit bus width.
1407 */
1408 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1409 mmc->bus_width == 1) {
1410 err = 0;
1411 break;
1412 }
1413
1414 /*
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001415 * Check to make sure the card and controller support
1416 * these capabilities
Andy Fleming7798f6d2012-10-31 19:02:38 +00001417 */
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001418 if ((mmc->card_caps & caps) != caps)
Andy Fleming7798f6d2012-10-31 19:02:38 +00001419 continue;
1420
Andy Fleming272cc702008-10-30 16:41:01 -05001421 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001422 EXT_CSD_BUS_WIDTH, extw);
Andy Fleming272cc702008-10-30 16:41:01 -05001423
1424 if (err)
Lei Wen41378942011-10-03 20:35:11 +00001425 continue;
Andy Fleming272cc702008-10-30 16:41:01 -05001426
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001427 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
Andy Fleming7798f6d2012-10-31 19:02:38 +00001428 mmc_set_bus_width(mmc, widths[idx]);
Andy Fleming272cc702008-10-30 16:41:01 -05001429
Lei Wen41378942011-10-03 20:35:11 +00001430 err = mmc_send_ext_csd(mmc, test_csd);
Andy Fleming272cc702008-10-30 16:41:01 -05001431
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001432 if (err)
1433 continue;
1434
1435 /* Only compare read only fields */
1436 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1437 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1438 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1439 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1440 ext_csd[EXT_CSD_REV]
1441 == test_csd[EXT_CSD_REV] &&
1442 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1443 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1444 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1445 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
Lei Wen41378942011-10-03 20:35:11 +00001446 break;
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001447 else
1448 err = SWITCH_ERR;
Andy Fleming272cc702008-10-30 16:41:01 -05001449 }
1450
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001451 if (err)
1452 return err;
1453
Andy Fleming272cc702008-10-30 16:41:01 -05001454 if (mmc->card_caps & MMC_MODE_HS) {
1455 if (mmc->card_caps & MMC_MODE_HS_52MHz)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001456 mmc->tran_speed = 52000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001457 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001458 mmc->tran_speed = 26000000;
1459 }
Andy Fleming272cc702008-10-30 16:41:01 -05001460 }
1461
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001462 mmc_set_clock(mmc, mmc->tran_speed);
1463
Andrew Gabbasov5af8f452014-12-01 06:59:11 -06001464 /* Fix the block length for DDR mode */
1465 if (mmc->ddr_mode) {
1466 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1467 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1468 }
1469
Andy Fleming272cc702008-10-30 16:41:01 -05001470 /* fill in device description */
Simon Glassc40fdca2016-05-01 13:52:35 -06001471 bdesc = mmc_get_blk_desc(mmc);
1472 bdesc->lun = 0;
1473 bdesc->hwpart = 0;
1474 bdesc->type = 0;
1475 bdesc->blksz = mmc->read_bl_len;
1476 bdesc->log2blksz = LOG2(bdesc->blksz);
1477 bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
Sjoerd Simonsfc011f62015-12-04 23:27:40 +01001478#if !defined(CONFIG_SPL_BUILD) || \
1479 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1480 !defined(CONFIG_USE_TINY_PRINTF))
Simon Glassc40fdca2016-05-01 13:52:35 -06001481 sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
Taylor Huttbabce5f2012-10-20 17:15:59 +00001482 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1483 (mmc->cid[3] >> 16) & 0xffff);
Simon Glassc40fdca2016-05-01 13:52:35 -06001484 sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
Taylor Huttbabce5f2012-10-20 17:15:59 +00001485 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1486 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1487 (mmc->cid[2] >> 24) & 0xff);
Simon Glassc40fdca2016-05-01 13:52:35 -06001488 sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
Taylor Huttbabce5f2012-10-20 17:15:59 +00001489 (mmc->cid[2] >> 16) & 0xf);
Paul Burton56196822013-09-04 16:12:25 +01001490#else
Simon Glassc40fdca2016-05-01 13:52:35 -06001491 bdesc->vendor[0] = 0;
1492 bdesc->product[0] = 0;
1493 bdesc->revision[0] = 0;
Paul Burton56196822013-09-04 16:12:25 +01001494#endif
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001495#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Simon Glassc40fdca2016-05-01 13:52:35 -06001496 part_init(bdesc);
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001497#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001498
1499 return 0;
1500}
1501
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001502static int mmc_send_if_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001503{
1504 struct mmc_cmd cmd;
1505 int err;
1506
1507 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1508 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001509 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Fleming272cc702008-10-30 16:41:01 -05001510 cmd.resp_type = MMC_RSP_R7;
Andy Fleming272cc702008-10-30 16:41:01 -05001511
1512 err = mmc_send_cmd(mmc, &cmd, NULL);
1513
1514 if (err)
1515 return err;
1516
Rabin Vincent998be3d2009-04-05 13:30:56 +05301517 if ((cmd.response[0] & 0xff) != 0xaa)
Andy Fleming272cc702008-10-30 16:41:01 -05001518 return UNUSABLE_ERR;
1519 else
1520 mmc->version = SD_VERSION_2;
1521
1522 return 0;
1523}
1524
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001525/* not used any more */
1526int __deprecated mmc_register(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001527{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001528#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1529 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1530#endif
1531 return -1;
1532}
1533
Simon Glassad27dd52016-05-01 13:52:40 -06001534#ifdef CONFIG_BLK
1535int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg)
1536{
1537 struct blk_desc *bdesc;
1538 struct udevice *bdev;
1539 int ret;
1540
1541 ret = blk_create_devicef(dev, "mmc_blk", "blk", IF_TYPE_MMC, -1, 512,
1542 0, &bdev);
1543 if (ret) {
1544 debug("Cannot create block device\n");
1545 return ret;
1546 }
1547 bdesc = dev_get_uclass_platdata(bdev);
1548 mmc->cfg = cfg;
1549 mmc->priv = dev;
1550
1551 /* the following chunk was from mmc_register() */
1552
1553 /* Setup dsr related values */
1554 mmc->dsr_imp = 0;
1555 mmc->dsr = 0xffffffff;
1556 /* Setup the universal parts of the block interface just once */
1557 bdesc->if_type = IF_TYPE_MMC;
1558 bdesc->removable = 1;
1559
1560 /* setup initial part type */
1561 bdesc->part_type = mmc->cfg->part_type;
1562 mmc->dev = dev;
1563
1564 return 0;
1565}
1566
1567int mmc_unbind(struct udevice *dev)
1568{
1569 struct udevice *bdev;
1570
1571 device_find_first_child(dev, &bdev);
1572 if (bdev) {
1573 device_remove(bdev);
1574 device_unbind(bdev);
1575 }
1576
1577 return 0;
1578}
1579
1580#else
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001581struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1582{
Simon Glassc40fdca2016-05-01 13:52:35 -06001583 struct blk_desc *bdesc;
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001584 struct mmc *mmc;
1585
1586 /* quick validation */
1587 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1588 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1589 return NULL;
1590
1591 mmc = calloc(1, sizeof(*mmc));
1592 if (mmc == NULL)
1593 return NULL;
1594
1595 mmc->cfg = cfg;
1596 mmc->priv = priv;
1597
1598 /* the following chunk was mmc_register() */
1599
Markus Niebelab711882013-12-16 13:40:46 +01001600 /* Setup dsr related values */
1601 mmc->dsr_imp = 0;
1602 mmc->dsr = 0xffffffff;
Andy Fleming272cc702008-10-30 16:41:01 -05001603 /* Setup the universal parts of the block interface just once */
Simon Glassc40fdca2016-05-01 13:52:35 -06001604 bdesc = mmc_get_blk_desc(mmc);
1605 bdesc->if_type = IF_TYPE_MMC;
1606 bdesc->removable = 1;
1607 bdesc->devnum = mmc_get_next_devnum();
1608 bdesc->block_read = mmc_bread;
1609 bdesc->block_write = mmc_bwrite;
1610 bdesc->block_erase = mmc_berase;
Andy Fleming272cc702008-10-30 16:41:01 -05001611
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001612 /* setup initial part type */
Simon Glassc40fdca2016-05-01 13:52:35 -06001613 bdesc->part_type = mmc->cfg->part_type;
1614 mmc_list_add(mmc);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001615
1616 return mmc;
1617}
1618
1619void mmc_destroy(struct mmc *mmc)
1620{
1621 /* only freeing memory for now */
1622 free(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001623}
Simon Glassad27dd52016-05-01 13:52:40 -06001624#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001625
Simon Glass3c457f42016-05-01 11:36:15 -06001626static int mmc_get_dev(int dev, struct blk_desc **descp)
Simon Glass663acab2016-05-01 11:36:07 -06001627{
1628 struct mmc *mmc = find_mmc_device(dev);
1629 int ret;
1630
1631 if (!mmc)
1632 return -ENODEV;
1633 ret = mmc_init(mmc);
1634 if (ret)
1635 return ret;
1636
1637 *descp = &mmc->block_dev;
1638
1639 return 0;
1640}
1641
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001642/* board-specific MMC power initializations. */
1643__weak void board_mmc_power_init(void)
1644{
1645}
1646
Che-Liang Chioue9550442012-11-28 15:21:13 +00001647int mmc_start_init(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001648{
Macpaul Linafd59322011-11-14 23:35:39 +00001649 int err;
Andy Fleming272cc702008-10-30 16:41:01 -05001650
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001651 /* we pretend there's no card when init is NULL */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001652 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
Thierry Reding48972d92012-01-02 01:15:37 +00001653 mmc->has_init = 0;
Paul Burton56196822013-09-04 16:12:25 +01001654#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Reding48972d92012-01-02 01:15:37 +00001655 printf("MMC: no card present\n");
Paul Burton56196822013-09-04 16:12:25 +01001656#endif
Thierry Reding48972d92012-01-02 01:15:37 +00001657 return NO_CARD_ERR;
1658 }
1659
Lei Wenbc897b12011-05-02 16:26:26 +00001660 if (mmc->has_init)
1661 return 0;
1662
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08001663#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1664 mmc_adapter_card_type_ident();
1665#endif
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001666 board_mmc_power_init();
1667
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001668 /* made sure it's not NULL earlier */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001669 err = mmc->cfg->ops->init(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001670
1671 if (err)
1672 return err;
1673
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001674 mmc->ddr_mode = 0;
Ilya Yanokb86b85e2009-06-29 17:53:16 +04001675 mmc_set_bus_width(mmc, 1);
1676 mmc_set_clock(mmc, 1);
1677
Andy Fleming272cc702008-10-30 16:41:01 -05001678 /* Reset the Card */
1679 err = mmc_go_idle(mmc);
1680
1681 if (err)
1682 return err;
1683
Lei Wenbc897b12011-05-02 16:26:26 +00001684 /* The internal partition reset to user partition(0) at every CMD0*/
Simon Glassc40fdca2016-05-01 13:52:35 -06001685 mmc_get_blk_desc(mmc)->hwpart = 0;
Lei Wenbc897b12011-05-02 16:26:26 +00001686
Andy Fleming272cc702008-10-30 16:41:01 -05001687 /* Test for SD version 2 */
Macpaul Linafd59322011-11-14 23:35:39 +00001688 err = mmc_send_if_cond(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001689
Andy Fleming272cc702008-10-30 16:41:01 -05001690 /* Now try to get the SD card's operating condition */
1691 err = sd_send_op_cond(mmc);
1692
1693 /* If the command timed out, we check for an MMC card */
1694 if (err == TIMEOUT) {
1695 err = mmc_send_op_cond(mmc);
1696
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001697 if (err) {
Paul Burton56196822013-09-04 16:12:25 +01001698#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -05001699 printf("Card did not respond to voltage select!\n");
Paul Burton56196822013-09-04 16:12:25 +01001700#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001701 return UNUSABLE_ERR;
1702 }
1703 }
1704
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001705 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001706 mmc->init_in_progress = 1;
1707
1708 return err;
1709}
1710
1711static int mmc_complete_init(struct mmc *mmc)
1712{
1713 int err = 0;
1714
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001715 mmc->init_in_progress = 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001716 if (mmc->op_cond_pending)
1717 err = mmc_complete_op_cond(mmc);
1718
1719 if (!err)
1720 err = mmc_startup(mmc);
Lei Wenbc897b12011-05-02 16:26:26 +00001721 if (err)
1722 mmc->has_init = 0;
1723 else
1724 mmc->has_init = 1;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001725 return err;
1726}
1727
1728int mmc_init(struct mmc *mmc)
1729{
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001730 int err = 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001731 unsigned start;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001732
1733 if (mmc->has_init)
1734 return 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001735
1736 start = get_timer(0);
1737
Che-Liang Chioue9550442012-11-28 15:21:13 +00001738 if (!mmc->init_in_progress)
1739 err = mmc_start_init(mmc);
1740
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001741 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001742 err = mmc_complete_init(mmc);
1743 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
Lei Wenbc897b12011-05-02 16:26:26 +00001744 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001745}
1746
Markus Niebelab711882013-12-16 13:40:46 +01001747int mmc_set_dsr(struct mmc *mmc, u16 val)
1748{
1749 mmc->dsr = val;
1750 return 0;
1751}
1752
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001753/* CPU-specific MMC initializations */
1754__weak int cpu_mmc_init(bd_t *bis)
Andy Fleming272cc702008-10-30 16:41:01 -05001755{
1756 return -1;
1757}
1758
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001759/* board-specific MMC initializations. */
1760__weak int board_mmc_init(bd_t *bis)
1761{
1762 return -1;
1763}
Andy Fleming272cc702008-10-30 16:41:01 -05001764
Che-Liang Chioue9550442012-11-28 15:21:13 +00001765void mmc_set_preinit(struct mmc *mmc, int preinit)
1766{
1767 mmc->preinit = preinit;
1768}
1769
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001770#if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1771static int mmc_probe(bd_t *bis)
1772{
1773 return 0;
1774}
1775#elif defined(CONFIG_DM_MMC)
1776static int mmc_probe(bd_t *bis)
1777{
Simon Glass4a1db6d2015-12-29 05:22:49 -07001778 int ret, i;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001779 struct uclass *uc;
Simon Glass4a1db6d2015-12-29 05:22:49 -07001780 struct udevice *dev;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001781
1782 ret = uclass_get(UCLASS_MMC, &uc);
1783 if (ret)
1784 return ret;
1785
Simon Glass4a1db6d2015-12-29 05:22:49 -07001786 /*
1787 * Try to add them in sequence order. Really with driver model we
1788 * should allow holes, but the current MMC list does not allow that.
1789 * So if we request 0, 1, 3 we will get 0, 1, 2.
1790 */
1791 for (i = 0; ; i++) {
1792 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1793 if (ret == -ENODEV)
1794 break;
1795 }
1796 uclass_foreach_dev(dev, uc) {
1797 ret = device_probe(dev);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001798 if (ret)
Simon Glass4a1db6d2015-12-29 05:22:49 -07001799 printf("%s - probe failed: %d\n", dev->name, ret);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001800 }
1801
1802 return 0;
1803}
1804#else
1805static int mmc_probe(bd_t *bis)
1806{
1807 if (board_mmc_init(bis) < 0)
1808 cpu_mmc_init(bis);
1809
1810 return 0;
1811}
1812#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001813
Andy Fleming272cc702008-10-30 16:41:01 -05001814int mmc_initialize(bd_t *bis)
1815{
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001816 static int initialized = 0;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001817 int ret;
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001818 if (initialized) /* Avoid initializing mmc multiple times */
1819 return 0;
1820 initialized = 1;
1821
Simon Glassc40fdca2016-05-01 13:52:35 -06001822#ifndef CONFIG_BLK
1823 mmc_list_init();
1824#endif
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001825 ret = mmc_probe(bis);
1826 if (ret)
1827 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -05001828
Ying Zhangbb0dc102013-08-16 15:16:11 +08001829#ifndef CONFIG_SPL_BUILD
Andy Fleming272cc702008-10-30 16:41:01 -05001830 print_mmc_devices(',');
Ying Zhangbb0dc102013-08-16 15:16:11 +08001831#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001832
Simon Glassc40fdca2016-05-01 13:52:35 -06001833 mmc_do_preinit();
Andy Fleming272cc702008-10-30 16:41:01 -05001834 return 0;
1835}
Amar3690d6d2013-04-27 11:42:58 +05301836
1837#ifdef CONFIG_SUPPORT_EMMC_BOOT
1838/*
1839 * This function changes the size of boot partition and the size of rpmb
1840 * partition present on EMMC devices.
1841 *
1842 * Input Parameters:
1843 * struct *mmc: pointer for the mmc device strcuture
1844 * bootsize: size of boot partition
1845 * rpmbsize: size of rpmb partition
1846 *
1847 * Returns 0 on success.
1848 */
1849
1850int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1851 unsigned long rpmbsize)
1852{
1853 int err;
1854 struct mmc_cmd cmd;
1855
1856 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1857 cmd.cmdidx = MMC_CMD_RES_MAN;
1858 cmd.resp_type = MMC_RSP_R1b;
1859 cmd.cmdarg = MMC_CMD62_ARG1;
1860
1861 err = mmc_send_cmd(mmc, &cmd, NULL);
1862 if (err) {
1863 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1864 return err;
1865 }
1866
1867 /* Boot partition changing mode */
1868 cmd.cmdidx = MMC_CMD_RES_MAN;
1869 cmd.resp_type = MMC_RSP_R1b;
1870 cmd.cmdarg = MMC_CMD62_ARG2;
1871
1872 err = mmc_send_cmd(mmc, &cmd, NULL);
1873 if (err) {
1874 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1875 return err;
1876 }
1877 /* boot partition size is multiple of 128KB */
1878 bootsize = (bootsize * 1024) / 128;
1879
1880 /* Arg: boot partition size */
1881 cmd.cmdidx = MMC_CMD_RES_MAN;
1882 cmd.resp_type = MMC_RSP_R1b;
1883 cmd.cmdarg = bootsize;
1884
1885 err = mmc_send_cmd(mmc, &cmd, NULL);
1886 if (err) {
1887 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1888 return err;
1889 }
1890 /* RPMB partition size is multiple of 128KB */
1891 rpmbsize = (rpmbsize * 1024) / 128;
1892 /* Arg: RPMB partition size */
1893 cmd.cmdidx = MMC_CMD_RES_MAN;
1894 cmd.resp_type = MMC_RSP_R1b;
1895 cmd.cmdarg = rpmbsize;
1896
1897 err = mmc_send_cmd(mmc, &cmd, NULL);
1898 if (err) {
1899 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1900 return err;
1901 }
1902 return 0;
1903}
1904
1905/*
Tom Rini5a99b9d2014-02-05 10:24:22 -05001906 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1907 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1908 * and BOOT_MODE.
1909 *
1910 * Returns 0 on success.
1911 */
1912int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1913{
1914 int err;
1915
1916 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1917 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1918 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1919 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1920
1921 if (err)
1922 return err;
1923 return 0;
1924}
1925
1926/*
Tom Rini792970b2014-02-05 10:24:21 -05001927 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1928 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1929 * PARTITION_ACCESS.
1930 *
1931 * Returns 0 on success.
1932 */
1933int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1934{
1935 int err;
1936
1937 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1938 EXT_CSD_BOOT_ACK(ack) |
1939 EXT_CSD_BOOT_PART_NUM(part_num) |
1940 EXT_CSD_PARTITION_ACCESS(access));
1941
1942 if (err)
1943 return err;
1944 return 0;
1945}
Tom Rini33ace362014-02-07 14:15:20 -05001946
1947/*
1948 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1949 * for enable. Note that this is a write-once field for non-zero values.
1950 *
1951 * Returns 0 on success.
1952 */
1953int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1954{
1955 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1956 enable);
1957}
Amar3690d6d2013-04-27 11:42:58 +05301958#endif
Simon Glass663acab2016-05-01 11:36:07 -06001959
1960U_BOOT_LEGACY_BLK(mmc) = {
1961 .if_typename = "mmc",
1962 .if_type = IF_TYPE_MMC,
1963 .max_devs = -1,
Simon Glass3c457f42016-05-01 11:36:15 -06001964 .get_dev = mmc_get_dev,
Simon Glasse17d1142016-05-01 13:52:26 -06001965 .select_hwpart = mmc_select_hwpartp,
Simon Glass663acab2016-05-01 11:36:07 -06001966};