blob: 7322f3340452e1a6664f3832f83da54ad65f9438 [file] [log] [blame]
Andy Fleming272cc702008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming272cc702008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Sjoerd Simons8e3332e2015-08-30 16:55:45 -060013#include <dm.h>
14#include <dm/device-internal.h>
Stephen Warrend4622df2014-05-23 12:47:06 -060015#include <errno.h>
Andy Fleming272cc702008-10-30 16:41:01 -050016#include <mmc.h>
17#include <part.h>
18#include <malloc.h>
Simon Glasscf92e052015-09-02 17:24:58 -060019#include <memalign.h>
Andy Fleming272cc702008-10-30 16:41:01 -050020#include <linux/list.h>
Rabin Vincent9b1f9422009-04-05 13:30:54 +053021#include <div64.h>
Paul Burtonda61fa52013-09-09 15:30:26 +010022#include "mmc_private.h"
Andy Fleming272cc702008-10-30 16:41:01 -050023
24static struct list_head mmc_devices;
25static int cur_dev_num = -1;
26
Simon Glasscb5ec332016-05-01 13:52:27 -060027struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
28{
29 return &mmc->block_dev;
30}
31
Jeroen Hofstee750121c2014-07-12 21:24:08 +020032__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000033{
34 return -1;
35}
36
37int mmc_getwp(struct mmc *mmc)
38{
39 int wp;
40
41 wp = board_mmc_getwp(mmc);
42
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000043 if (wp < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020044 if (mmc->cfg->ops->getwp)
45 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000046 else
47 wp = 0;
48 }
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000049
50 return wp;
51}
52
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +020053__weak int board_mmc_getcd(struct mmc *mmc)
54{
Stefano Babic11fdade2010-02-05 15:04:43 +010055 return -1;
56}
57
Paul Burtonda61fa52013-09-09 15:30:26 +010058int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
Andy Fleming272cc702008-10-30 16:41:01 -050059{
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000060 int ret;
Marek Vasut8635ff92012-03-15 18:41:35 +000061
Marek Vasut8635ff92012-03-15 18:41:35 +000062#ifdef CONFIG_MMC_TRACE
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000063 int i;
64 u8 *ptr;
65
66 printf("CMD_SEND:%d\n", cmd->cmdidx);
67 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020068 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Bin Meng7863ce52016-03-17 21:53:14 -070069 if (ret) {
70 printf("\t\tRET\t\t\t %d\n", ret);
71 } else {
72 switch (cmd->resp_type) {
73 case MMC_RSP_NONE:
74 printf("\t\tMMC_RSP_NONE\n");
75 break;
76 case MMC_RSP_R1:
77 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
78 cmd->response[0]);
79 break;
80 case MMC_RSP_R1b:
81 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
82 cmd->response[0]);
83 break;
84 case MMC_RSP_R2:
85 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
86 cmd->response[0]);
87 printf("\t\t \t\t 0x%08X \n",
88 cmd->response[1]);
89 printf("\t\t \t\t 0x%08X \n",
90 cmd->response[2]);
91 printf("\t\t \t\t 0x%08X \n",
92 cmd->response[3]);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000093 printf("\n");
Bin Meng7863ce52016-03-17 21:53:14 -070094 printf("\t\t\t\t\tDUMPING DATA\n");
95 for (i = 0; i < 4; i++) {
96 int j;
97 printf("\t\t\t\t\t%03d - ", i*4);
98 ptr = (u8 *)&cmd->response[i];
99 ptr += 3;
100 for (j = 0; j < 4; j++)
101 printf("%02X ", *ptr--);
102 printf("\n");
103 }
104 break;
105 case MMC_RSP_R3:
106 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
107 cmd->response[0]);
108 break;
109 default:
110 printf("\t\tERROR MMC rsp not supported\n");
111 break;
Bin Meng53e8e402016-03-17 21:53:13 -0700112 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000113 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000114#else
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200115 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000116#endif
Marek Vasut8635ff92012-03-15 18:41:35 +0000117 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500118}
119
Paul Burtonda61fa52013-09-09 15:30:26 +0100120int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000121{
122 struct mmc_cmd cmd;
Jan Kloetzked617c422012-02-05 22:29:12 +0000123 int err, retries = 5;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000124#ifdef CONFIG_MMC_TRACE
125 int status;
126#endif
127
128 cmd.cmdidx = MMC_CMD_SEND_STATUS;
129 cmd.resp_type = MMC_RSP_R1;
Marek Vasutaaf3d412011-08-10 09:24:48 +0200130 if (!mmc_host_is_spi(mmc))
131 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000132
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500133 while (1) {
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000134 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzked617c422012-02-05 22:29:12 +0000135 if (!err) {
136 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
137 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
138 MMC_STATE_PRG)
139 break;
140 else if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton56196822013-09-04 16:12:25 +0100141#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzked617c422012-02-05 22:29:12 +0000142 printf("Status Error: 0x%08X\n",
143 cmd.response[0]);
Paul Burton56196822013-09-04 16:12:25 +0100144#endif
Jan Kloetzked617c422012-02-05 22:29:12 +0000145 return COMM_ERR;
146 }
147 } else if (--retries < 0)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000148 return err;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000149
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500150 if (timeout-- <= 0)
151 break;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000152
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500153 udelay(1000);
154 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000155
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000156#ifdef CONFIG_MMC_TRACE
157 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
158 printf("CURR STATE:%d\n", status);
159#endif
Jongman Heo5b0c9422012-06-03 21:32:13 +0000160 if (timeout <= 0) {
Paul Burton56196822013-09-04 16:12:25 +0100161#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000162 printf("Timeout waiting card ready\n");
Paul Burton56196822013-09-04 16:12:25 +0100163#endif
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000164 return TIMEOUT;
165 }
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500166 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
167 return SWITCH_ERR;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000168
169 return 0;
170}
171
Paul Burtonda61fa52013-09-09 15:30:26 +0100172int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Fleming272cc702008-10-30 16:41:01 -0500173{
174 struct mmc_cmd cmd;
175
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600176 if (mmc->ddr_mode)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900177 return 0;
178
Andy Fleming272cc702008-10-30 16:41:01 -0500179 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
180 cmd.resp_type = MMC_RSP_R1;
181 cmd.cmdarg = len;
Andy Fleming272cc702008-10-30 16:41:01 -0500182
183 return mmc_send_cmd(mmc, &cmd, NULL);
184}
185
186struct mmc *find_mmc_device(int dev_num)
187{
188 struct mmc *m;
189 struct list_head *entry;
190
191 list_for_each(entry, &mmc_devices) {
192 m = list_entry(entry, struct mmc, link);
193
Simon Glassbcce53d2016-02-29 15:25:51 -0700194 if (m->block_dev.devnum == dev_num)
Andy Fleming272cc702008-10-30 16:41:01 -0500195 return m;
196 }
197
Paul Burton56196822013-09-04 16:12:25 +0100198#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -0500199 printf("MMC Device %d not found\n", dev_num);
Paul Burton56196822013-09-04 16:12:25 +0100200#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500201
202 return NULL;
203}
204
Sascha Silbeff8fef52013-06-14 13:07:25 +0200205static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000206 lbaint_t blkcnt)
Andy Fleming272cc702008-10-30 16:41:01 -0500207{
208 struct mmc_cmd cmd;
209 struct mmc_data data;
210
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700211 if (blkcnt > 1)
212 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
213 else
214 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Fleming272cc702008-10-30 16:41:01 -0500215
216 if (mmc->high_capacity)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700217 cmd.cmdarg = start;
Andy Fleming272cc702008-10-30 16:41:01 -0500218 else
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700219 cmd.cmdarg = start * mmc->read_bl_len;
Andy Fleming272cc702008-10-30 16:41:01 -0500220
221 cmd.resp_type = MMC_RSP_R1;
Andy Fleming272cc702008-10-30 16:41:01 -0500222
223 data.dest = dst;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700224 data.blocks = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500225 data.blocksize = mmc->read_bl_len;
226 data.flags = MMC_DATA_READ;
227
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700228 if (mmc_send_cmd(mmc, &cmd, &data))
229 return 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500230
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700231 if (blkcnt > 1) {
232 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
233 cmd.cmdarg = 0;
234 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700235 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton56196822013-09-04 16:12:25 +0100236#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700237 printf("mmc fail to send stop cmd\n");
Paul Burton56196822013-09-04 16:12:25 +0100238#endif
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700239 return 0;
240 }
Andy Fleming272cc702008-10-30 16:41:01 -0500241 }
242
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700243 return blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500244}
245
Simon Glass4101f682016-02-29 15:25:34 -0700246static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
Stephen Warren7c4213f2015-12-07 11:38:48 -0700247 lbaint_t blkcnt, void *dst)
Andy Fleming272cc702008-10-30 16:41:01 -0500248{
Simon Glassbcce53d2016-02-29 15:25:51 -0700249 int dev_num = block_dev->devnum;
Stephen Warren873cc1d2015-12-07 11:38:49 -0700250 int err;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700251 lbaint_t cur, blocks_todo = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500252
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700253 if (blkcnt == 0)
254 return 0;
255
256 struct mmc *mmc = find_mmc_device(dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500257 if (!mmc)
258 return 0;
259
Simon Glass69f45cd2016-05-01 13:52:29 -0600260 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
Stephen Warren873cc1d2015-12-07 11:38:49 -0700261 if (err < 0)
262 return 0;
263
Lei Wend2bf29e2010-09-13 22:07:27 +0800264 if ((start + blkcnt) > mmc->block_dev.lba) {
Paul Burton56196822013-09-04 16:12:25 +0100265#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbeff8fef52013-06-14 13:07:25 +0200266 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Lei Wend2bf29e2010-09-13 22:07:27 +0800267 start + blkcnt, mmc->block_dev.lba);
Paul Burton56196822013-09-04 16:12:25 +0100268#endif
Lei Wend2bf29e2010-09-13 22:07:27 +0800269 return 0;
270 }
Andy Fleming272cc702008-10-30 16:41:01 -0500271
Simon Glass11692992015-06-23 15:38:50 -0600272 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
273 debug("%s: Failed to set blocklen\n", __func__);
Andy Fleming272cc702008-10-30 16:41:01 -0500274 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600275 }
Andy Fleming272cc702008-10-30 16:41:01 -0500276
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700277 do {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200278 cur = (blocks_todo > mmc->cfg->b_max) ?
279 mmc->cfg->b_max : blocks_todo;
Simon Glass11692992015-06-23 15:38:50 -0600280 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
281 debug("%s: Failed to read blocks\n", __func__);
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700282 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600283 }
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700284 blocks_todo -= cur;
285 start += cur;
286 dst += cur * mmc->read_bl_len;
287 } while (blocks_todo > 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500288
289 return blkcnt;
290}
291
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000292static int mmc_go_idle(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500293{
294 struct mmc_cmd cmd;
295 int err;
296
297 udelay(1000);
298
299 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
300 cmd.cmdarg = 0;
301 cmd.resp_type = MMC_RSP_NONE;
Andy Fleming272cc702008-10-30 16:41:01 -0500302
303 err = mmc_send_cmd(mmc, &cmd, NULL);
304
305 if (err)
306 return err;
307
308 udelay(2000);
309
310 return 0;
311}
312
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000313static int sd_send_op_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500314{
315 int timeout = 1000;
316 int err;
317 struct mmc_cmd cmd;
318
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500319 while (1) {
Andy Fleming272cc702008-10-30 16:41:01 -0500320 cmd.cmdidx = MMC_CMD_APP_CMD;
321 cmd.resp_type = MMC_RSP_R1;
322 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500323
324 err = mmc_send_cmd(mmc, &cmd, NULL);
325
326 if (err)
327 return err;
328
329 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
330 cmd.resp_type = MMC_RSP_R3;
Stefano Babic250de122010-01-20 18:20:39 +0100331
332 /*
333 * Most cards do not answer if some reserved bits
334 * in the ocr are set. However, Some controller
335 * can set bit 7 (reserved for low voltages), but
336 * how to manage low voltages SD card is not yet
337 * specified.
338 */
Thomas Choud52ebf12010-12-24 13:12:21 +0000339 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200340 (mmc->cfg->voltages & 0xff8000);
Andy Fleming272cc702008-10-30 16:41:01 -0500341
342 if (mmc->version == SD_VERSION_2)
343 cmd.cmdarg |= OCR_HCS;
344
345 err = mmc_send_cmd(mmc, &cmd, NULL);
346
347 if (err)
348 return err;
349
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500350 if (cmd.response[0] & OCR_BUSY)
351 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500352
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500353 if (timeout-- <= 0)
354 return UNUSABLE_ERR;
355
356 udelay(1000);
357 }
Andy Fleming272cc702008-10-30 16:41:01 -0500358
359 if (mmc->version != SD_VERSION_2)
360 mmc->version = SD_VERSION_1_0;
361
Thomas Choud52ebf12010-12-24 13:12:21 +0000362 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
363 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
364 cmd.resp_type = MMC_RSP_R3;
365 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000366
367 err = mmc_send_cmd(mmc, &cmd, NULL);
368
369 if (err)
370 return err;
371 }
372
Rabin Vincent998be3d2009-04-05 13:30:56 +0530373 mmc->ocr = cmd.response[0];
Andy Fleming272cc702008-10-30 16:41:01 -0500374
375 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
376 mmc->rca = 0;
377
378 return 0;
379}
380
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500381static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
Andy Fleming272cc702008-10-30 16:41:01 -0500382{
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500383 struct mmc_cmd cmd;
Andy Fleming272cc702008-10-30 16:41:01 -0500384 int err;
385
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500386 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
387 cmd.resp_type = MMC_RSP_R3;
388 cmd.cmdarg = 0;
Rob Herring5a203972015-03-23 17:56:59 -0500389 if (use_arg && !mmc_host_is_spi(mmc))
390 cmd.cmdarg = OCR_HCS |
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200391 (mmc->cfg->voltages &
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500392 (mmc->ocr & OCR_VOLTAGE_MASK)) |
393 (mmc->ocr & OCR_ACCESS_MODE);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000394
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500395 err = mmc_send_cmd(mmc, &cmd, NULL);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000396 if (err)
397 return err;
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500398 mmc->ocr = cmd.response[0];
Che-Liang Chioue9550442012-11-28 15:21:13 +0000399 return 0;
400}
401
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200402static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000403{
Che-Liang Chioue9550442012-11-28 15:21:13 +0000404 int err, i;
405
Andy Fleming272cc702008-10-30 16:41:01 -0500406 /* Some cards seem to need this */
407 mmc_go_idle(mmc);
408
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000409 /* Asking to the card its capabilities */
Che-Liang Chioue9550442012-11-28 15:21:13 +0000410 for (i = 0; i < 2; i++) {
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500411 err = mmc_send_op_cond_iter(mmc, i != 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500412 if (err)
413 return err;
414
Che-Liang Chioue9550442012-11-28 15:21:13 +0000415 /* exit if not busy (flag seems to be inverted) */
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500416 if (mmc->ocr & OCR_BUSY)
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500417 break;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000418 }
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500419 mmc->op_cond_pending = 1;
420 return 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000421}
Andy Fleming272cc702008-10-30 16:41:01 -0500422
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200423static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000424{
425 struct mmc_cmd cmd;
426 int timeout = 1000;
427 uint start;
428 int err;
429
430 mmc->op_cond_pending = 0;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500431 if (!(mmc->ocr & OCR_BUSY)) {
432 start = get_timer(0);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500433 while (1) {
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500434 err = mmc_send_op_cond_iter(mmc, 1);
435 if (err)
436 return err;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500437 if (mmc->ocr & OCR_BUSY)
438 break;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500439 if (get_timer(start) > timeout)
440 return UNUSABLE_ERR;
441 udelay(100);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500442 }
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500443 }
Andy Fleming272cc702008-10-30 16:41:01 -0500444
Thomas Choud52ebf12010-12-24 13:12:21 +0000445 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
446 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
447 cmd.resp_type = MMC_RSP_R3;
448 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000449
450 err = mmc_send_cmd(mmc, &cmd, NULL);
451
452 if (err)
453 return err;
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500454
455 mmc->ocr = cmd.response[0];
Thomas Choud52ebf12010-12-24 13:12:21 +0000456 }
457
Andy Fleming272cc702008-10-30 16:41:01 -0500458 mmc->version = MMC_VERSION_UNKNOWN;
Andy Fleming272cc702008-10-30 16:41:01 -0500459
460 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrendef816a2014-01-30 16:11:12 -0700461 mmc->rca = 1;
Andy Fleming272cc702008-10-30 16:41:01 -0500462
463 return 0;
464}
465
466
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000467static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Fleming272cc702008-10-30 16:41:01 -0500468{
469 struct mmc_cmd cmd;
470 struct mmc_data data;
471 int err;
472
473 /* Get the Card Status Register */
474 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
475 cmd.resp_type = MMC_RSP_R1;
476 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500477
Yoshihiro Shimodacdfd1ac2012-06-07 19:09:11 +0000478 data.dest = (char *)ext_csd;
Andy Fleming272cc702008-10-30 16:41:01 -0500479 data.blocks = 1;
Simon Glass8bfa1952013-04-03 08:54:30 +0000480 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -0500481 data.flags = MMC_DATA_READ;
482
483 err = mmc_send_cmd(mmc, &cmd, &data);
484
485 return err;
486}
487
488
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000489static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Fleming272cc702008-10-30 16:41:01 -0500490{
491 struct mmc_cmd cmd;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000492 int timeout = 1000;
493 int ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500494
495 cmd.cmdidx = MMC_CMD_SWITCH;
496 cmd.resp_type = MMC_RSP_R1b;
497 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000498 (index << 16) |
499 (value << 8);
Andy Fleming272cc702008-10-30 16:41:01 -0500500
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000501 ret = mmc_send_cmd(mmc, &cmd, NULL);
502
503 /* Waiting for the ready status */
Jan Kloetzke93ad0d12012-02-05 22:29:11 +0000504 if (!ret)
505 ret = mmc_send_status(mmc, timeout);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000506
507 return ret;
508
Andy Fleming272cc702008-10-30 16:41:01 -0500509}
510
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000511static int mmc_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500512{
Simon Glass8bfa1952013-04-03 08:54:30 +0000513 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Andy Fleming272cc702008-10-30 16:41:01 -0500514 char cardtype;
515 int err;
516
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600517 mmc->card_caps = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500518
Thomas Choud52ebf12010-12-24 13:12:21 +0000519 if (mmc_host_is_spi(mmc))
520 return 0;
521
Andy Fleming272cc702008-10-30 16:41:01 -0500522 /* Only version 4 supports high-speed */
523 if (mmc->version < MMC_VERSION_4)
524 return 0;
525
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600526 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
527
Andy Fleming272cc702008-10-30 16:41:01 -0500528 err = mmc_send_ext_csd(mmc, ext_csd);
529
530 if (err)
531 return err;
532
Lei Wen0560db12011-10-03 20:35:10 +0000533 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -0500534
535 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
536
537 if (err)
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500538 return err == SWITCH_ERR ? 0 : err;
Andy Fleming272cc702008-10-30 16:41:01 -0500539
540 /* Now check to see that it worked */
541 err = mmc_send_ext_csd(mmc, ext_csd);
542
543 if (err)
544 return err;
545
546 /* No high-speed support */
Lei Wen0560db12011-10-03 20:35:10 +0000547 if (!ext_csd[EXT_CSD_HS_TIMING])
Andy Fleming272cc702008-10-30 16:41:01 -0500548 return 0;
549
550 /* High Speed is set, there are two types: 52MHz and 26MHz */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900551 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Andrew Gabbasov201d5ac2014-12-01 06:59:10 -0600552 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900553 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Andy Fleming272cc702008-10-30 16:41:01 -0500554 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900555 } else {
Andy Fleming272cc702008-10-30 16:41:01 -0500556 mmc->card_caps |= MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900557 }
Andy Fleming272cc702008-10-30 16:41:01 -0500558
559 return 0;
560}
561
Stephen Warrenf866a462013-06-11 15:14:01 -0600562static int mmc_set_capacity(struct mmc *mmc, int part_num)
563{
564 switch (part_num) {
565 case 0:
566 mmc->capacity = mmc->capacity_user;
567 break;
568 case 1:
569 case 2:
570 mmc->capacity = mmc->capacity_boot;
571 break;
572 case 3:
573 mmc->capacity = mmc->capacity_rpmb;
574 break;
575 case 4:
576 case 5:
577 case 6:
578 case 7:
579 mmc->capacity = mmc->capacity_gp[part_num - 4];
580 break;
581 default:
582 return -1;
583 }
584
585 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
586
587 return 0;
588}
589
Lei Wenbc897b12011-05-02 16:26:26 +0000590int mmc_switch_part(int dev_num, unsigned int part_num)
591{
592 struct mmc *mmc = find_mmc_device(dev_num);
Stephen Warrenf866a462013-06-11 15:14:01 -0600593 int ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000594
595 if (!mmc)
596 return -1;
597
Stephen Warrenf866a462013-06-11 15:14:01 -0600598 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
599 (mmc->part_config & ~PART_ACCESS_MASK)
600 | (part_num & PART_ACCESS_MASK));
Stephen Warrenf866a462013-06-11 15:14:01 -0600601
Peter Bigot6dc93e72014-09-02 18:31:23 -0500602 /*
603 * Set the capacity if the switch succeeded or was intended
604 * to return to representing the raw device.
605 */
Stephen Warren873cc1d2015-12-07 11:38:49 -0700606 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
Peter Bigot6dc93e72014-09-02 18:31:23 -0500607 ret = mmc_set_capacity(mmc, part_num);
Stephen Warren873cc1d2015-12-07 11:38:49 -0700608 mmc->block_dev.hwpart = part_num;
609 }
Peter Bigot6dc93e72014-09-02 18:31:23 -0500610
611 return ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000612}
613
Simon Glasse17d1142016-05-01 13:52:26 -0600614static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)
615{
616 struct mmc *mmc = find_mmc_device(desc->devnum);
617 int ret;
618
619 if (!mmc)
620 return -ENODEV;
621
622 if (mmc->block_dev.hwpart == hwpart)
623 return 0;
624
625 if (mmc->part_config == MMCPART_NOAVAILABLE)
626 return -EMEDIUMTYPE;
627
628 ret = mmc_switch_part(desc->devnum, hwpart);
629 if (ret)
630 return ret;
631
632 return 0;
633}
634
Simon Glassff3882a2016-05-01 13:52:25 -0600635int mmc_select_hwpart(int dev_num, int hwpart)
636{
637 struct mmc *mmc = find_mmc_device(dev_num);
638 int ret;
639
640 if (!mmc)
641 return -ENODEV;
642
643 if (mmc->block_dev.hwpart == hwpart)
644 return 0;
645
646 if (mmc->part_config == MMCPART_NOAVAILABLE)
647 return -EMEDIUMTYPE;
648
649 ret = mmc_switch_part(dev_num, hwpart);
650 if (ret)
651 return ret;
652
653 return 0;
654}
655
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100656int mmc_hwpart_config(struct mmc *mmc,
657 const struct mmc_hwpart_conf *conf,
658 enum mmc_hwpart_conf_mode mode)
659{
660 u8 part_attrs = 0;
661 u32 enh_size_mult;
662 u32 enh_start_addr;
663 u32 gp_size_mult[4];
664 u32 max_enh_size_mult;
665 u32 tot_enh_size_mult = 0;
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100666 u8 wr_rel_set;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100667 int i, pidx, err;
668 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
669
670 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
671 return -EINVAL;
672
673 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
674 printf("eMMC >= 4.4 required for enhanced user data area\n");
675 return -EMEDIUMTYPE;
676 }
677
678 if (!(mmc->part_support & PART_SUPPORT)) {
679 printf("Card does not support partitioning\n");
680 return -EMEDIUMTYPE;
681 }
682
683 if (!mmc->hc_wp_grp_size) {
684 printf("Card does not define HC WP group size\n");
685 return -EMEDIUMTYPE;
686 }
687
688 /* check partition alignment and total enhanced size */
689 if (conf->user.enh_size) {
690 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
691 conf->user.enh_start % mmc->hc_wp_grp_size) {
692 printf("User data enhanced area not HC WP group "
693 "size aligned\n");
694 return -EINVAL;
695 }
696 part_attrs |= EXT_CSD_ENH_USR;
697 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
698 if (mmc->high_capacity) {
699 enh_start_addr = conf->user.enh_start;
700 } else {
701 enh_start_addr = (conf->user.enh_start << 9);
702 }
703 } else {
704 enh_size_mult = 0;
705 enh_start_addr = 0;
706 }
707 tot_enh_size_mult += enh_size_mult;
708
709 for (pidx = 0; pidx < 4; pidx++) {
710 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
711 printf("GP%i partition not HC WP group size "
712 "aligned\n", pidx+1);
713 return -EINVAL;
714 }
715 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
716 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
717 part_attrs |= EXT_CSD_ENH_GP(pidx);
718 tot_enh_size_mult += gp_size_mult[pidx];
719 }
720 }
721
722 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
723 printf("Card does not support enhanced attribute\n");
724 return -EMEDIUMTYPE;
725 }
726
727 err = mmc_send_ext_csd(mmc, ext_csd);
728 if (err)
729 return err;
730
731 max_enh_size_mult =
732 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
733 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
734 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
735 if (tot_enh_size_mult > max_enh_size_mult) {
736 printf("Total enhanced size exceeds maximum (%u > %u)\n",
737 tot_enh_size_mult, max_enh_size_mult);
738 return -EMEDIUMTYPE;
739 }
740
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100741 /* The default value of EXT_CSD_WR_REL_SET is device
742 * dependent, the values can only be changed if the
743 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
744 * changed only once and before partitioning is completed. */
745 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
746 if (conf->user.wr_rel_change) {
747 if (conf->user.wr_rel_set)
748 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
749 else
750 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
751 }
752 for (pidx = 0; pidx < 4; pidx++) {
753 if (conf->gp_part[pidx].wr_rel_change) {
754 if (conf->gp_part[pidx].wr_rel_set)
755 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
756 else
757 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
758 }
759 }
760
761 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
762 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
763 puts("Card does not support host controlled partition write "
764 "reliability settings\n");
765 return -EMEDIUMTYPE;
766 }
767
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100768 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
769 EXT_CSD_PARTITION_SETTING_COMPLETED) {
770 printf("Card already partitioned\n");
771 return -EPERM;
772 }
773
774 if (mode == MMC_HWPART_CONF_CHECK)
775 return 0;
776
777 /* Partitioning requires high-capacity size definitions */
778 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
779 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
780 EXT_CSD_ERASE_GROUP_DEF, 1);
781
782 if (err)
783 return err;
784
785 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
786
787 /* update erase group size to be high-capacity */
788 mmc->erase_grp_size =
789 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
790
791 }
792
793 /* all OK, write the configuration */
794 for (i = 0; i < 4; i++) {
795 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
796 EXT_CSD_ENH_START_ADDR+i,
797 (enh_start_addr >> (i*8)) & 0xFF);
798 if (err)
799 return err;
800 }
801 for (i = 0; i < 3; i++) {
802 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
803 EXT_CSD_ENH_SIZE_MULT+i,
804 (enh_size_mult >> (i*8)) & 0xFF);
805 if (err)
806 return err;
807 }
808 for (pidx = 0; pidx < 4; pidx++) {
809 for (i = 0; i < 3; i++) {
810 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
811 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
812 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
813 if (err)
814 return err;
815 }
816 }
817 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
818 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
819 if (err)
820 return err;
821
822 if (mode == MMC_HWPART_CONF_SET)
823 return 0;
824
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100825 /* The WR_REL_SET is a write-once register but shall be
826 * written before setting PART_SETTING_COMPLETED. As it is
827 * write-once we can only write it when completing the
828 * partitioning. */
829 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
830 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
831 EXT_CSD_WR_REL_SET, wr_rel_set);
832 if (err)
833 return err;
834 }
835
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100836 /* Setting PART_SETTING_COMPLETED confirms the partition
837 * configuration but it only becomes effective after power
838 * cycle, so we do not adjust the partition related settings
839 * in the mmc struct. */
840
841 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
842 EXT_CSD_PARTITION_SETTING,
843 EXT_CSD_PARTITION_SETTING_COMPLETED);
844 if (err)
845 return err;
846
847 return 0;
848}
849
Thierry Reding48972d92012-01-02 01:15:37 +0000850int mmc_getcd(struct mmc *mmc)
851{
852 int cd;
853
854 cd = board_mmc_getcd(mmc);
855
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000856 if (cd < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200857 if (mmc->cfg->ops->getcd)
858 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000859 else
860 cd = 1;
861 }
Thierry Reding48972d92012-01-02 01:15:37 +0000862
863 return cd;
864}
865
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000866static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Fleming272cc702008-10-30 16:41:01 -0500867{
868 struct mmc_cmd cmd;
869 struct mmc_data data;
870
871 /* Switch the frequency */
872 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
873 cmd.resp_type = MMC_RSP_R1;
874 cmd.cmdarg = (mode << 31) | 0xffffff;
875 cmd.cmdarg &= ~(0xf << (group * 4));
876 cmd.cmdarg |= value << (group * 4);
Andy Fleming272cc702008-10-30 16:41:01 -0500877
878 data.dest = (char *)resp;
879 data.blocksize = 64;
880 data.blocks = 1;
881 data.flags = MMC_DATA_READ;
882
883 return mmc_send_cmd(mmc, &cmd, &data);
884}
885
886
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000887static int sd_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500888{
889 int err;
890 struct mmc_cmd cmd;
Anton staaff781dd32011-10-03 13:54:59 +0000891 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
892 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Andy Fleming272cc702008-10-30 16:41:01 -0500893 struct mmc_data data;
894 int timeout;
895
896 mmc->card_caps = 0;
897
Thomas Choud52ebf12010-12-24 13:12:21 +0000898 if (mmc_host_is_spi(mmc))
899 return 0;
900
Andy Fleming272cc702008-10-30 16:41:01 -0500901 /* Read the SCR to find out if this card supports higher speeds */
902 cmd.cmdidx = MMC_CMD_APP_CMD;
903 cmd.resp_type = MMC_RSP_R1;
904 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -0500905
906 err = mmc_send_cmd(mmc, &cmd, NULL);
907
908 if (err)
909 return err;
910
911 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
912 cmd.resp_type = MMC_RSP_R1;
913 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500914
915 timeout = 3;
916
917retry_scr:
Anton staaff781dd32011-10-03 13:54:59 +0000918 data.dest = (char *)scr;
Andy Fleming272cc702008-10-30 16:41:01 -0500919 data.blocksize = 8;
920 data.blocks = 1;
921 data.flags = MMC_DATA_READ;
922
923 err = mmc_send_cmd(mmc, &cmd, &data);
924
925 if (err) {
926 if (timeout--)
927 goto retry_scr;
928
929 return err;
930 }
931
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300932 mmc->scr[0] = __be32_to_cpu(scr[0]);
933 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Fleming272cc702008-10-30 16:41:01 -0500934
935 switch ((mmc->scr[0] >> 24) & 0xf) {
Bin Meng53e8e402016-03-17 21:53:13 -0700936 case 0:
937 mmc->version = SD_VERSION_1_0;
938 break;
939 case 1:
940 mmc->version = SD_VERSION_1_10;
941 break;
942 case 2:
943 mmc->version = SD_VERSION_2;
944 if ((mmc->scr[0] >> 15) & 0x1)
945 mmc->version = SD_VERSION_3;
946 break;
947 default:
948 mmc->version = SD_VERSION_1_0;
949 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500950 }
951
Alagu Sankarb44c7082010-05-12 15:08:24 +0530952 if (mmc->scr[0] & SD_DATA_4BIT)
953 mmc->card_caps |= MMC_MODE_4BIT;
954
Andy Fleming272cc702008-10-30 16:41:01 -0500955 /* Version 1.0 doesn't support switching */
956 if (mmc->version == SD_VERSION_1_0)
957 return 0;
958
959 timeout = 4;
960 while (timeout--) {
961 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaff781dd32011-10-03 13:54:59 +0000962 (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500963
964 if (err)
965 return err;
966
967 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300968 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Fleming272cc702008-10-30 16:41:01 -0500969 break;
970 }
971
Andy Fleming272cc702008-10-30 16:41:01 -0500972 /* If high-speed isn't supported, we return */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300973 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
Andy Fleming272cc702008-10-30 16:41:01 -0500974 return 0;
975
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000976 /*
977 * If the host doesn't support SD_HIGHSPEED, do not switch card to
978 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
979 * This can avoid furthur problem when the card runs in different
980 * mode between the host.
981 */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200982 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
983 (mmc->cfg->host_caps & MMC_MODE_HS)))
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000984 return 0;
985
Anton staaff781dd32011-10-03 13:54:59 +0000986 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500987
988 if (err)
989 return err;
990
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300991 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
Andy Fleming272cc702008-10-30 16:41:01 -0500992 mmc->card_caps |= MMC_MODE_HS;
993
994 return 0;
995}
996
997/* frequency bases */
998/* divided by 10 to be nice to platforms without floating point */
Mike Frysinger5f837c22010-10-20 01:15:53 +0000999static const int fbase[] = {
Andy Fleming272cc702008-10-30 16:41:01 -05001000 10000,
1001 100000,
1002 1000000,
1003 10000000,
1004};
1005
1006/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
1007 * to platforms without floating point.
1008 */
Mike Frysinger5f837c22010-10-20 01:15:53 +00001009static const int multipliers[] = {
Andy Fleming272cc702008-10-30 16:41:01 -05001010 0, /* reserved */
1011 10,
1012 12,
1013 13,
1014 15,
1015 20,
1016 25,
1017 30,
1018 35,
1019 40,
1020 45,
1021 50,
1022 55,
1023 60,
1024 70,
1025 80,
1026};
1027
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001028static void mmc_set_ios(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001029{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001030 if (mmc->cfg->ops->set_ios)
1031 mmc->cfg->ops->set_ios(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001032}
1033
1034void mmc_set_clock(struct mmc *mmc, uint clock)
1035{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001036 if (clock > mmc->cfg->f_max)
1037 clock = mmc->cfg->f_max;
Andy Fleming272cc702008-10-30 16:41:01 -05001038
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001039 if (clock < mmc->cfg->f_min)
1040 clock = mmc->cfg->f_min;
Andy Fleming272cc702008-10-30 16:41:01 -05001041
1042 mmc->clock = clock;
1043
1044 mmc_set_ios(mmc);
1045}
1046
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001047static void mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Fleming272cc702008-10-30 16:41:01 -05001048{
1049 mmc->bus_width = width;
1050
1051 mmc_set_ios(mmc);
1052}
1053
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001054static int mmc_startup(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001055{
Stephen Warrenf866a462013-06-11 15:14:01 -06001056 int err, i;
Andy Fleming272cc702008-10-30 16:41:01 -05001057 uint mult, freq;
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001058 u64 cmult, csize, capacity;
Andy Fleming272cc702008-10-30 16:41:01 -05001059 struct mmc_cmd cmd;
Simon Glass8bfa1952013-04-03 08:54:30 +00001060 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1061 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001062 int timeout = 1000;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001063 bool has_parts = false;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001064 bool part_completed;
Andy Fleming272cc702008-10-30 16:41:01 -05001065
Thomas Choud52ebf12010-12-24 13:12:21 +00001066#ifdef CONFIG_MMC_SPI_CRC_ON
1067 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1068 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1069 cmd.resp_type = MMC_RSP_R1;
1070 cmd.cmdarg = 1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001071 err = mmc_send_cmd(mmc, &cmd, NULL);
1072
1073 if (err)
1074 return err;
1075 }
1076#endif
1077
Andy Fleming272cc702008-10-30 16:41:01 -05001078 /* Put the Card in Identify Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001079 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1080 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Fleming272cc702008-10-30 16:41:01 -05001081 cmd.resp_type = MMC_RSP_R2;
1082 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001083
1084 err = mmc_send_cmd(mmc, &cmd, NULL);
1085
1086 if (err)
1087 return err;
1088
1089 memcpy(mmc->cid, cmd.response, 16);
1090
1091 /*
1092 * For MMC cards, set the Relative Address.
1093 * For SD cards, get the Relatvie Address.
1094 * This also puts the cards into Standby State
1095 */
Thomas Choud52ebf12010-12-24 13:12:21 +00001096 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1097 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1098 cmd.cmdarg = mmc->rca << 16;
1099 cmd.resp_type = MMC_RSP_R6;
Andy Fleming272cc702008-10-30 16:41:01 -05001100
Thomas Choud52ebf12010-12-24 13:12:21 +00001101 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001102
Thomas Choud52ebf12010-12-24 13:12:21 +00001103 if (err)
1104 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001105
Thomas Choud52ebf12010-12-24 13:12:21 +00001106 if (IS_SD(mmc))
1107 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1108 }
Andy Fleming272cc702008-10-30 16:41:01 -05001109
1110 /* Get the Card-Specific Data */
1111 cmd.cmdidx = MMC_CMD_SEND_CSD;
1112 cmd.resp_type = MMC_RSP_R2;
1113 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001114
1115 err = mmc_send_cmd(mmc, &cmd, NULL);
1116
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001117 /* Waiting for the ready status */
1118 mmc_send_status(mmc, timeout);
1119
Andy Fleming272cc702008-10-30 16:41:01 -05001120 if (err)
1121 return err;
1122
Rabin Vincent998be3d2009-04-05 13:30:56 +05301123 mmc->csd[0] = cmd.response[0];
1124 mmc->csd[1] = cmd.response[1];
1125 mmc->csd[2] = cmd.response[2];
1126 mmc->csd[3] = cmd.response[3];
Andy Fleming272cc702008-10-30 16:41:01 -05001127
1128 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301129 int version = (cmd.response[0] >> 26) & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -05001130
1131 switch (version) {
Bin Meng53e8e402016-03-17 21:53:13 -07001132 case 0:
1133 mmc->version = MMC_VERSION_1_2;
1134 break;
1135 case 1:
1136 mmc->version = MMC_VERSION_1_4;
1137 break;
1138 case 2:
1139 mmc->version = MMC_VERSION_2_2;
1140 break;
1141 case 3:
1142 mmc->version = MMC_VERSION_3;
1143 break;
1144 case 4:
1145 mmc->version = MMC_VERSION_4;
1146 break;
1147 default:
1148 mmc->version = MMC_VERSION_1_2;
1149 break;
Andy Fleming272cc702008-10-30 16:41:01 -05001150 }
1151 }
1152
1153 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301154 freq = fbase[(cmd.response[0] & 0x7)];
1155 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Fleming272cc702008-10-30 16:41:01 -05001156
1157 mmc->tran_speed = freq * mult;
1158
Markus Niebelab711882013-12-16 13:40:46 +01001159 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincent998be3d2009-04-05 13:30:56 +05301160 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001161
1162 if (IS_SD(mmc))
1163 mmc->write_bl_len = mmc->read_bl_len;
1164 else
Rabin Vincent998be3d2009-04-05 13:30:56 +05301165 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001166
1167 if (mmc->high_capacity) {
1168 csize = (mmc->csd[1] & 0x3f) << 16
1169 | (mmc->csd[2] & 0xffff0000) >> 16;
1170 cmult = 8;
1171 } else {
1172 csize = (mmc->csd[1] & 0x3ff) << 2
1173 | (mmc->csd[2] & 0xc0000000) >> 30;
1174 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1175 }
1176
Stephen Warrenf866a462013-06-11 15:14:01 -06001177 mmc->capacity_user = (csize + 1) << (cmult + 2);
1178 mmc->capacity_user *= mmc->read_bl_len;
1179 mmc->capacity_boot = 0;
1180 mmc->capacity_rpmb = 0;
1181 for (i = 0; i < 4; i++)
1182 mmc->capacity_gp[i] = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001183
Simon Glass8bfa1952013-04-03 08:54:30 +00001184 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1185 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001186
Simon Glass8bfa1952013-04-03 08:54:30 +00001187 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1188 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001189
Markus Niebelab711882013-12-16 13:40:46 +01001190 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1191 cmd.cmdidx = MMC_CMD_SET_DSR;
1192 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1193 cmd.resp_type = MMC_RSP_NONE;
1194 if (mmc_send_cmd(mmc, &cmd, NULL))
1195 printf("MMC: SET_DSR failed\n");
1196 }
1197
Andy Fleming272cc702008-10-30 16:41:01 -05001198 /* Select the card, and put it into Transfer Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001199 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1200 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargavfe8f7062011-10-05 03:13:23 +00001201 cmd.resp_type = MMC_RSP_R1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001202 cmd.cmdarg = mmc->rca << 16;
Thomas Choud52ebf12010-12-24 13:12:21 +00001203 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001204
Thomas Choud52ebf12010-12-24 13:12:21 +00001205 if (err)
1206 return err;
1207 }
Andy Fleming272cc702008-10-30 16:41:01 -05001208
Lei Wene6f99a52011-06-22 17:03:31 +00001209 /*
1210 * For SD, its erase group is always one sector
1211 */
1212 mmc->erase_grp_size = 1;
Lei Wenbc897b12011-05-02 16:26:26 +00001213 mmc->part_config = MMCPART_NOAVAILABLE;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301214 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1215 /* check ext_csd version and capacity */
1216 err = mmc_send_ext_csd(mmc, ext_csd);
Diego Santa Cruz9cf199e2014-12-23 10:50:28 +01001217 if (err)
1218 return err;
1219 if (ext_csd[EXT_CSD_REV] >= 2) {
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001220 /*
1221 * According to the JEDEC Standard, the value of
1222 * ext_csd's capacity is valid if the value is more
1223 * than 2GB
1224 */
Lei Wen0560db12011-10-03 20:35:10 +00001225 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1226 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1227 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1228 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
Simon Glass8bfa1952013-04-03 08:54:30 +00001229 capacity *= MMC_MAX_BLOCK_LEN;
Łukasz Majewskib1f1e8212011-07-05 02:19:44 +00001230 if ((capacity >> 20) > 2 * 1024)
Stephen Warrenf866a462013-06-11 15:14:01 -06001231 mmc->capacity_user = capacity;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301232 }
Lei Wenbc897b12011-05-02 16:26:26 +00001233
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001234 switch (ext_csd[EXT_CSD_REV]) {
1235 case 1:
1236 mmc->version = MMC_VERSION_4_1;
1237 break;
1238 case 2:
1239 mmc->version = MMC_VERSION_4_2;
1240 break;
1241 case 3:
1242 mmc->version = MMC_VERSION_4_3;
1243 break;
1244 case 5:
1245 mmc->version = MMC_VERSION_4_41;
1246 break;
1247 case 6:
1248 mmc->version = MMC_VERSION_4_5;
1249 break;
Markus Niebeledab7232014-11-18 15:13:53 +01001250 case 7:
1251 mmc->version = MMC_VERSION_5_0;
1252 break;
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001253 }
1254
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001255 /* The partition data may be non-zero but it is only
1256 * effective if PARTITION_SETTING_COMPLETED is set in
1257 * EXT_CSD, so ignore any data if this bit is not set,
1258 * except for enabling the high-capacity group size
1259 * definition (see below). */
1260 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1261 EXT_CSD_PARTITION_SETTING_COMPLETED);
1262
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001263 /* store the partition info of emmc */
1264 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1265 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1266 ext_csd[EXT_CSD_BOOT_MULT])
1267 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001268 if (part_completed &&
1269 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001270 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1271
1272 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1273
1274 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1275
1276 for (i = 0; i < 4; i++) {
1277 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001278 uint mult = (ext_csd[idx + 2] << 16) +
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001279 (ext_csd[idx + 1] << 8) + ext_csd[idx];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001280 if (mult)
1281 has_parts = true;
1282 if (!part_completed)
1283 continue;
1284 mmc->capacity_gp[i] = mult;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001285 mmc->capacity_gp[i] *=
1286 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1287 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruzf8e89d62014-12-23 10:50:21 +01001288 mmc->capacity_gp[i] <<= 19;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001289 }
1290
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001291 if (part_completed) {
1292 mmc->enh_user_size =
1293 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1294 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1295 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1296 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1297 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1298 mmc->enh_user_size <<= 19;
1299 mmc->enh_user_start =
1300 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1301 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1302 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1303 ext_csd[EXT_CSD_ENH_START_ADDR];
1304 if (mmc->high_capacity)
1305 mmc->enh_user_start <<= 9;
1306 }
Diego Santa Cruza7f852b2014-12-23 10:50:22 +01001307
Lei Wene6f99a52011-06-22 17:03:31 +00001308 /*
Oliver Metz1937e5a2013-10-01 20:32:07 +02001309 * Host needs to enable ERASE_GRP_DEF bit if device is
1310 * partitioned. This bit will be lost every time after a reset
1311 * or power off. This will affect erase size.
Lei Wene6f99a52011-06-22 17:03:31 +00001312 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001313 if (part_completed)
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001314 has_parts = true;
Oliver Metz1937e5a2013-10-01 20:32:07 +02001315 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001316 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1317 has_parts = true;
1318 if (has_parts) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001319 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1320 EXT_CSD_ERASE_GROUP_DEF, 1);
1321
1322 if (err)
1323 return err;
Hannes Petermaier021a8052014-08-08 09:47:22 +02001324 else
1325 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001326 }
Oliver Metz1937e5a2013-10-01 20:32:07 +02001327
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001328 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001329 /* Read out group size from ext_csd */
Lei Wen0560db12011-10-03 20:35:10 +00001330 mmc->erase_grp_size =
Diego Santa Cruza4ff9f82014-12-23 10:50:24 +01001331 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Markus Niebeld7b29122014-11-18 15:11:42 +01001332 /*
1333 * if high capacity and partition setting completed
1334 * SEC_COUNT is valid even if it is smaller than 2 GiB
1335 * JEDEC Standard JESD84-B45, 6.2.4
1336 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001337 if (mmc->high_capacity && part_completed) {
Markus Niebeld7b29122014-11-18 15:11:42 +01001338 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1339 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1340 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1341 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1342 capacity *= MMC_MAX_BLOCK_LEN;
1343 mmc->capacity_user = capacity;
1344 }
Simon Glass8bfa1952013-04-03 08:54:30 +00001345 } else {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001346 /* Calculate the group size from the csd value. */
Lei Wene6f99a52011-06-22 17:03:31 +00001347 int erase_gsz, erase_gmul;
1348 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1349 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1350 mmc->erase_grp_size = (erase_gsz + 1)
1351 * (erase_gmul + 1);
1352 }
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001353
1354 mmc->hc_wp_grp_size = 1024
1355 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1356 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruz9e41a002014-12-23 10:50:33 +01001357
1358 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301359 }
1360
Stephen Warren873cc1d2015-12-07 11:38:49 -07001361 err = mmc_set_capacity(mmc, mmc->block_dev.hwpart);
Stephen Warrenf866a462013-06-11 15:14:01 -06001362 if (err)
1363 return err;
1364
Andy Fleming272cc702008-10-30 16:41:01 -05001365 if (IS_SD(mmc))
1366 err = sd_change_freq(mmc);
1367 else
1368 err = mmc_change_freq(mmc);
1369
1370 if (err)
1371 return err;
1372
1373 /* Restrict card's capabilities by what the host can do */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001374 mmc->card_caps &= mmc->cfg->host_caps;
Andy Fleming272cc702008-10-30 16:41:01 -05001375
1376 if (IS_SD(mmc)) {
1377 if (mmc->card_caps & MMC_MODE_4BIT) {
1378 cmd.cmdidx = MMC_CMD_APP_CMD;
1379 cmd.resp_type = MMC_RSP_R1;
1380 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001381
1382 err = mmc_send_cmd(mmc, &cmd, NULL);
1383 if (err)
1384 return err;
1385
1386 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1387 cmd.resp_type = MMC_RSP_R1;
1388 cmd.cmdarg = 2;
Andy Fleming272cc702008-10-30 16:41:01 -05001389 err = mmc_send_cmd(mmc, &cmd, NULL);
1390 if (err)
1391 return err;
1392
1393 mmc_set_bus_width(mmc, 4);
1394 }
1395
1396 if (mmc->card_caps & MMC_MODE_HS)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001397 mmc->tran_speed = 50000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001398 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001399 mmc->tran_speed = 25000000;
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -06001400 } else if (mmc->version >= MMC_VERSION_4) {
1401 /* Only version 4 of MMC supports wider bus widths */
Andy Fleming7798f6d2012-10-31 19:02:38 +00001402 int idx;
1403
1404 /* An array of possible bus widths in order of preference */
1405 static unsigned ext_csd_bits[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001406 EXT_CSD_DDR_BUS_WIDTH_8,
1407 EXT_CSD_DDR_BUS_WIDTH_4,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001408 EXT_CSD_BUS_WIDTH_8,
1409 EXT_CSD_BUS_WIDTH_4,
1410 EXT_CSD_BUS_WIDTH_1,
1411 };
1412
1413 /* An array to map CSD bus widths to host cap bits */
1414 static unsigned ext_to_hostcaps[] = {
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001415 [EXT_CSD_DDR_BUS_WIDTH_4] =
1416 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1417 [EXT_CSD_DDR_BUS_WIDTH_8] =
1418 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001419 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1420 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1421 };
1422
1423 /* An array to map chosen bus width to an integer */
1424 static unsigned widths[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001425 8, 4, 8, 4, 1,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001426 };
1427
1428 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1429 unsigned int extw = ext_csd_bits[idx];
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001430 unsigned int caps = ext_to_hostcaps[extw];
Andy Fleming7798f6d2012-10-31 19:02:38 +00001431
1432 /*
Andrew Gabbasovbf477072014-12-25 10:22:24 -06001433 * If the bus width is still not changed,
1434 * don't try to set the default again.
1435 * Otherwise, recover from switch attempts
1436 * by switching to 1-bit bus width.
1437 */
1438 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1439 mmc->bus_width == 1) {
1440 err = 0;
1441 break;
1442 }
1443
1444 /*
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001445 * Check to make sure the card and controller support
1446 * these capabilities
Andy Fleming7798f6d2012-10-31 19:02:38 +00001447 */
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001448 if ((mmc->card_caps & caps) != caps)
Andy Fleming7798f6d2012-10-31 19:02:38 +00001449 continue;
1450
Andy Fleming272cc702008-10-30 16:41:01 -05001451 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001452 EXT_CSD_BUS_WIDTH, extw);
Andy Fleming272cc702008-10-30 16:41:01 -05001453
1454 if (err)
Lei Wen41378942011-10-03 20:35:11 +00001455 continue;
Andy Fleming272cc702008-10-30 16:41:01 -05001456
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001457 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
Andy Fleming7798f6d2012-10-31 19:02:38 +00001458 mmc_set_bus_width(mmc, widths[idx]);
Andy Fleming272cc702008-10-30 16:41:01 -05001459
Lei Wen41378942011-10-03 20:35:11 +00001460 err = mmc_send_ext_csd(mmc, test_csd);
Andy Fleming272cc702008-10-30 16:41:01 -05001461
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001462 if (err)
1463 continue;
1464
1465 /* Only compare read only fields */
1466 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1467 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1468 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1469 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1470 ext_csd[EXT_CSD_REV]
1471 == test_csd[EXT_CSD_REV] &&
1472 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1473 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1474 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1475 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
Lei Wen41378942011-10-03 20:35:11 +00001476 break;
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001477 else
1478 err = SWITCH_ERR;
Andy Fleming272cc702008-10-30 16:41:01 -05001479 }
1480
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001481 if (err)
1482 return err;
1483
Andy Fleming272cc702008-10-30 16:41:01 -05001484 if (mmc->card_caps & MMC_MODE_HS) {
1485 if (mmc->card_caps & MMC_MODE_HS_52MHz)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001486 mmc->tran_speed = 52000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001487 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001488 mmc->tran_speed = 26000000;
1489 }
Andy Fleming272cc702008-10-30 16:41:01 -05001490 }
1491
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001492 mmc_set_clock(mmc, mmc->tran_speed);
1493
Andrew Gabbasov5af8f452014-12-01 06:59:11 -06001494 /* Fix the block length for DDR mode */
1495 if (mmc->ddr_mode) {
1496 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1497 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1498 }
1499
Andy Fleming272cc702008-10-30 16:41:01 -05001500 /* fill in device description */
1501 mmc->block_dev.lun = 0;
Stephen Warren873cc1d2015-12-07 11:38:49 -07001502 mmc->block_dev.hwpart = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001503 mmc->block_dev.type = 0;
1504 mmc->block_dev.blksz = mmc->read_bl_len;
Egbert Eich0472fbf2013-04-09 21:11:56 +00001505 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
Rabin Vincent9b1f9422009-04-05 13:30:54 +05301506 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
Sjoerd Simonsfc011f62015-12-04 23:27:40 +01001507#if !defined(CONFIG_SPL_BUILD) || \
1508 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1509 !defined(CONFIG_USE_TINY_PRINTF))
Taylor Huttbabce5f2012-10-20 17:15:59 +00001510 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1511 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1512 (mmc->cid[3] >> 16) & 0xffff);
1513 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1514 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1515 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1516 (mmc->cid[2] >> 24) & 0xff);
1517 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1518 (mmc->cid[2] >> 16) & 0xf);
Paul Burton56196822013-09-04 16:12:25 +01001519#else
1520 mmc->block_dev.vendor[0] = 0;
1521 mmc->block_dev.product[0] = 0;
1522 mmc->block_dev.revision[0] = 0;
1523#endif
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001524#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Simon Glass3e8bd462016-02-29 15:25:48 -07001525 part_init(&mmc->block_dev);
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001526#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001527
1528 return 0;
1529}
1530
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001531static int mmc_send_if_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001532{
1533 struct mmc_cmd cmd;
1534 int err;
1535
1536 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1537 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001538 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Fleming272cc702008-10-30 16:41:01 -05001539 cmd.resp_type = MMC_RSP_R7;
Andy Fleming272cc702008-10-30 16:41:01 -05001540
1541 err = mmc_send_cmd(mmc, &cmd, NULL);
1542
1543 if (err)
1544 return err;
1545
Rabin Vincent998be3d2009-04-05 13:30:56 +05301546 if ((cmd.response[0] & 0xff) != 0xaa)
Andy Fleming272cc702008-10-30 16:41:01 -05001547 return UNUSABLE_ERR;
1548 else
1549 mmc->version = SD_VERSION_2;
1550
1551 return 0;
1552}
1553
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001554/* not used any more */
1555int __deprecated mmc_register(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001556{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001557#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1558 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1559#endif
1560 return -1;
1561}
1562
1563struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1564{
1565 struct mmc *mmc;
1566
1567 /* quick validation */
1568 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1569 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1570 return NULL;
1571
1572 mmc = calloc(1, sizeof(*mmc));
1573 if (mmc == NULL)
1574 return NULL;
1575
1576 mmc->cfg = cfg;
1577 mmc->priv = priv;
1578
1579 /* the following chunk was mmc_register() */
1580
Markus Niebelab711882013-12-16 13:40:46 +01001581 /* Setup dsr related values */
1582 mmc->dsr_imp = 0;
1583 mmc->dsr = 0xffffffff;
Andy Fleming272cc702008-10-30 16:41:01 -05001584 /* Setup the universal parts of the block interface just once */
1585 mmc->block_dev.if_type = IF_TYPE_MMC;
Simon Glassbcce53d2016-02-29 15:25:51 -07001586 mmc->block_dev.devnum = cur_dev_num++;
Andy Fleming272cc702008-10-30 16:41:01 -05001587 mmc->block_dev.removable = 1;
1588 mmc->block_dev.block_read = mmc_bread;
1589 mmc->block_dev.block_write = mmc_bwrite;
Lei Wene6f99a52011-06-22 17:03:31 +00001590 mmc->block_dev.block_erase = mmc_berase;
Andy Fleming272cc702008-10-30 16:41:01 -05001591
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001592 /* setup initial part type */
1593 mmc->block_dev.part_type = mmc->cfg->part_type;
Andy Fleming272cc702008-10-30 16:41:01 -05001594
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001595 INIT_LIST_HEAD(&mmc->link);
Andy Fleming272cc702008-10-30 16:41:01 -05001596
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001597 list_add_tail(&mmc->link, &mmc_devices);
1598
1599 return mmc;
1600}
1601
1602void mmc_destroy(struct mmc *mmc)
1603{
1604 /* only freeing memory for now */
1605 free(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001606}
1607
Simon Glass3c457f42016-05-01 11:36:15 -06001608static int mmc_get_dev(int dev, struct blk_desc **descp)
Simon Glass663acab2016-05-01 11:36:07 -06001609{
1610 struct mmc *mmc = find_mmc_device(dev);
1611 int ret;
1612
1613 if (!mmc)
1614 return -ENODEV;
1615 ret = mmc_init(mmc);
1616 if (ret)
1617 return ret;
1618
1619 *descp = &mmc->block_dev;
1620
1621 return 0;
1622}
1623
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001624/* board-specific MMC power initializations. */
1625__weak void board_mmc_power_init(void)
1626{
1627}
1628
Che-Liang Chioue9550442012-11-28 15:21:13 +00001629int mmc_start_init(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001630{
Macpaul Linafd59322011-11-14 23:35:39 +00001631 int err;
Andy Fleming272cc702008-10-30 16:41:01 -05001632
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001633 /* we pretend there's no card when init is NULL */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001634 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
Thierry Reding48972d92012-01-02 01:15:37 +00001635 mmc->has_init = 0;
Paul Burton56196822013-09-04 16:12:25 +01001636#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Reding48972d92012-01-02 01:15:37 +00001637 printf("MMC: no card present\n");
Paul Burton56196822013-09-04 16:12:25 +01001638#endif
Thierry Reding48972d92012-01-02 01:15:37 +00001639 return NO_CARD_ERR;
1640 }
1641
Lei Wenbc897b12011-05-02 16:26:26 +00001642 if (mmc->has_init)
1643 return 0;
1644
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08001645#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1646 mmc_adapter_card_type_ident();
1647#endif
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001648 board_mmc_power_init();
1649
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001650 /* made sure it's not NULL earlier */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001651 err = mmc->cfg->ops->init(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001652
1653 if (err)
1654 return err;
1655
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001656 mmc->ddr_mode = 0;
Ilya Yanokb86b85e2009-06-29 17:53:16 +04001657 mmc_set_bus_width(mmc, 1);
1658 mmc_set_clock(mmc, 1);
1659
Andy Fleming272cc702008-10-30 16:41:01 -05001660 /* Reset the Card */
1661 err = mmc_go_idle(mmc);
1662
1663 if (err)
1664 return err;
1665
Lei Wenbc897b12011-05-02 16:26:26 +00001666 /* The internal partition reset to user partition(0) at every CMD0*/
Stephen Warren873cc1d2015-12-07 11:38:49 -07001667 mmc->block_dev.hwpart = 0;
Lei Wenbc897b12011-05-02 16:26:26 +00001668
Andy Fleming272cc702008-10-30 16:41:01 -05001669 /* Test for SD version 2 */
Macpaul Linafd59322011-11-14 23:35:39 +00001670 err = mmc_send_if_cond(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001671
Andy Fleming272cc702008-10-30 16:41:01 -05001672 /* Now try to get the SD card's operating condition */
1673 err = sd_send_op_cond(mmc);
1674
1675 /* If the command timed out, we check for an MMC card */
1676 if (err == TIMEOUT) {
1677 err = mmc_send_op_cond(mmc);
1678
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001679 if (err) {
Paul Burton56196822013-09-04 16:12:25 +01001680#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -05001681 printf("Card did not respond to voltage select!\n");
Paul Burton56196822013-09-04 16:12:25 +01001682#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001683 return UNUSABLE_ERR;
1684 }
1685 }
1686
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001687 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001688 mmc->init_in_progress = 1;
1689
1690 return err;
1691}
1692
1693static int mmc_complete_init(struct mmc *mmc)
1694{
1695 int err = 0;
1696
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001697 mmc->init_in_progress = 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001698 if (mmc->op_cond_pending)
1699 err = mmc_complete_op_cond(mmc);
1700
1701 if (!err)
1702 err = mmc_startup(mmc);
Lei Wenbc897b12011-05-02 16:26:26 +00001703 if (err)
1704 mmc->has_init = 0;
1705 else
1706 mmc->has_init = 1;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001707 return err;
1708}
1709
1710int mmc_init(struct mmc *mmc)
1711{
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001712 int err = 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001713 unsigned start;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001714
1715 if (mmc->has_init)
1716 return 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001717
1718 start = get_timer(0);
1719
Che-Liang Chioue9550442012-11-28 15:21:13 +00001720 if (!mmc->init_in_progress)
1721 err = mmc_start_init(mmc);
1722
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001723 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001724 err = mmc_complete_init(mmc);
1725 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
Lei Wenbc897b12011-05-02 16:26:26 +00001726 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001727}
1728
Markus Niebelab711882013-12-16 13:40:46 +01001729int mmc_set_dsr(struct mmc *mmc, u16 val)
1730{
1731 mmc->dsr = val;
1732 return 0;
1733}
1734
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001735/* CPU-specific MMC initializations */
1736__weak int cpu_mmc_init(bd_t *bis)
Andy Fleming272cc702008-10-30 16:41:01 -05001737{
1738 return -1;
1739}
1740
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001741/* board-specific MMC initializations. */
1742__weak int board_mmc_init(bd_t *bis)
1743{
1744 return -1;
1745}
Andy Fleming272cc702008-10-30 16:41:01 -05001746
Paul Burton56196822013-09-04 16:12:25 +01001747#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1748
Andy Fleming272cc702008-10-30 16:41:01 -05001749void print_mmc_devices(char separator)
1750{
1751 struct mmc *m;
1752 struct list_head *entry;
Przemyslaw Marczak34dd9282015-02-20 12:29:27 +01001753 char *mmc_type;
Andy Fleming272cc702008-10-30 16:41:01 -05001754
1755 list_for_each(entry, &mmc_devices) {
1756 m = list_entry(entry, struct mmc, link);
1757
Przemyslaw Marczak34dd9282015-02-20 12:29:27 +01001758 if (m->has_init)
1759 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1760 else
1761 mmc_type = NULL;
1762
Simon Glassbcce53d2016-02-29 15:25:51 -07001763 printf("%s: %d", m->cfg->name, m->block_dev.devnum);
Przemyslaw Marczak34dd9282015-02-20 12:29:27 +01001764 if (mmc_type)
1765 printf(" (%s)", mmc_type);
Andy Fleming272cc702008-10-30 16:41:01 -05001766
Lubomir Popove75eaf12014-11-11 12:25:42 +02001767 if (entry->next != &mmc_devices) {
1768 printf("%c", separator);
1769 if (separator != '\n')
1770 puts (" ");
1771 }
Andy Fleming272cc702008-10-30 16:41:01 -05001772 }
1773
1774 printf("\n");
1775}
1776
Paul Burton56196822013-09-04 16:12:25 +01001777#else
1778void print_mmc_devices(char separator) { }
1779#endif
1780
Lei Wenea6ebe22011-05-02 16:26:25 +00001781int get_mmc_num(void)
1782{
1783 return cur_dev_num;
1784}
1785
Che-Liang Chioue9550442012-11-28 15:21:13 +00001786void mmc_set_preinit(struct mmc *mmc, int preinit)
1787{
1788 mmc->preinit = preinit;
1789}
1790
1791static void do_preinit(void)
1792{
1793 struct mmc *m;
1794 struct list_head *entry;
1795
1796 list_for_each(entry, &mmc_devices) {
1797 m = list_entry(entry, struct mmc, link);
1798
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08001799#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1800 mmc_set_preinit(m, 1);
1801#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001802 if (m->preinit)
1803 mmc_start_init(m);
1804 }
1805}
1806
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001807#if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1808static int mmc_probe(bd_t *bis)
1809{
1810 return 0;
1811}
1812#elif defined(CONFIG_DM_MMC)
1813static int mmc_probe(bd_t *bis)
1814{
Simon Glass4a1db6d2015-12-29 05:22:49 -07001815 int ret, i;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001816 struct uclass *uc;
Simon Glass4a1db6d2015-12-29 05:22:49 -07001817 struct udevice *dev;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001818
1819 ret = uclass_get(UCLASS_MMC, &uc);
1820 if (ret)
1821 return ret;
1822
Simon Glass4a1db6d2015-12-29 05:22:49 -07001823 /*
1824 * Try to add them in sequence order. Really with driver model we
1825 * should allow holes, but the current MMC list does not allow that.
1826 * So if we request 0, 1, 3 we will get 0, 1, 2.
1827 */
1828 for (i = 0; ; i++) {
1829 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1830 if (ret == -ENODEV)
1831 break;
1832 }
1833 uclass_foreach_dev(dev, uc) {
1834 ret = device_probe(dev);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001835 if (ret)
Simon Glass4a1db6d2015-12-29 05:22:49 -07001836 printf("%s - probe failed: %d\n", dev->name, ret);
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001837 }
1838
1839 return 0;
1840}
1841#else
1842static int mmc_probe(bd_t *bis)
1843{
1844 if (board_mmc_init(bis) < 0)
1845 cpu_mmc_init(bis);
1846
1847 return 0;
1848}
1849#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001850
Andy Fleming272cc702008-10-30 16:41:01 -05001851int mmc_initialize(bd_t *bis)
1852{
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001853 static int initialized = 0;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001854 int ret;
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001855 if (initialized) /* Avoid initializing mmc multiple times */
1856 return 0;
1857 initialized = 1;
1858
Andy Fleming272cc702008-10-30 16:41:01 -05001859 INIT_LIST_HEAD (&mmc_devices);
1860 cur_dev_num = 0;
1861
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001862 ret = mmc_probe(bis);
1863 if (ret)
1864 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -05001865
Ying Zhangbb0dc102013-08-16 15:16:11 +08001866#ifndef CONFIG_SPL_BUILD
Andy Fleming272cc702008-10-30 16:41:01 -05001867 print_mmc_devices(',');
Ying Zhangbb0dc102013-08-16 15:16:11 +08001868#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001869
Che-Liang Chioue9550442012-11-28 15:21:13 +00001870 do_preinit();
Andy Fleming272cc702008-10-30 16:41:01 -05001871 return 0;
1872}
Amar3690d6d2013-04-27 11:42:58 +05301873
1874#ifdef CONFIG_SUPPORT_EMMC_BOOT
1875/*
1876 * This function changes the size of boot partition and the size of rpmb
1877 * partition present on EMMC devices.
1878 *
1879 * Input Parameters:
1880 * struct *mmc: pointer for the mmc device strcuture
1881 * bootsize: size of boot partition
1882 * rpmbsize: size of rpmb partition
1883 *
1884 * Returns 0 on success.
1885 */
1886
1887int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1888 unsigned long rpmbsize)
1889{
1890 int err;
1891 struct mmc_cmd cmd;
1892
1893 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1894 cmd.cmdidx = MMC_CMD_RES_MAN;
1895 cmd.resp_type = MMC_RSP_R1b;
1896 cmd.cmdarg = MMC_CMD62_ARG1;
1897
1898 err = mmc_send_cmd(mmc, &cmd, NULL);
1899 if (err) {
1900 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1901 return err;
1902 }
1903
1904 /* Boot partition changing mode */
1905 cmd.cmdidx = MMC_CMD_RES_MAN;
1906 cmd.resp_type = MMC_RSP_R1b;
1907 cmd.cmdarg = MMC_CMD62_ARG2;
1908
1909 err = mmc_send_cmd(mmc, &cmd, NULL);
1910 if (err) {
1911 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1912 return err;
1913 }
1914 /* boot partition size is multiple of 128KB */
1915 bootsize = (bootsize * 1024) / 128;
1916
1917 /* Arg: boot partition size */
1918 cmd.cmdidx = MMC_CMD_RES_MAN;
1919 cmd.resp_type = MMC_RSP_R1b;
1920 cmd.cmdarg = bootsize;
1921
1922 err = mmc_send_cmd(mmc, &cmd, NULL);
1923 if (err) {
1924 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1925 return err;
1926 }
1927 /* RPMB partition size is multiple of 128KB */
1928 rpmbsize = (rpmbsize * 1024) / 128;
1929 /* Arg: RPMB partition size */
1930 cmd.cmdidx = MMC_CMD_RES_MAN;
1931 cmd.resp_type = MMC_RSP_R1b;
1932 cmd.cmdarg = rpmbsize;
1933
1934 err = mmc_send_cmd(mmc, &cmd, NULL);
1935 if (err) {
1936 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1937 return err;
1938 }
1939 return 0;
1940}
1941
1942/*
Tom Rini5a99b9d2014-02-05 10:24:22 -05001943 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1944 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1945 * and BOOT_MODE.
1946 *
1947 * Returns 0 on success.
1948 */
1949int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1950{
1951 int err;
1952
1953 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1954 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1955 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1956 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1957
1958 if (err)
1959 return err;
1960 return 0;
1961}
1962
1963/*
Tom Rini792970b2014-02-05 10:24:21 -05001964 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1965 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1966 * PARTITION_ACCESS.
1967 *
1968 * Returns 0 on success.
1969 */
1970int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1971{
1972 int err;
1973
1974 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1975 EXT_CSD_BOOT_ACK(ack) |
1976 EXT_CSD_BOOT_PART_NUM(part_num) |
1977 EXT_CSD_PARTITION_ACCESS(access));
1978
1979 if (err)
1980 return err;
1981 return 0;
1982}
Tom Rini33ace362014-02-07 14:15:20 -05001983
1984/*
1985 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1986 * for enable. Note that this is a write-once field for non-zero values.
1987 *
1988 * Returns 0 on success.
1989 */
1990int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1991{
1992 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1993 enable);
1994}
Amar3690d6d2013-04-27 11:42:58 +05301995#endif
Simon Glass663acab2016-05-01 11:36:07 -06001996
1997U_BOOT_LEGACY_BLK(mmc) = {
1998 .if_typename = "mmc",
1999 .if_type = IF_TYPE_MMC,
2000 .max_devs = -1,
Simon Glass3c457f42016-05-01 11:36:15 -06002001 .get_dev = mmc_get_dev,
Simon Glasse17d1142016-05-01 13:52:26 -06002002 .select_hwpart = mmc_select_hwpartp,
Simon Glass663acab2016-05-01 11:36:07 -06002003};