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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thomas Chouc8a7ba92015-10-09 13:46:34 +08002/*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
Thomas Chouc8a7ba92015-10-09 13:46:34 +08004 */
5
6#include <common.h>
Sean Anderson35761212020-09-28 10:52:22 -04007#include <cpu.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +08008#include <dm.h>
Simon Glass691d7192020-05-10 11:40:02 -06009#include <init.h>
Mugunthan V Nc8336972016-01-16 21:33:58 +053010#include <dm/lists.h>
11#include <dm/device-internal.h>
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020012#include <dm/root.h>
Zakharov Vlada5acafb2016-12-09 17:18:32 +030013#include <clk.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080014#include <errno.h>
15#include <timer.h>
Simon Glass61b29b82020-02-03 07:36:15 -070016#include <linux/err.h>
Thomas Chouc8a7ba92015-10-09 13:46:34 +080017
Bin Meng579eb5a2015-11-13 00:11:15 -080018DECLARE_GLOBAL_DATA_PTR;
19
Thomas Chouc8a7ba92015-10-09 13:46:34 +080020/*
Bin Meng435ae762015-11-13 00:11:14 -080021 * Implement a timer uclass to work with lib/time.c. The timer is usually
Bin Meng9ca07eb2015-11-24 13:31:17 -070022 * a 32/64 bits free-running up counter. The get_rate() method is used to get
Thomas Chouc8a7ba92015-10-09 13:46:34 +080023 * the input clock frequency of the timer. The get_count() method is used
Bin Meng9ca07eb2015-11-24 13:31:17 -070024 * to get the current 64 bits count value. If the hardware is counting down,
Thomas Chouc8a7ba92015-10-09 13:46:34 +080025 * the value should be inversed inside the method. There may be no real
26 * tick, and no timer interrupt.
27 */
28
Simon Glass4f051822016-02-24 09:14:48 -070029int notrace timer_get_count(struct udevice *dev, u64 *count)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080030{
31 const struct timer_ops *ops = device_get_ops(dev);
32
33 if (!ops->get_count)
34 return -ENOSYS;
35
36 return ops->get_count(dev, count);
37}
38
Simon Glass4f051822016-02-24 09:14:48 -070039unsigned long notrace timer_get_rate(struct udevice *dev)
Thomas Chouc8a7ba92015-10-09 13:46:34 +080040{
Simon Glass4f051822016-02-24 09:14:48 -070041 struct timer_dev_priv *uc_priv = dev->uclass_priv;
Thomas Chouc8a7ba92015-10-09 13:46:34 +080042
43 return uc_priv->clock_rate;
44}
45
Bin Meng579eb5a2015-11-13 00:11:15 -080046static int timer_pre_probe(struct udevice *dev)
47{
Philipp Tomsichb1a16002017-07-28 17:19:58 +020048#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Bin Meng579eb5a2015-11-13 00:11:15 -080049 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
Zakharov Vlada5acafb2016-12-09 17:18:32 +030050 struct clk timer_clk;
51 int err;
52 ulong ret;
Bin Meng579eb5a2015-11-13 00:11:15 -080053
Bin Meng7efb4a62019-07-05 09:23:15 -070054 /* It is possible that a timer device has a null ofnode */
55 if (!dev_of_valid(dev))
56 return 0;
57
Zakharov Vlada5acafb2016-12-09 17:18:32 +030058 err = clk_get_by_index(dev, 0, &timer_clk);
59 if (!err) {
60 ret = clk_get_rate(&timer_clk);
61 if (IS_ERR_VALUE(ret))
62 return ret;
63 uc_priv->clock_rate = ret;
Philipp Tomsichb61e8b02017-09-11 22:04:10 +020064 } else {
65 uc_priv->clock_rate =
66 dev_read_u32_default(dev, "clock-frequency", 0);
67 }
Philipp Tomsichb1a16002017-07-28 17:19:58 +020068#endif
Bin Meng579eb5a2015-11-13 00:11:15 -080069
70 return 0;
71}
72
Stephen Warren0a7edce2016-01-06 10:33:03 -070073static int timer_post_probe(struct udevice *dev)
74{
75 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
76
77 if (!uc_priv->clock_rate)
78 return -EINVAL;
79
80 return 0;
81}
82
Sean Anderson35761212020-09-28 10:52:22 -040083/*
84 * TODO: should be CONFIG_IS_ENABLED(CPU), but the SPL config has _SUPPORT on
85 * the end...
86 */
87#if defined(CONFIG_CPU) || defined(CONFIG_SPL_CPU_SUPPORT)
88int timer_timebase_fallback(struct udevice *dev)
89{
90 struct udevice *cpu;
91 struct cpu_platdata *cpu_plat;
92 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
93
94 /* Did we get our clock rate from the device tree? */
95 if (uc_priv->clock_rate)
96 return 0;
97
98 /* Fall back to timebase-frequency */
99 dev_dbg(dev, "missing clocks or clock-frequency property; falling back on timebase-frequency\n");
100 cpu = cpu_get_current_dev();
101 if (!cpu)
102 return -ENODEV;
103
104 cpu_plat = dev_get_parent_platdata(cpu);
105 if (!cpu_plat)
106 return -ENODEV;
107
108 uc_priv->clock_rate = cpu_plat->timebase_freq;
109 return 0;
110}
111#endif
112
Bin Meng9ca07eb2015-11-24 13:31:17 -0700113u64 timer_conv_64(u32 count)
114{
115 /* increment tbh if tbl has rolled over */
116 if (count < gd->timebase_l)
117 gd->timebase_h++;
118 gd->timebase_l = count;
119 return ((u64)gd->timebase_h << 32) | gd->timebase_l;
120}
121
Mugunthan V Nc8336972016-01-16 21:33:58 +0530122int notrace dm_timer_init(void)
123{
Mugunthan V Nc8336972016-01-16 21:33:58 +0530124 struct udevice *dev = NULL;
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200125 __maybe_unused ofnode node;
Mugunthan V Nc8336972016-01-16 21:33:58 +0530126 int ret;
127
128 if (gd->timer)
129 return 0;
130
Philipp Tomsichaf823152017-09-11 22:04:11 +0200131 /*
132 * Directly access gd->dm_root to suppress error messages, if the
133 * virtual root driver does not yet exist.
134 */
135 if (gd->dm_root == NULL)
136 return -EAGAIN;
137
Philipp Tomsichb1a16002017-07-28 17:19:58 +0200138#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Mugunthan V Nc8336972016-01-16 21:33:58 +0530139 /* Check for a chosen timer to be used for tick */
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200140 node = ofnode_get_chosen_node("tick-timer");
141
142 if (ofnode_valid(node) &&
143 uclass_get_device_by_ofnode(UCLASS_TIMER, node, &dev)) {
144 /*
145 * If the timer is not marked to be bound before
146 * relocation, bind it anyway.
147 */
Bin Meng8d773c42018-10-10 22:06:58 -0700148 if (!lists_bind_fdt(dm_root(), node, &dev, false)) {
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200149 ret = device_probe(dev);
150 if (ret)
151 return ret;
152 }
153 }
Philipp Tomsichb1a16002017-07-28 17:19:58 +0200154#endif
Philipp Tomsichb61e8b02017-09-11 22:04:10 +0200155
156 if (!dev) {
157 /* Fall back to the first available timer */
Simon Glass3f603cb2016-02-11 13:23:26 -0700158 ret = uclass_first_device_err(UCLASS_TIMER, &dev);
Mugunthan V Nc8336972016-01-16 21:33:58 +0530159 if (ret)
160 return ret;
Mugunthan V Nc8336972016-01-16 21:33:58 +0530161 }
162
163 if (dev) {
164 gd->timer = dev;
165 return 0;
166 }
167
168 return -ENODEV;
169}
170
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800171UCLASS_DRIVER(timer) = {
172 .id = UCLASS_TIMER,
173 .name = "timer",
Bin Meng579eb5a2015-11-13 00:11:15 -0800174 .pre_probe = timer_pre_probe,
Mugunthan V Na5d80112015-12-24 16:08:06 +0530175 .flags = DM_UC_FLAG_SEQ_ALIAS,
Stephen Warren0a7edce2016-01-06 10:33:03 -0700176 .post_probe = timer_post_probe,
Thomas Chouc8a7ba92015-10-09 13:46:34 +0800177 .per_device_auto_alloc_size = sizeof(struct timer_dev_priv),
178};