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Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +02001/*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * (C) Copyright 2009
8 * Frederik Kriewitz <frederik@kriewitz.eu>
9 *
10 * Configuration settings for the DevKit8000 board.
11 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +020012 * SPDX-License-Identifier: GPL-2.0+
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020013 */
14
15#ifndef __CONFIG_H
16#define __CONFIG_H
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020017
18/* High Level Configuration Options */
Simon Schwarz2d52a9a2012-03-15 04:01:40 +000019#define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
Marek Vasut308252a2012-07-21 05:02:23 +000020
Simon Schwarz5183b7e2011-12-05 23:16:28 +000021/*
22 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
23 * 64 bytes before this address should be set aside for u-boot.img's
24 * header. That is 0x800FFFC0--0x80100000 should not be used for any
25 * other needs.
26 */
Thomas Weber66fca012010-10-18 15:38:15 +020027
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010028#define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
29#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
30
31#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
32#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
Vaibhav Hiremathcae377b2010-06-07 15:20:34 -040033
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010034/* Physical Memory Map */
35#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010036
Anthoine Bourgeoisa91ef4a2015-01-02 00:35:43 +010037#include <configs/ti_omap3_common.h>
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010038
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020039#define CONFIG_MISC_INIT_R
40
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020041#define CONFIG_REVISION_TAG 1
42
43/* Size of malloc() pool */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040044#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020045 /* Sector */
Anthoine Bourgeois875e4152015-01-02 00:35:42 +010046#undef CONFIG_SYS_MALLOC_LEN
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040047#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020048
49/* Hardware drivers */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020050/* DM9000 */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020051#define CONFIG_NET_RETRY_COUNT 20
52#define CONFIG_DRIVER_DM9000 1
53#define CONFIG_DM9000_BASE 0x2c000000
54#define DM9000_IO CONFIG_DM9000_BASE
55#define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
56#define CONFIG_DM9000_USE_16BIT 1
57#define CONFIG_DM9000_NO_SROM 1
58#undef CONFIG_DM9000_DEBUG
59
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020060/* TWL4030 */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020061#define CONFIG_TWL4030_LED 1
62
63/* Board NAND Info */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020064
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020065#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
66 /* to access nand */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020067#define CONFIG_JFFS2_NAND
68/* nand device jffs2 lives on */
69#define CONFIG_JFFS2_DEV "nand0"
70/* start of jffs2 partition */
71#define CONFIG_JFFS2_PART_OFFSET 0x680000
72#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
73 /* partition */
74
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020075/* BOOTP/DHCP options */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020076#define CONFIG_BOOTP_NISDOMAIN
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020077#define CONFIG_BOOTP_BOOTFILESIZE
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020078#define CONFIG_BOOTP_DNS2
79#define CONFIG_BOOTP_SEND_HOSTNAME
80#define CONFIG_BOOTP_NTPSERVER
81#define CONFIG_BOOTP_TIMEOFFSET
82#undef CONFIG_BOOTP_VENDOREX
83
84/* Environment information */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020085#define CONFIG_EXTRA_ENV_SETTINGS \
86 "loadaddr=0x82000000\0" \
Thomas Weber2d76da22011-09-18 22:43:58 +000087 "console=ttyO2,115200n8\0" \
Tom Rinif4085012011-09-03 21:52:45 -040088 "mmcdev=0\0" \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +020089 "vram=12M\0" \
90 "dvimode=1024x768MR-16@60\0" \
91 "defaultdisplay=dvi\0" \
92 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
93 "kernelopts=rw\0" \
94 "commonargs=" \
95 "setenv bootargs console=${console} " \
96 "vram=${vram} " \
97 "omapfb.mode=dvi:${dvimode} " \
98 "omapdss.def_disp=${defaultdisplay}\0" \
99 "mmcargs=" \
100 "run commonargs; " \
101 "setenv bootargs ${bootargs} " \
102 "root=/dev/mmcblk0p2 " \
Andreas Bießmannb72db202012-08-30 23:53:32 +0000103 "rootwait " \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200104 "${kernelopts}\0" \
105 "nandargs=" \
106 "run commonargs; " \
107 "setenv bootargs ${bootargs} " \
108 "omapfb.mode=dvi:${dvimode} " \
109 "omapdss.def_disp=${defaultdisplay} " \
110 "root=/dev/mtdblock4 " \
111 "rootfstype=jffs2 " \
112 "${kernelopts}\0" \
113 "netargs=" \
114 "run commonargs; " \
115 "setenv bootargs ${bootargs} " \
116 "root=/dev/nfs " \
117 "nfsroot=${serverip}:${rootpath},${nfsopts} " \
118 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
119 "${kernelopts} " \
120 "dnsip1=${dnsip} " \
121 "dnsip2=${dnsip2}\0" \
Tom Rinif4085012011-09-03 21:52:45 -0400122 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200123 "bootscript=echo Running bootscript from mmc ...; " \
124 "source ${loadaddr}\0" \
Tom Rinif4085012011-09-03 21:52:45 -0400125 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200126 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
127 "mmcboot=echo Booting from mmc ...; " \
128 "run mmcargs; " \
129 "bootm ${loadaddr}\0" \
130 "nandboot=echo Booting from nand ...; " \
131 "run nandargs; " \
132 "nand read ${loadaddr} 280000 400000; " \
133 "bootm ${loadaddr}\0" \
134 "netboot=echo Booting from network ...; " \
135 "dhcp ${loadaddr}; " \
136 "run netargs; " \
137 "bootm ${loadaddr}\0" \
Andrew Bradford66968112012-10-01 05:06:52 +0000138 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200139 "if run loadbootscript; then " \
140 "run bootscript; " \
141 "else " \
142 "if run loaduimage; then " \
143 "run mmcboot; " \
144 "else run nandboot; " \
145 "fi; " \
146 "fi; " \
147 "else run nandboot; fi\0"
148
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200149#define CONFIG_BOOTCOMMAND "run autoboot"
150
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200151/* Boot Argument Buffer Size */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200152#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
153#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
154 0x01000000) /* 16MB */
155
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200156/* NAND and environment organization */
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200157
Adam Ford7672d9d2017-09-04 21:08:02 -0500158#define CONFIG_ENV_OFFSET 0x260000
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200159
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400160/* SRAM config */
161#define CONFIG_SYS_SRAM_START 0x40200000
162#define CONFIG_SYS_SRAM_SIZE 0x10000
163
164/* Defines for SPL */
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400165
Anthoine Bourgeoisa91ef4a2015-01-02 00:35:43 +0100166#undef CONFIG_SPL_TEXT_BASE
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400167#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400168
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400169/* NAND boot config */
Tom Rinic471ccb2011-11-09 16:40:04 -0500170#define CONFIG_SYS_NAND_5_ADDR_CYCLE
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400171#define CONFIG_SYS_NAND_PAGE_COUNT 64
172#define CONFIG_SYS_NAND_PAGE_SIZE 2048
173#define CONFIG_SYS_NAND_OOBSIZE 64
174#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
175#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
176#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
177 10, 11, 12, 13}
178
179#define CONFIG_SYS_NAND_ECCSIZE 512
180#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3f719062013-11-18 19:03:01 +0530181#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400182
Simon Schwarz3f6a4922011-09-14 15:32:17 -0400183#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
184#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
185
Simon Schwarzd38bc972012-03-15 04:01:35 +0000186/* SPL OS boot options */
Simon Schwarzd38bc972012-03-15 04:01:35 +0000187#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
Tom Rinib6144df2013-06-07 14:16:43 -0400188
Anthoine Bourgeois875e4152015-01-02 00:35:42 +0100189#undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
190#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
191#undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
Tom Rinib6144df2013-06-07 14:16:43 -0400192#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
193#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */
194#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */
195
Anthoine Bourgeoisa91ef4a2015-01-02 00:35:43 +0100196#undef CONFIG_SYS_SPL_ARGS_ADDR
Simon Schwarzd38bc972012-03-15 04:01:35 +0000197#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
198
Frederik Kriewitzc35d7cf2009-08-23 12:56:42 +0200199#endif /* __CONFIG_H */