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Hannes Petermaier893c04e2014-02-07 08:07:36 +01001/*
2 * bur_am335x_common.h
3 *
4 * common parts used by B&R AM335x based boards
5 *
Hannes Schmelzer4c302b92015-05-28 15:41:12 +02006 * Copyright (C) 2013 Hannes Schmelzer <oe5hpm@oevsv.at> -
Hannes Petermaier893c04e2014-02-07 08:07:36 +01007 * Bernecker & Rainer Industrieelektronik GmbH - http://www.br-automation.com
8 *
9 * SPDX-License-Identifier: GPL-2.0+
10 */
11
12#ifndef __BUR_AM335X_COMMON_H__
13#define __BUR_AM335X_COMMON_H__
14/* ------------------------------------------------------------------------- */
Hannes Petermaier7ae47f62015-02-03 13:22:34 +010015#define BUR_COMMON_ENV \
Hannes Petermaier5094bef2015-04-24 14:49:39 +020016"usbscript=usb start && fatload usb 0 0x80000000 usbscript.img && source\0" \
Hannes Petermaier6312e9a2015-08-25 13:55:41 +020017"brdefaultip=if test -r ${ipaddr}; then; else" \
18" setenv ipaddr 192.168.60.1; setenv serverip 192.168.60.254;" \
19" setenv gatewayip 192.168.60.254; setenv netmask 255.255.255.0; fi;\0" \
Hannes Petermaier7ae47f62015-02-03 13:22:34 +010020"netconsole=echo switching to network console ...; " \
Hannes Petermaier6312e9a2015-08-25 13:55:41 +020021"if dhcp; then; else run brdefaultip; fi; setenv ncip ${serverip}; " \
Hannes Schmelzerd8abb462015-05-28 16:41:54 +020022"setcurs 1 9; lcdputs myip; setcurs 10 9; lcdputs ${ipaddr};" \
23"setcurs 1 10;lcdputs serverip; setcurs 10 10; lcdputs ${serverip};" \
Hannes Petermaier7ae47f62015-02-03 13:22:34 +010024"setenv stdout nc;setenv stdin nc;setenv stderr nc\0"
25
Hannes Petermaier6312e9a2015-08-25 13:55:41 +020026#define CONFIG_PREBOOT "run brdefaultip"
Hannes Petermaier8f5c50f2015-02-03 13:22:35 +010027#define CONFIG_CMD_TIME
Hannes Petermaier11709e72015-02-03 13:22:36 +010028
Hannes Petermaier29a0d9c2014-06-04 10:22:07 +020029
Hannes Petermaier893c04e2014-02-07 08:07:36 +010030#define CONFIG_AM33XX
31#define CONFIG_OMAP
32#define CONFIG_OMAP_COMMON
33#define CONFIG_BOARD_LATE_INIT
34#define CONFIG_SYS_CACHELINE_SIZE 64
35#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
36
37/* Timer information */
38#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
39#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
Hannes Petermaier96de0412014-03-27 10:37:36 +010040#define CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC /* enable 32kHz OSC at bootime */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010041#define CONFIG_SPL_POWER_SUPPORT
42#define CONFIG_POWER_TPS65217
43
44#define CONFIG_SYS_NO_FLASH /* have no NOR-flash */
45
46#include <asm/arch/omap.h>
47
48/* NS16550 Configuration */
49#define CONFIG_SYS_NS16550
50#define CONFIG_SYS_NS16550_SERIAL
51#define CONFIG_SYS_NS16550_REG_SIZE (-4)
52#define CONFIG_SYS_NS16550_CLK 48000000
53#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
54#define CONFIG_BAUDRATE 115200
55
56/* Network defines */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010057#define CONFIG_CMD_DHCP
58#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */
59#define CONFIG_BOOTP_SEND_HOSTNAME
60#define CONFIG_BOOTP_GATEWAY
61#define CONFIG_BOOTP_SUBNETMASK
Hannes Petermaier7ae47f62015-02-03 13:22:34 +010062#define CONFIG_NET_RETRY_COUNT 2
Hannes Petermaier893c04e2014-02-07 08:07:36 +010063#define CONFIG_CMD_PING
64#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
65#define CONFIG_MII /* Required in net/eth.c */
66#define CONFIG_SPL_ETH_SUPPORT
67#define CONFIG_PHYLIB
Hannes Petermaier893c04e2014-02-07 08:07:36 +010068#define CONFIG_PHY_NATSEMI
69#define CONFIG_SPL_NET_SUPPORT
70#define CONFIG_SPL_ENV_SUPPORT /* used for a fetching MAC-Address */
71#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
Hannes Petermaier7ae47f62015-02-03 13:22:34 +010072/* Network console */
73#define CONFIG_NETCONSOLE 1
74#define CONFIG_BOOTP_MAY_FAIL /* if we don't have DHCP environment */
Hannes Petermaier893c04e2014-02-07 08:07:36 +010075/*
76 * SPL related defines. The Public RAM memory map the ROM defines the
77 * area between 0x402F0400 and 0x4030B800 as a download area and
78 * 0x4030B800 to 0x4030CE00 as a public stack area. The ROM also
79 * supports X-MODEM loading via UART, and we leverage this and then use
80 * Y-MODEM to load u-boot.img, when booted over UART.
81 */
82#define CONFIG_SPL_TEXT_BASE 0x402F0400
83#define CONFIG_SPL_MAX_SIZE (0x4030B800 - CONFIG_SPL_TEXT_BASE)
84
85/*
86 * Since SPL did pll and ddr initialization for us,
87 * we don't need to do it twice.
88 */
89#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
90#define CONFIG_SKIP_LOWLEVEL_INIT
91#endif /* !CONFIG_SPL_BUILD, ... */
92/*
93 * Our DDR memory always starts at 0x80000000 and U-Boot shall have
94 * relocated itself to higher in memory by the time this value is used.
95 */
96#define CONFIG_SYS_LOAD_ADDR 0x80000000
97/*
98 * ----------------------------------------------------------------------------
99 * DDR information. We say (for simplicity) that we have 1 bank,
100 * always, even when we have more. We always start at 0x80000000,
101 * and we place the initial stack pointer in our SRAM.
102 */
103#define CONFIG_NR_DRAM_BANKS 1
104#define CONFIG_SYS_SDRAM_BASE 0x80000000
105#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
106 GENERATED_GBL_DATA_SIZE)
107
108/* I2C */
109#define CONFIG_SYS_I2C
110#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
111#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
112#define CONFIG_SYS_I2C_OMAP24XX
Hannes Petermaier3e6a52c2014-06-04 10:28:39 +0200113#define CONFIG_CMD_I2C
Hannes Petermaier893c04e2014-02-07 08:07:36 +0100114/* GPIO */
115#define CONFIG_OMAP_GPIO
116#define CONFIG_CMD_GPIO
117/*
118 * ----------------------------------------------------------------------------
119 * The following are general good-enough settings for U-Boot. We set a
120 * large malloc pool as we generally have a lot of DDR, and we opt for
121 * function over binary size in the main portion of U-Boot as this is
122 * generally easily constrained later if needed. We enable the config
123 * options that give us information in the environment about what board
124 * we are on so we do not need to rely on the command prompt. We set a
125 * console baudrate of 115200 and use the default baud rate table.
126 */
Hannes Petermaier11709e72015-02-03 13:22:36 +0100127#define CONFIG_SYS_MALLOC_LEN (5120 << 10)
Hannes Petermaier893c04e2014-02-07 08:07:36 +0100128#define CONFIG_SYS_HUSH_PARSER
Hannes Petermaier893c04e2014-02-07 08:07:36 +0100129#define CONFIG_SYS_CONSOLE_INFO_QUIET
130#define CONFIG_ENV_OVERWRITE /* Overwrite ethaddr / serial# */
Hannes Petermaiere52e9cc2015-03-17 15:31:21 +0100131#define CONFIG_SYS_CONSOLE_IS_IN_ENV
132#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
Hannes Petermaier893c04e2014-02-07 08:07:36 +0100133
134/* As stated above, the following choices are optional. */
135#define CONFIG_SYS_LONGHELP
136#define CONFIG_AUTO_COMPLETE
137#define CONFIG_CMDLINE_EDITING
138#define CONFIG_VERSION_VARIABLE
139
140/* We set the max number of command args high to avoid HUSH bugs. */
141#define CONFIG_SYS_MAXARGS 64
142
143/* Console I/O Buffer Size */
144#define CONFIG_SYS_CBSIZE 512
145/* Print Buffer Size */
146#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE +\
147 sizeof(CONFIG_SYS_PROMPT) + 16)
148/* Boot Argument Buffer Size */
149#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Hannes Petermaier893c04e2014-02-07 08:07:36 +0100150
151/*
152 * Our platforms make use of SPL to initalize the hardware (primarily
153 * memory) enough for full U-Boot to be loaded. We also support Falcon
154 * Mode so that the Linux kernel can be booted directly from SPL
155 * instead, if desired. We make use of the general SPL framework found
156 * under common/spl/. Given our generally common memory map, we set a
157 * number of related defaults and sizes here.
158 */
Hannes Petermaier893c04e2014-02-07 08:07:36 +0100159#define CONFIG_SPL_FRAMEWORK
160/*
161 * Place the image at the start of the ROM defined image space.
162 * We limit our size to the ROM-defined downloaded image area, and use the
163 * rest of the space for stack. We load U-Boot itself into memory at
164 * 0x80800000 for legacy reasons (to not conflict with older SPLs). We
165 * have our BSS be placed 1MiB after this, to allow for the default
166 * Linux kernel address of 0x80008000 to work, in the Falcon Mode case.
167 * We have the SPL malloc pool at the end of the BSS area.
168 *
169 * ----------------------------------------------------------------------------
170 */
Hannes Petermaier893c04e2014-02-07 08:07:36 +0100171#undef CONFIG_SYS_TEXT_BASE
172#define CONFIG_SYS_TEXT_BASE 0x80800000
173#define CONFIG_SPL_BSS_START_ADDR 0x80A00000
174#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
175#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
176 CONFIG_SPL_BSS_MAX_SIZE)
177#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
178
179/* General parts of the framework, required. */
180#define CONFIG_SPL_I2C_SUPPORT
181#define CONFIG_SPL_LIBCOMMON_SUPPORT
182#define CONFIG_SPL_LIBGENERIC_SUPPORT
183#define CONFIG_SPL_SERIAL_SUPPORT
184#define CONFIG_SPL_BOARD_INIT
185#define CONFIG_SPL_YMODEM_SUPPORT
186#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
187
188#endif /* ! __BUR_AM335X_COMMON_H__ */