Blame - arch/arm/mach-mvebu/Kconfig - platform/external/u-boot

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Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	1	if ARCH_MVEBU
				2
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	3	config HAVE_MVEBU_EFUSE
				4	bool
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	5
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	6	config ARMADA_32BIT
				7	bool
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	8	select BOARD_EARLY_INIT_F
Lokesh Vutla	acf1500	2018-04-26 18:21:26 +0530	[diff] [blame]	9	select CPU_V7A
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	10	select SPL_DM if SPL
				11	select SPL_DM_SEQ_ALIAS if SPL
				12	select SPL_OF_CONTROL if SPL
Tom Rini	7609e02	2021-10-15 10:54:41 -0400	[diff] [blame]	13	select SPL_SKIP_LOWLEVEL_INIT if SPL
Stefan Roese	237b629	2019-04-11 08:58:32 +0200	[diff] [blame]	14	select SPL_SIMPLE_BUS if SPL
Michal Simek	58008cb	2018-07-23 15:55:15 +0200	[diff] [blame]	15	select SUPPORT_SPL
Philip Oberfichtner	1116888	2022-08-17 15:07:12 +0200	[diff] [blame]	16	select SYS_L2_PL310 if !SYS_L2CACHE_OFF
Stefan Roese	f2100f6	2019-04-12 16:42:28 +0200	[diff] [blame]	17	select TRANSLATION_OFFSET
Alexander Dahl	b646a10	2023-12-21 08:26:10 +0100	[diff] [blame]	18	select TOOLS_KWBIMAGE if SPL
Pali Rohár	2975bba	2022-04-06 16:20:20 +0200	[diff] [blame]	19	select SPL_SYS_NO_VECTOR_TABLE if SPL
Pali Rohár	5bb2c55	2022-05-06 11:05:14 +0200	[diff] [blame]	20	select ARCH_VERY_EARLY_INIT
Marek Behún	383969d	2024-04-04 09:50:59 +0200	[diff] [blame]	21	select ARMADA_32BIT_SYSCON_RESET if DM_RESET && PCI_MVEBU
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	22	select ARMADA_32BIT_SYSCON_SYSRESET if SYSRESET
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	23
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	24	# ARMv7 SoCs...
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	25	config ARMADA_375
				26	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	27	select ARMADA_32BIT
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	28
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	29	config ARMADA_38X
				30	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	31	select ARMADA_32BIT
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	32	select HAVE_MVEBU_EFUSE
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	33
Joshua Scott	28f0cbc	2020-11-09 10:14:08 +1300	[diff] [blame]	34	config ARMADA_38X_HS_IMPEDANCE_THRESH
				35	hex "Armada 38x USB 2.0 High-Speed Impedance Threshold (0x0 - 0x7)"
				36	depends on ARMADA_38X
				37	default 0x6
				38	range 0x0 0x7
				39
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	40	config ARMADA_XP
				41	bool
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	42	select ARMADA_32BIT
Stefan Roese	81e33f4	2015-12-21 13:56:33 +0100	[diff] [blame]	43
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	44	# ARMv8 SoCs...
				45	config ARMADA_3700
				46	bool
				47	select ARM64
Pali Rohár	10154b8	2022-02-23 14:15:45 +0100	[diff] [blame]	48	select HAVE_MVEBU_EFUSE
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	49
Stefan Roese	21b29fc	2016-05-25 08:13:45 +0200	[diff] [blame]	50	# Armada 7K and 8K are very similar - use only one Kconfig symbol for both
				51	config ARMADA_8K
				52	bool
				53	select ARM64
				54
Chris Packham	7d7bb99	2022-11-05 17:23:59 +1300	[diff] [blame]	55	config ALLEYCAT_5
				56	bool
				57	select ARM64
				58
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	59	# Armada PLL frequency (used for NAND clock generation)
				60	config SYS_MVEBU_PLL_CLOCK
				61	int
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	62	default "2000000000" if ARMADA_XP \|\| ARMADA_3700 \|\| ARMADA_8K \|\| ARMADA_MSYS
Chris Packham	a53d97a	2016-10-26 14:08:30 +1300	[diff] [blame]	63	default "1000000000" if ARMADA_38X \|\| ARMADA_375
				64
Stefan Roese	f61aefc	2016-05-17 15:00:30 +0200	[diff] [blame]	65	# Armada XP/38x SoC types...
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	66	config MV78230
				67	bool
				68	select ARMADA_XP
				69
				70	config MV78260
				71	bool
				72	select ARMADA_XP
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	73	imply CMD_SATA
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	74
				75	config MV78460
				76	bool
				77	select ARMADA_XP
				78
Chris Packham	0d0df46	2019-04-11 22:22:50 +1200	[diff] [blame]	79	config ARMADA_MSYS
				80	bool
				81	select ARMADA_32BIT
				82
				83	config 98DX4251
				84	bool
				85	select ARMADA_MSYS
				86
				87	config 98DX3336
				88	bool
				89	select ARMADA_MSYS
				90
				91	config 98DX3236
				92	bool
				93	select ARMADA_MSYS
				94
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	95	config 88F6820
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	96	bool
				97	select ARMADA_38X
				98
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	99	config CUSTOMER_BOARD_SUPPORT
				100	bool
				101
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	102	config DDR4
				103	bool "Support Marvell DDR4 Training driver"
				104
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	105	choice
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	106	prompt "Armada XP/375/38x/3700/7K/8K/Alleycat-5 board select"
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	107	optional
				108
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	109	config TARGET_CLEARFOG
				110	bool "Support ClearFog"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	111	select 88F6820
Baruch Siach	867572f	2020-01-20 14:20:13 +0200	[diff] [blame]	112	select BOARD_LATE_INIT
Martin Rowe	c733fe9	2023-03-27 21:24:09 +1000	[diff] [blame]	113	select OF_BOARD_SETUP
Stefan Roese	0299c90	2015-10-20 15:14:47 +0200	[diff] [blame]	114
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	115	config TARGET_HELIOS4
				116	bool "Support Helios4"
				117	select 88F6820
				118
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	119	config TARGET_MVEBU_ARMADA_37XX
				120	bool "Support Armada 37xx platforms"
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	121	select ARMADA_3700
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	122	imply SCSI
Stefan Roese	01e62c7	2016-05-17 15:04:16 +0200	[diff] [blame]	123
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	124	config TARGET_DB_88F6720
				125	bool "Support DB-88F6720 Armada 375"
				126	select ARMADA_375
				127
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	128	config TARGET_DB_88F6820_GP
				129	bool "Support DB-88F6820-GP"
Chris Packham	53d601f	2016-09-22 12:56:13 +1200	[diff] [blame]	130	select 88F6820
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	131
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	132	config TARGET_DB_88F6820_AMC
				133	bool "Support DB-88F6820-AMC"
				134	select 88F6820
				135
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	136	config TARGET_TURRIS_OMNIA
				137	bool "Support Turris Omnia"
				138	select 88F6820
Marek Behún	539f024	2019-05-02 16:53:37 +0200	[diff] [blame]	139	select BOARD_LATE_INIT
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	140	select DM_I2C
				141	select I2C_MUX
				142	select I2C_MUX_PCA954x
Marek Behún	6d7bfb6	2021-10-09 19:33:46 +0200	[diff] [blame]	143	select SPL_DRIVERS_MISC
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	144	select SPL_I2C_MUX
Marek Behún	2c8a4e4	2021-10-09 19:33:45 +0200	[diff] [blame]	145	select SPL_SYS_MALLOC_SIMPLE
Marek Behún	8420edc	2019-05-02 16:53:28 +0200	[diff] [blame]	146	select SYS_I2C_MVTWSI
Marek Behún	6b26f3e	2019-05-02 16:53:32 +0200	[diff] [blame]	147	select ATSHA204A
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	148
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	149	config TARGET_TURRIS_MOX
Marek Behún	94c0f0b	2023-10-20 16:29:16 +0200	[diff] [blame]	150	bool "Support CZ.NIC's Turris Mox / RIPE Atlas Probe"
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	151	select ARMADA_3700
Marek Behún	94c0f0b	2023-10-20 16:29:16 +0200	[diff] [blame]	152	select BOARD_TYPES
				153	select ENV_IS_IN_MMC
				154	select ENV_IS_IN_SPI_FLASH
				155	select MULTI_DTB_FIT
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	156
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	157	config TARGET_MVEBU_ARMADA_8K
				158	bool "Support Armada 7k/8k platforms"
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	159	select ARMADA_8K
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	160	select BOARD_LATE_INIT
Simon Glass	fedb428	2017-06-14 21:28:21 -0600	[diff] [blame]	161	imply SCSI
Stefan Roese	6f8c2d4	2016-05-25 08:21:21 +0200	[diff] [blame]	162
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	163	config TARGET_MVEBU_ALLEYCAT5
				164	bool "Support AlleyCat 5 platforms"
				165	select ALLEYCAT_5
				166
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	167	config TARGET_OCTEONTX2_CN913x
				168	bool "Support CN913x platforms"
				169	select ARMADA_8K
				170	imply BOARD_EARLY_INIT_R
				171	select BOARD_LATE_INIT
				172	imply SCSI
				173
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	174	config TARGET_DB_MV784MP_GP
				175	bool "Support db-mv784mp-gp"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	176	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	177	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	178
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	179	config TARGET_DS116
				180	bool "Support Synology DS116"
				181	select 88F6820
				182
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	183	config TARGET_DS414
				184	bool "Support Synology DS414"
				185	select MV78230
				186
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	187	config TARGET_MAXBCM
				188	bool "Support maxbcm"
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	189	select BOARD_ECC_SUPPORT
Phil Sutter	4290252	2015-12-25 14:41:22 +0100	[diff] [blame]	190	select MV78460
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	191
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	192	config TARGET_N2350
				193	bool "Support Thecus N2350"
				194	select 88F6820
				195	select DDR4
				196
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	197	config TARGET_THEADORABLE
				198	bool "Support theadorable Armada XP"
Tom Rini	e5ec481	2017-01-22 19:43:11 -0500	[diff] [blame]	199	select BOARD_LATE_INIT if USB
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	200	select MV78260
Simon Glass	3bf926c	2017-06-14 21:28:24 -0600	[diff] [blame]	201	imply CMD_SATA
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	202
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	203	config TARGET_CONTROLCENTERDC
				204	bool "Support CONTROLCENTERDC"
				205	select 88F6820
Tom Rini	53dbf11	2022-03-30 18:07:24 -0400	[diff] [blame]	206	select CUSTOMER_BOARD_SUPPORT
Dirk Eibach	6008326	2017-02-22 16:07:23 +0100	[diff] [blame]	207
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	208	config TARGET_X530
				209	bool "Support Allied Telesis x530"
				210	select 88F6820
				211
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	212	config TARGET_X240
				213	bool "Support Allied Telesis x240"
				214	select ALLEYCAT_5
				215
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	216	config TARGET_DB_XC3_24G4XG
				217	bool "Support DB-XC3-24G4XG"
				218	select 98DX3336
				219
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	220	config TARGET_CRS3XX_98DX3236
				221	bool "Support CRS3XX-98DX3236"
Luka Kovacic	22bb913	2019-05-07 19:35:55 +0200	[diff] [blame]	222	select 98DX3236
				223
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	224	endchoice
				225
Tom Rini	5b527c5	2021-08-21 13:50:13 -0400	[diff] [blame]	226	choice
				227	prompt "DDR bus width"
				228	default DDR_64BIT
				229	depends on ARMADA_XP
				230
				231	config DDR_64BIT
				232	bool "64bit bus width"
				233
				234	config DDR_32BIT
				235	bool "32bit bus width"
				236
				237	endchoice
				238
Tom Rini	f66a3fd	2021-08-21 13:50:15 -0400	[diff] [blame]	239	config DDR_LOG_LEVEL
				240	int "DDR training code log level"
				241	depends on ARMADA_XP
				242	default 0
				243	range 0 3
				244	help
				245	Amount of information provided on error while running the DDR
				246	training code. At level 0, provides an error code in a case of
				247	failure, RL, WL errors and other algorithm failure. At level 1,
				248	provides the D-Unit setup (SPD/Static configuration). At level 2,
				249	provides the windows margin as a results of DQS centeralization.
				250	At level 3, rovides the windows margin of each DQ as a results of
				251	DQS centeralization.
				252
Marek Behún	871ee66	2022-02-17 13:54:42 +0100	[diff] [blame]	253	config DDR_RESET_ON_TRAINING_FAILURE
				254	bool "Reset the board on DDR training failure instead of hanging"
				255	depends on ARMADA_38X \|\| ARMADA_XP
				256	help
				257	If DDR training fails in SPL, reset the board instead of hanging.
				258	Some boards are known to fail DDR training occasionally and an
				259	immediate reset may be preferable to waiting until the board is
				260	reset by watchdog (if there even is one).
				261
				262	Note that if booting via UART and the DDR training fails, the
				263	device will still hang - it doesn't make sense to reset the board
				264	in such a case.
				265
Tom Rini	da8592d	2022-02-25 11:19:46 -0500	[diff] [blame]	266	config BOARD_ECC_SUPPORT
				267	bool
				268
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	269	config SYS_BOARD
				270	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	271	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	272	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	273	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	274	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	275	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	276	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	277	default "turris_mox" if TARGET_TURRIS_MOX
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	278	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	279	default "octeontx2_cn913x" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	280	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	281	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	282	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	283	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	284	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	285	default "theadorable" if TARGET_THEADORABLE
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	286	default "a38x" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	287	default "x530" if TARGET_X530
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	288	default "x240" if TARGET_X240
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	289	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	290	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	291	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	292
				293	config SYS_CONFIG_NAME
				294	default "clearfog" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	295	default "helios4" if TARGET_HELIOS4
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	296	default "mvebu_armada-37xx" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	297	default "db-88f6720" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	298	default "db-88f6820-gp" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	299	default "db-88f6820-amc" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	300	default "mvebu_armada-8k" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	301	default "mvebu_armada-8k" if TARGET_OCTEONTX2_CN913x
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	302	default "db-mv784mp-gp" if TARGET_DB_MV784MP_GP
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	303	default "ds116" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	304	default "ds414" if TARGET_DS414
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	305	default "maxbcm" if TARGET_MAXBCM
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	306	default "n2350" if TARGET_N2350
Stefan Roese	b20c38a	2016-01-20 08:13:29 +0100	[diff] [blame]	307	default "theadorable" if TARGET_THEADORABLE
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	308	default "turris_omnia" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	309	default "turris_mox" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	310	default "controlcenterdc" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	311	default "x530" if TARGET_X530
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	312	default "x240" if TARGET_X240
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	313	default "db-xc3-24g4xg" if TARGET_DB_XC3_24G4XG
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	314	default "crs3xx-98dx3236" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	315	default "mvebu_alleycat-5" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	316
				317	config SYS_VENDOR
				318	default "Marvell" if TARGET_DB_MV784MP_GP
Konstantin Porotchkin	c5330ae	2017-02-16 13:52:22 +0200	[diff] [blame]	319	default "Marvell" if TARGET_MVEBU_ARMADA_37XX
Stefan Roese	606576d	2016-01-29 09:14:54 +0100	[diff] [blame]	320	default "Marvell" if TARGET_DB_88F6720
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	321	default "Marvell" if TARGET_DB_88F6820_GP
Chris Packham	c0def24	2016-09-22 12:56:14 +1200	[diff] [blame]	322	default "Marvell" if TARGET_DB_88F6820_AMC
Stefan Roese	633fa0e	2016-10-25 10:56:19 +0200	[diff] [blame]	323	default "Marvell" if TARGET_MVEBU_ARMADA_8K
Konstantin Porotchkin	c405226	2021-03-16 17:20:57 +0100	[diff] [blame]	324	default "Marvell" if TARGET_OCTEONTX2_CN913x
Chris Packham	4db944a	2019-04-11 22:22:53 +1200	[diff] [blame]	325	default "Marvell" if TARGET_DB_XC3_24G4XG
				326	default "Marvell" if TARGET_MVEBU_DB_88F7040
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	327	default "solidrun" if TARGET_CLEARFOG
Dennis Gilmore	ae28a5f	2018-06-11 19:39:53 -0500	[diff] [blame]	328	default "kobol" if TARGET_HELIOS4
Tony Dinh	b21f87a5	2023-02-09 14:00:03 -0800	[diff] [blame]	329	default "Synology" if TARGET_DS116
Phil Sutter	aefb8f4	2015-12-25 14:41:25 +0100	[diff] [blame]	330	default "Synology" if TARGET_DS414
Tony Dinh	3fdd09f	2023-02-01 15:13:05 -0800	[diff] [blame]	331	default "thecus" if TARGET_N2350
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	332	default "CZ.NIC" if TARGET_TURRIS_OMNIA
Marek Behún	80af1a9	2018-04-24 17:21:31 +0200	[diff] [blame]	333	default "CZ.NIC" if TARGET_TURRIS_MOX
Baruch Siach	d38f04f	2018-06-18 21:56:23 +0300	[diff] [blame]	334	default "gdsys" if TARGET_CONTROLCENTERDC
Chris Packham	0e31666	2019-01-10 21:01:00 +1300	[diff] [blame]	335	default "alliedtelesis" if TARGET_X530
Chris Packham	4c97c4b	2023-07-10 10:47:36 +1200	[diff] [blame]	336	default "alliedtelesis" if TARGET_X240
Luka Kovacic	df9ebbe	2020-05-26 20:17:50 +0200	[diff] [blame]	337	default "mikrotik" if TARGET_CRS3XX_98DX3236
Chris Packham	6cc8b5d	2022-11-05 17:24:00 +1300	[diff] [blame]	338	default "Marvell" if TARGET_MVEBU_ALLEYCAT5
Stefan Roese	b322c83	2015-12-21 13:40:37 +0100	[diff] [blame]	339
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	340	config SYS_SOC
				341	default "mvebu"
				342
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	343	choice
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	344	prompt "Boot method"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	345	depends on SPL
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	346
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	347	config MVEBU_SPL_BOOT_DEVICE_SPI
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	348	bool "NOR flash (SPI or parallel)"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	349	imply ENV_IS_IN_SPI_FLASH
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	350	imply SPL_DM_SPI
				351	imply SPL_SPI_FLASH_SUPPORT
				352	imply SPL_SPI_LOAD
Simon Glass	ea2ca7e	2021-08-08 12:20:14 -0600	[diff] [blame]	353	imply SPL_SPI
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	354	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	355
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	356	config MVEBU_SPL_BOOT_DEVICE_NAND
				357	bool "NAND flash (SPI or parallel)"
				358	select MTD_RAW_NAND
				359	select SPL_BOOTROM_SUPPORT
				360
Baruch Siach	ad105f5	2018-06-18 21:56:24 +0300	[diff] [blame]	361	config MVEBU_SPL_BOOT_DEVICE_MMC
Pali Rohár	41d52f3	2023-01-10 23:13:01 +0100	[diff] [blame]	362	bool "eMMC or SD card"
Joel Johnson	ab2f757	2020-04-17 01:19:05 -0600	[diff] [blame]	363	imply ENV_IS_IN_MMC
				364	# GPIO needed for eMMC/SD card presence detection
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	365	imply SPL_DM_GPIO
				366	imply SPL_DM_MMC
				367	imply SPL_GPIO
				368	imply SPL_LIBDISK_SUPPORT
Simon Glass	103c5f1	2021-08-08 12:20:09 -0600	[diff] [blame]	369	imply SPL_MMC
Pali Rohár	2f27db2	2023-01-08 13:31:41 +0100	[diff] [blame]	370	select SUPPORT_EMMC_BOOT if SPL_MMC
Pali Rohár	913d756	2023-01-09 00:52:09 +0100	[diff] [blame]	371	select SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR if SPL_MMC
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	372	select SPL_BOOTROM_SUPPORT
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	373
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	374	config MVEBU_SPL_BOOT_DEVICE_SATA
				375	bool "SATA"
Simon Glass	f756037	2021-08-08 12:20:17 -0600	[diff] [blame]	376	imply SPL_SATA
Pali Rohár	2226ca1	2021-07-23 11:14:29 +0200	[diff] [blame]	377	imply SPL_LIBDISK_SUPPORT
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	378	select SPL_BOOTROM_SUPPORT
Baruch Siach	22c6545	2019-05-16 13:03:58 +0300	[diff] [blame]	379
Pali Rohár	50afad5	2023-01-10 23:09:15 +0100	[diff] [blame]	380	config MVEBU_SPL_BOOT_DEVICE_PEX
				381	bool "PCI Express"
				382	select SPL_BOOTROM_SUPPORT
				383
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	384	config MVEBU_SPL_BOOT_DEVICE_UART
				385	bool "UART"
Pali Rohár	9d0225b	2021-07-23 11:14:25 +0200	[diff] [blame]	386	select SPL_BOOTROM_SUPPORT
Baruch Siach	72c4e67	2018-06-18 21:56:26 +0300	[diff] [blame]	387
Marek Behún	b6ee860	2017-06-09 19:28:45 +0200	[diff] [blame]	388	endchoice
				389
Pali Rohár	67bd615	2023-01-10 22:55:21 +0100	[diff] [blame]	390	config MVEBU_SPL_NAND_BADBLK_LOCATION
				391	hex "NAND Bad block indicator location"
				392	depends on MVEBU_SPL_BOOT_DEVICE_NAND
				393	range 0x0 0x1
				394	help
				395	Value 0x0 = SLC flash = BBI at page 0 or page 1
				396	Value 0x1 = MLC flash = BBI at last page in the block
				397
Pali Rohár	c62af15	2023-03-29 21:25:58 +0200	[diff] [blame]	398	config MVEBU_SPL_SATA_BLKSZ
				399	int "SATA block size"
				400	depends on MVEBU_SPL_BOOT_DEVICE_SATA
				401	range 512 32768
				402	default 512
				403	help
				404	Block size of the SATA disk in bytes.
				405	Typically 512 bytes for majority of disks
				406	and 4096 bytes for 4K Native disks.
				407
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	408	config MVEBU_EFUSE
				409	bool "Enable eFuse support"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	410	depends on HAVE_MVEBU_EFUSE
				411	help
				412	Enable support for reading and writing eFuses on mvebu SoCs.
				413
				414	config MVEBU_EFUSE_FAKE
				415	bool "Fake eFuse access (dry run)"
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	416	depends on MVEBU_EFUSE
				417	help
				418	This enables a "dry run" mode where eFuses are not really programmed.
				419	Instead the eFuse accesses are emulated by writing to and reading
				420	from a memory block.
				421	This is can be used for testing prog scripts.
				422
Pali Rohár	8092d1d	2022-09-22 13:43:45 +0200	[diff] [blame]	423	config MVEBU_EFUSE_VHV_GPIO
				424	string "VHV_Enable GPIO name for eFuse programming"
				425	depends on MVEBU_EFUSE && !ARMADA_3700
				426	help
				427	The eFuse programing (burning) phase requires supplying 1.8V to the
				428	device on the VHV power pin, while for normal operation the VHV power
				429	rail must be left unconnected. See Marvell AN-389: ARMADA VHV Power
				430	document (Doc. No. MV-S302545-00 Rev. C, August 2, 2016) for details.
				431	.
				432	This specify VHV_Enable GPIO name used in U-Boot for enabling VHV power.
				433
				434	config MVEBU_EFUSE_VHV_GPIO_ACTIVE_LOW
				435	bool "VHV_Enable GPIO is Active Low"
				436	depends on MVEBU_EFUSE_VHV_GPIO != ""
				437
Mario Six	a1b6b0a	2017-01-11 16:01:00 +0100	[diff] [blame]	438	config SECURED_MODE_IMAGE
				439	bool "Build image for trusted boot"
				440	default false
				441	depends on 88F6820
				442	help
				443	Build an image that employs the ARMADA SoC's trusted boot framework
				444	for securely booting images.
				445
				446	config SECURED_MODE_CSK_INDEX
				447	int "Index of active CSK"
				448	default 0
				449	depends on SECURED_MODE_IMAGE
				450
Tony Dinh	21f6227	2023-03-02 19:27:29 -0800	[diff] [blame]	451	config SF_DEFAULT_SPEED
				452	int "Default speed for SPI flash in Hz"
				453	default 10000000
				454	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				455
				456	config SF_DEFAULT_MODE
				457	hex "Default mode for SPI flash"
				458	default 0x0
				459	depends on MVEBU_SPL_BOOT_DEVICE_SPI
				460
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	461	config ARMADA_32BIT_SYSCON
				462	bool
				463	depends on ARMADA_32BIT
				464	select REGMAP
				465	select SYSCON
				466
Marek Behún	ab900a6	2024-04-04 09:50:58 +0200	[diff] [blame]	467	config ARMADA_32BIT_SYSCON_RESET
				468	bool "Support Armada XP/375/38x/39x reset controller"
				469	depends on ARMADA_32BIT
				470	depends on DM_RESET
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	471	select ARMADA_32BIT_SYSCON
Marek Behún	ab900a6	2024-04-04 09:50:58 +0200	[diff] [blame]	472	help
				473	Build support for Armada XP/375/38x/39x reset controller. This is
				474	needed for PCIe support.
				475
Marek Behún	0c350a6	2024-04-04 09:51:00 +0200	[diff] [blame]	476	config ARMADA_32BIT_SYSCON_SYSRESET
				477	bool "Support Armada XP/375/38x/39x sysreset via driver model"
				478	depends on ARMADA_32BIT
				479	depends on SYSRESET
				480	select ARMADA_32BIT_SYSCON
				481	help
				482	Build support for Armada XP/375/38x/39x system reset via driver model.
				483
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	484	source "board/solidrun/clearfog/Kconfig"
Dennis Gilmore	5a3db5d	2020-12-08 21:07:36 -0600	[diff] [blame]	485	source "board/kobol/helios4/Kconfig"
Joel Johnson	9f205d6	2020-03-23 14:21:32 -0600	[diff] [blame]	486
Stefan Roese	c3d8914	2015-08-25 13:18:38 +0200	[diff] [blame]	487	endif