blob: 7144d39984ec99428cd4b4cae390ec2630e5b92c [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Moritz Fischerfdec2d22015-12-28 09:47:11 -08002/*
3 * Copyright (C) 2015 Moritz Fischer <moritz.fischer@ettus.com>
4 * IP from Cadence (ID T-CS-PE-0007-100, Version R1p10f2)
5 *
6 * This file is based on: drivers/i2c/zynq_i2c.c,
7 * with added driver-model support and code cleanup.
Moritz Fischerfdec2d22015-12-28 09:47:11 -08008 */
9
10#include <common.h>
Simon Glass9d922452017-05-17 17:18:03 -060011#include <dm.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060012#include <log.h>
Simon Glasscd93d622020-05-10 11:40:13 -060013#include <linux/bitops.h>
Simon Glassc05ed002020-05-10 11:40:11 -060014#include <linux/delay.h>
Moritz Fischerfdec2d22015-12-28 09:47:11 -080015#include <linux/types.h>
16#include <linux/io.h>
Masahiro Yamada1221ce42016-09-21 11:28:55 +090017#include <linux/errno.h>
Moritz Fischerfdec2d22015-12-28 09:47:11 -080018#include <dm/root.h>
19#include <i2c.h>
20#include <fdtdec.h>
21#include <mapmem.h>
Moritz Fischer08c11aa2017-01-16 09:50:46 -080022#include <wait_bit.h>
Tomasz Gorochowikf48ef0d2019-01-03 13:36:33 +010023#include <clk.h>
Moritz Fischerfdec2d22015-12-28 09:47:11 -080024
Moritz Fischerfdec2d22015-12-28 09:47:11 -080025/* i2c register set */
26struct cdns_i2c_regs {
27 u32 control;
28 u32 status;
29 u32 address;
30 u32 data;
31 u32 interrupt_status;
32 u32 transfer_size;
33 u32 slave_mon_pause;
34 u32 time_out;
35 u32 interrupt_mask;
36 u32 interrupt_enable;
37 u32 interrupt_disable;
38};
39
40/* Control register fields */
41#define CDNS_I2C_CONTROL_RW 0x00000001
42#define CDNS_I2C_CONTROL_MS 0x00000002
43#define CDNS_I2C_CONTROL_NEA 0x00000004
44#define CDNS_I2C_CONTROL_ACKEN 0x00000008
45#define CDNS_I2C_CONTROL_HOLD 0x00000010
46#define CDNS_I2C_CONTROL_SLVMON 0x00000020
47#define CDNS_I2C_CONTROL_CLR_FIFO 0x00000040
48#define CDNS_I2C_CONTROL_DIV_B_SHIFT 8
49#define CDNS_I2C_CONTROL_DIV_B_MASK 0x00003F00
50#define CDNS_I2C_CONTROL_DIV_A_SHIFT 14
51#define CDNS_I2C_CONTROL_DIV_A_MASK 0x0000C000
52
53/* Status register values */
54#define CDNS_I2C_STATUS_RXDV 0x00000020
55#define CDNS_I2C_STATUS_TXDV 0x00000040
56#define CDNS_I2C_STATUS_RXOVF 0x00000080
57#define CDNS_I2C_STATUS_BA 0x00000100
58
59/* Interrupt register fields */
60#define CDNS_I2C_INTERRUPT_COMP 0x00000001
61#define CDNS_I2C_INTERRUPT_DATA 0x00000002
62#define CDNS_I2C_INTERRUPT_NACK 0x00000004
63#define CDNS_I2C_INTERRUPT_TO 0x00000008
64#define CDNS_I2C_INTERRUPT_SLVRDY 0x00000010
65#define CDNS_I2C_INTERRUPT_RXOVF 0x00000020
66#define CDNS_I2C_INTERRUPT_TXOVF 0x00000040
67#define CDNS_I2C_INTERRUPT_RXUNF 0x00000080
68#define CDNS_I2C_INTERRUPT_ARBLOST 0x00000200
69
Siva Durga Prasad Paladugu006265d2019-03-07 11:52:48 +010070#define CDNS_I2C_INTERRUPTS_MASK (CDNS_I2C_INTERRUPT_COMP | \
71 CDNS_I2C_INTERRUPT_DATA | \
72 CDNS_I2C_INTERRUPT_NACK | \
73 CDNS_I2C_INTERRUPT_TO | \
74 CDNS_I2C_INTERRUPT_SLVRDY | \
75 CDNS_I2C_INTERRUPT_RXOVF | \
76 CDNS_I2C_INTERRUPT_TXOVF | \
77 CDNS_I2C_INTERRUPT_RXUNF | \
78 CDNS_I2C_INTERRUPT_ARBLOST)
79
Moritz Fischerfdec2d22015-12-28 09:47:11 -080080#define CDNS_I2C_FIFO_DEPTH 16
81#define CDNS_I2C_TRANSFER_SIZE_MAX 255 /* Controller transfer limit */
Moritz Fischer08c11aa2017-01-16 09:50:46 -080082#define CDNS_I2C_TRANSFER_SIZE (CDNS_I2C_TRANSFER_SIZE_MAX - 3)
83
Moritz Fischer5e429852017-01-16 09:50:44 -080084#define CDNS_I2C_BROKEN_HOLD_BIT BIT(0)
Moritz Fischerfdec2d22015-12-28 09:47:11 -080085
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +010086#define CDNS_I2C_ARB_LOST_MAX_RETRIES 10
87
Moritz Fischerfdec2d22015-12-28 09:47:11 -080088#ifdef DEBUG
89static void cdns_i2c_debug_status(struct cdns_i2c_regs *cdns_i2c)
90{
91 int int_status;
92 int status;
93 int_status = readl(&cdns_i2c->interrupt_status);
94
95 status = readl(&cdns_i2c->status);
96 if (int_status || status) {
97 debug("Status: ");
98 if (int_status & CDNS_I2C_INTERRUPT_COMP)
99 debug("COMP ");
100 if (int_status & CDNS_I2C_INTERRUPT_DATA)
101 debug("DATA ");
102 if (int_status & CDNS_I2C_INTERRUPT_NACK)
103 debug("NACK ");
104 if (int_status & CDNS_I2C_INTERRUPT_TO)
105 debug("TO ");
106 if (int_status & CDNS_I2C_INTERRUPT_SLVRDY)
107 debug("SLVRDY ");
108 if (int_status & CDNS_I2C_INTERRUPT_RXOVF)
109 debug("RXOVF ");
110 if (int_status & CDNS_I2C_INTERRUPT_TXOVF)
111 debug("TXOVF ");
112 if (int_status & CDNS_I2C_INTERRUPT_RXUNF)
113 debug("RXUNF ");
114 if (int_status & CDNS_I2C_INTERRUPT_ARBLOST)
115 debug("ARBLOST ");
116 if (status & CDNS_I2C_STATUS_RXDV)
117 debug("RXDV ");
118 if (status & CDNS_I2C_STATUS_TXDV)
119 debug("TXDV ");
120 if (status & CDNS_I2C_STATUS_RXOVF)
121 debug("RXOVF ");
122 if (status & CDNS_I2C_STATUS_BA)
123 debug("BA ");
124 debug("TS%d ", readl(&cdns_i2c->transfer_size));
125 debug("\n");
126 }
127}
128#endif
129
130struct i2c_cdns_bus {
131 int id;
Michal Simekad72e762016-04-14 14:15:49 +0200132 unsigned int input_freq;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800133 struct cdns_i2c_regs __iomem *regs; /* register base */
Moritz Fischer5e429852017-01-16 09:50:44 -0800134
135 int hold_flag;
136 u32 quirks;
137};
138
139struct cdns_i2c_platform_data {
140 u32 quirks;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800141};
142
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800143/* Wait for an interrupt */
144static u32 cdns_i2c_wait(struct cdns_i2c_regs *cdns_i2c, u32 mask)
145{
146 int timeout, int_status;
147
148 for (timeout = 0; timeout < 100; timeout++) {
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800149 int_status = readl(&cdns_i2c->interrupt_status);
150 if (int_status & mask)
151 break;
Moritz Fischer0ec0c582017-01-16 09:50:45 -0800152 udelay(100);
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800153 }
154
155 /* Clear interrupt status flags */
156 writel(int_status & mask, &cdns_i2c->interrupt_status);
157
158 return int_status & mask;
159}
160
Michal Simekad72e762016-04-14 14:15:49 +0200161#define CDNS_I2C_DIVA_MAX 4
162#define CDNS_I2C_DIVB_MAX 64
163
164static int cdns_i2c_calc_divs(unsigned long *f, unsigned long input_clk,
165 unsigned int *a, unsigned int *b)
166{
167 unsigned long fscl = *f, best_fscl = *f, actual_fscl, temp;
168 unsigned int div_a, div_b, calc_div_a = 0, calc_div_b = 0;
169 unsigned int last_error, current_error;
170
171 /* calculate (divisor_a+1) x (divisor_b+1) */
172 temp = input_clk / (22 * fscl);
173
174 /*
175 * If the calculated value is negative or 0CDNS_I2C_DIVA_MAX,
176 * the fscl input is out of range. Return error.
177 */
178 if (!temp || (temp > (CDNS_I2C_DIVA_MAX * CDNS_I2C_DIVB_MAX)))
179 return -EINVAL;
180
181 last_error = -1;
182 for (div_a = 0; div_a < CDNS_I2C_DIVA_MAX; div_a++) {
183 div_b = DIV_ROUND_UP(input_clk, 22 * fscl * (div_a + 1));
184
185 if ((div_b < 1) || (div_b > CDNS_I2C_DIVB_MAX))
186 continue;
187 div_b--;
188
189 actual_fscl = input_clk / (22 * (div_a + 1) * (div_b + 1));
190
191 if (actual_fscl > fscl)
192 continue;
193
194 current_error = ((actual_fscl > fscl) ? (actual_fscl - fscl) :
195 (fscl - actual_fscl));
196
197 if (last_error > current_error) {
198 calc_div_a = div_a;
199 calc_div_b = div_b;
200 best_fscl = actual_fscl;
201 last_error = current_error;
202 }
203 }
204
205 *a = calc_div_a;
206 *b = calc_div_b;
207 *f = best_fscl;
208
209 return 0;
210}
211
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800212static int cdns_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)
213{
Michal Simek6150be92016-04-14 14:15:48 +0200214 struct i2c_cdns_bus *bus = dev_get_priv(dev);
Michal Simekad72e762016-04-14 14:15:49 +0200215 u32 div_a = 0, div_b = 0;
216 unsigned long speed_p = speed;
217 int ret = 0;
Michal Simek6150be92016-04-14 14:15:48 +0200218
Simon Glassf3d46152020-01-23 11:48:22 -0700219 if (speed > I2C_SPEED_FAST_RATE) {
Michal Simekad72e762016-04-14 14:15:49 +0200220 debug("%s, failed to set clock speed to %u\n", __func__,
221 speed);
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800222 return -EINVAL;
223 }
224
Michal Simekad72e762016-04-14 14:15:49 +0200225 ret = cdns_i2c_calc_divs(&speed_p, bus->input_freq, &div_a, &div_b);
226 if (ret)
227 return ret;
228
229 debug("%s: div_a: %d, div_b: %d, input freq: %d, speed: %d/%ld\n",
230 __func__, div_a, div_b, bus->input_freq, speed, speed_p);
231
232 writel((div_b << CDNS_I2C_CONTROL_DIV_B_SHIFT) |
233 (div_a << CDNS_I2C_CONTROL_DIV_A_SHIFT), &bus->regs->control);
Michal Simek6150be92016-04-14 14:15:48 +0200234
235 /* Enable master mode, ack, and 7-bit addressing */
236 setbits_le32(&bus->regs->control, CDNS_I2C_CONTROL_MS |
237 CDNS_I2C_CONTROL_ACKEN | CDNS_I2C_CONTROL_NEA);
238
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800239 return 0;
240}
241
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100242static inline u32 is_arbitration_lost(struct cdns_i2c_regs *regs)
243{
244 return (readl(&regs->interrupt_status) & CDNS_I2C_INTERRUPT_ARBLOST);
245}
246
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800247static int cdns_i2c_write_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,
Moritz Fischer5e429852017-01-16 09:50:44 -0800248 u32 len)
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800249{
250 u8 *cur_data = data;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800251 struct cdns_i2c_regs *regs = i2c_bus->regs;
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100252 u32 ret;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800253
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800254 /* Set the controller in Master transmit mode and clear FIFO */
Moritz Fischer5e429852017-01-16 09:50:44 -0800255 setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO);
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800256 clrbits_le32(&regs->control, CDNS_I2C_CONTROL_RW);
257
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800258 /* Check message size against FIFO depth, and set hold bus bit
259 * if it is greater than FIFO depth
260 */
261 if (len > CDNS_I2C_FIFO_DEPTH)
262 setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD);
263
264 /* Clear the interrupts in status register */
Siva Durga Prasad Paladugu006265d2019-03-07 11:52:48 +0100265 writel(CDNS_I2C_INTERRUPTS_MASK, &regs->interrupt_status);
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800266
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800267 writel(addr, &regs->address);
268
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100269 while (len-- && !is_arbitration_lost(regs)) {
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800270 writel(*(cur_data++), &regs->data);
Michael Auchter31041622019-12-09 18:16:16 +0000271 if (len && readl(&regs->transfer_size) == CDNS_I2C_FIFO_DEPTH) {
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100272 ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP |
273 CDNS_I2C_INTERRUPT_ARBLOST);
274 if (ret & CDNS_I2C_INTERRUPT_ARBLOST)
275 return -EAGAIN;
276 if (ret & CDNS_I2C_INTERRUPT_COMP)
277 continue;
278 /* Release the bus */
279 clrbits_le32(&regs->control,
280 CDNS_I2C_CONTROL_HOLD);
281 return -ETIMEDOUT;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800282 }
283 }
284
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100285 if (len && is_arbitration_lost(regs))
286 return -EAGAIN;
287
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800288 /* All done... release the bus */
Moritz Fischer5e429852017-01-16 09:50:44 -0800289 if (!i2c_bus->hold_flag)
290 clrbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD);
291
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800292 /* Wait for the address and data to be sent */
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100293 ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP |
294 CDNS_I2C_INTERRUPT_ARBLOST);
295 if (!(ret & (CDNS_I2C_INTERRUPT_ARBLOST |
296 CDNS_I2C_INTERRUPT_COMP)))
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800297 return -ETIMEDOUT;
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100298 if (ret & CDNS_I2C_INTERRUPT_ARBLOST)
299 return -EAGAIN;
300
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800301 return 0;
302}
303
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800304static inline bool cdns_is_hold_quirk(int hold_quirk, int curr_recv_count)
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800305{
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800306 return hold_quirk && (curr_recv_count == CDNS_I2C_FIFO_DEPTH + 1);
307}
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800308
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800309static int cdns_i2c_read_data(struct i2c_cdns_bus *i2c_bus, u32 addr, u8 *data,
310 u32 recv_count)
311{
312 u8 *cur_data = data;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800313 struct cdns_i2c_regs *regs = i2c_bus->regs;
Siva Durga Prasad Paladugu9d59d6f2019-03-14 09:18:37 +0100314 u32 curr_recv_count;
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800315 int updatetx, hold_quirk;
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100316 u32 ret;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800317
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800318 curr_recv_count = recv_count;
319
320 /* Check for the message size against the FIFO depth */
321 if (recv_count > CDNS_I2C_FIFO_DEPTH)
322 setbits_le32(&regs->control, CDNS_I2C_CONTROL_HOLD);
323
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800324 setbits_le32(&regs->control, CDNS_I2C_CONTROL_CLR_FIFO |
325 CDNS_I2C_CONTROL_RW);
326
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800327 if (recv_count > CDNS_I2C_TRANSFER_SIZE) {
328 curr_recv_count = CDNS_I2C_TRANSFER_SIZE;
329 writel(curr_recv_count, &regs->transfer_size);
330 } else {
331 writel(recv_count, &regs->transfer_size);
332 }
333
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800334 /* Start reading data */
335 writel(addr, &regs->address);
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800336
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800337 updatetx = recv_count > curr_recv_count;
338
339 hold_quirk = (i2c_bus->quirks & CDNS_I2C_BROKEN_HOLD_BIT) && updatetx;
340
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100341 while (recv_count && !is_arbitration_lost(regs)) {
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800342 while (readl(&regs->status) & CDNS_I2C_STATUS_RXDV) {
343 if (recv_count < CDNS_I2C_FIFO_DEPTH &&
344 !i2c_bus->hold_flag) {
345 clrbits_le32(&regs->control,
346 CDNS_I2C_CONTROL_HOLD);
347 }
348 *(cur_data)++ = readl(&regs->data);
349 recv_count--;
350 curr_recv_count--;
351
352 if (cdns_is_hold_quirk(hold_quirk, curr_recv_count))
353 break;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800354 }
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800355
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800356 if (cdns_is_hold_quirk(hold_quirk, curr_recv_count)) {
357 /* wait while fifo is full */
358 while (readl(&regs->transfer_size) !=
359 (curr_recv_count - CDNS_I2C_FIFO_DEPTH))
360 ;
361 /*
362 * Check number of bytes to be received against maximum
363 * transfer size and update register accordingly.
364 */
365 if ((recv_count - CDNS_I2C_FIFO_DEPTH) >
366 CDNS_I2C_TRANSFER_SIZE) {
367 writel(CDNS_I2C_TRANSFER_SIZE,
368 &regs->transfer_size);
369 curr_recv_count = CDNS_I2C_TRANSFER_SIZE +
370 CDNS_I2C_FIFO_DEPTH;
371 } else {
372 writel(recv_count - CDNS_I2C_FIFO_DEPTH,
373 &regs->transfer_size);
374 curr_recv_count = recv_count;
375 }
376 } else if (recv_count && !hold_quirk && !curr_recv_count) {
377 writel(addr, &regs->address);
378 if (recv_count > CDNS_I2C_TRANSFER_SIZE) {
379 writel(CDNS_I2C_TRANSFER_SIZE,
380 &regs->transfer_size);
381 curr_recv_count = CDNS_I2C_TRANSFER_SIZE;
382 } else {
383 writel(recv_count, &regs->transfer_size);
384 curr_recv_count = recv_count;
385 }
386 }
387 }
388
389 /* Wait for the address and data to be sent */
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100390 ret = cdns_i2c_wait(regs, CDNS_I2C_INTERRUPT_COMP |
391 CDNS_I2C_INTERRUPT_ARBLOST);
392 if (!(ret & (CDNS_I2C_INTERRUPT_ARBLOST |
393 CDNS_I2C_INTERRUPT_COMP)))
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800394 return -ETIMEDOUT;
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100395 if (ret & CDNS_I2C_INTERRUPT_ARBLOST)
396 return -EAGAIN;
Moritz Fischer08c11aa2017-01-16 09:50:46 -0800397
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800398 return 0;
399}
400
401static int cdns_i2c_xfer(struct udevice *dev, struct i2c_msg *msg,
402 int nmsgs)
403{
404 struct i2c_cdns_bus *i2c_bus = dev_get_priv(dev);
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100405 int ret = 0;
406 int count;
Moritz Fischer5e429852017-01-16 09:50:44 -0800407 bool hold_quirk;
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100408 struct i2c_msg *message = msg;
409 int num_msgs = nmsgs;
Moritz Fischer5e429852017-01-16 09:50:44 -0800410
411 hold_quirk = !!(i2c_bus->quirks & CDNS_I2C_BROKEN_HOLD_BIT);
412
413 if (nmsgs > 1) {
414 /*
415 * This controller does not give completion interrupt after a
416 * master receive message if HOLD bit is set (repeated start),
417 * resulting in SW timeout. Hence, if a receive message is
418 * followed by any other message, an error is returned
419 * indicating that this sequence is not supported.
420 */
421 for (count = 0; (count < nmsgs - 1) && hold_quirk; count++) {
422 if (msg[count].flags & I2C_M_RD) {
423 printf("Can't do repeated start after a receive message\n");
424 return -EOPNOTSUPP;
425 }
426 }
427
428 i2c_bus->hold_flag = 1;
429 setbits_le32(&i2c_bus->regs->control, CDNS_I2C_CONTROL_HOLD);
430 } else {
431 i2c_bus->hold_flag = 0;
432 }
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800433
434 debug("i2c_xfer: %d messages\n", nmsgs);
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100435 for (u8 retry = 0; retry < CDNS_I2C_ARB_LOST_MAX_RETRIES &&
436 nmsgs > 0; nmsgs--, msg++) {
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800437 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
438 if (msg->flags & I2C_M_RD) {
439 ret = cdns_i2c_read_data(i2c_bus, msg->addr, msg->buf,
440 msg->len);
441 } else {
442 ret = cdns_i2c_write_data(i2c_bus, msg->addr, msg->buf,
Moritz Fischer5e429852017-01-16 09:50:44 -0800443 msg->len);
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800444 }
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100445 if (ret == -EAGAIN) {
446 msg = message;
447 nmsgs = num_msgs;
448 retry++;
449 printf("%s,arbitration lost, retrying:%d\n", __func__,
450 retry);
451 continue;
452 }
453
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800454 if (ret) {
455 debug("i2c_write: error sending\n");
456 return -EREMOTEIO;
457 }
458 }
459
Siva Durga Prasad Paladugubc005122019-03-07 11:52:49 +0100460 return ret;
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800461}
462
Michal Simeka13767b2016-04-14 14:15:47 +0200463static int cdns_i2c_ofdata_to_platdata(struct udevice *dev)
464{
465 struct i2c_cdns_bus *i2c_bus = dev_get_priv(dev);
Moritz Fischer5e429852017-01-16 09:50:44 -0800466 struct cdns_i2c_platform_data *pdata =
467 (struct cdns_i2c_platform_data *)dev_get_driver_data(dev);
Tomasz Gorochowikf48ef0d2019-01-03 13:36:33 +0100468 struct clk clk;
469 int ret;
Michal Simeka13767b2016-04-14 14:15:47 +0200470
Michal Simek84de0f92019-01-18 10:43:39 +0100471 i2c_bus->regs = (struct cdns_i2c_regs *)dev_read_addr(dev);
Michal Simeka13767b2016-04-14 14:15:47 +0200472 if (!i2c_bus->regs)
473 return -ENOMEM;
474
Moritz Fischer5e429852017-01-16 09:50:44 -0800475 if (pdata)
476 i2c_bus->quirks = pdata->quirks;
477
Tomasz Gorochowikf48ef0d2019-01-03 13:36:33 +0100478 ret = clk_get_by_index(dev, 0, &clk);
479 if (ret)
480 return ret;
481
482 i2c_bus->input_freq = clk_get_rate(&clk);
Michal Simekad72e762016-04-14 14:15:49 +0200483
Michal Simeka13767b2016-04-14 14:15:47 +0200484 return 0;
485}
486
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800487static const struct dm_i2c_ops cdns_i2c_ops = {
488 .xfer = cdns_i2c_xfer,
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800489 .set_bus_speed = cdns_i2c_set_bus_speed,
490};
491
Moritz Fischer5e429852017-01-16 09:50:44 -0800492static const struct cdns_i2c_platform_data r1p10_i2c_def = {
493 .quirks = CDNS_I2C_BROKEN_HOLD_BIT,
494};
495
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800496static const struct udevice_id cdns_i2c_of_match[] = {
Moritz Fischer5e429852017-01-16 09:50:44 -0800497 { .compatible = "cdns,i2c-r1p10", .data = (ulong)&r1p10_i2c_def },
Moritz Fischer50994ab2016-12-22 09:36:10 -0800498 { .compatible = "cdns,i2c-r1p14" },
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800499 { /* end of table */ }
500};
501
502U_BOOT_DRIVER(cdns_i2c) = {
Michal Simek6c0e59f2020-01-07 08:50:34 +0100503 .name = "i2c_cdns",
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800504 .id = UCLASS_I2C,
505 .of_match = cdns_i2c_of_match,
Michal Simeka13767b2016-04-14 14:15:47 +0200506 .ofdata_to_platdata = cdns_i2c_ofdata_to_platdata,
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800507 .priv_auto_alloc_size = sizeof(struct i2c_cdns_bus),
508 .ops = &cdns_i2c_ops,
509};