blob: 1278ba63f4f3dc22331c0b87a146f3319fea7ce1 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Vladimir Barinov21871132015-07-20 20:49:59 +03002/*
3 * include/configs/stout.h
4 * This file is Stout board configuration.
5 *
6 * Copyright (C) 2015 Renesas Electronics Europe GmbH
7 * Copyright (C) 2015 Renesas Electronics Corporation
8 * Copyright (C) 2015 Cogent Embedded, Inc.
Vladimir Barinov21871132015-07-20 20:49:59 +03009 */
10
11#ifndef __STOUT_H
12#define __STOUT_H
13
Vladimir Barinov21871132015-07-20 20:49:59 +030014#include "rcar-gen2-common.h"
15
Marek Vasutec7113f2018-04-12 15:23:46 +020016#define STACK_AREA_SIZE 0x00100000
17#define LOW_LEVEL_MERAM_STACK \
Tom Rinieaf6ea62022-05-25 12:16:03 -040018 (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
Vladimir Barinov21871132015-07-20 20:49:59 +030019
20/* MEMORY */
21#define RCAR_GEN2_SDRAM_BASE 0x40000000
22#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
23#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
24
25/* SCIF */
Tom Rinidbfaeec2022-12-04 10:13:43 -050026#define CFG_SCIF_A
Vladimir Barinov21871132015-07-20 20:49:59 +030027
Vladimir Barinov21871132015-07-20 20:49:59 +030028/* SH Ether */
Tom Rini97148cb2022-12-04 10:13:52 -050029#define CFG_SH_ETHER_USE_PORT 0
Tom Rini7c480ba2022-12-04 10:13:50 -050030#define CFG_SH_ETHER_PHY_ADDR 0x1
Tom Rini85b55112022-12-04 10:13:51 -050031#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
Tom Riniff53ecc2022-12-04 10:13:49 -050032#define CFG_SH_ETHER_CACHE_WRITEBACK
Tom Rinic253cea2022-12-04 10:13:48 -050033#define CFG_SH_ETHER_CACHE_INVALIDATE
Tom Rini24513c32022-12-04 10:13:47 -050034#define CFG_SH_ETHER_ALIGNE_SIZE 64
Vladimir Barinov21871132015-07-20 20:49:59 +030035
Vladimir Barinov21871132015-07-20 20:49:59 +030036/* Board Clock */
Vladimir Barinov21871132015-07-20 20:49:59 +030037
Tom Rini0613c362022-12-04 10:03:50 -050038#define CFG_EXTRA_ENV_SETTINGS \
Marek Vasut07a80602018-11-27 00:19:03 +010039 "bootm_size=0x10000000\0"
Vladimir Barinov21871132015-07-20 20:49:59 +030040
Marek Vasutec7113f2018-04-12 15:23:46 +020041/* SPL support */
Vladimir Barinov21871132015-07-20 20:49:59 +030042
43#endif /* __STOUT_H */