Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 1 | /* |
| 2 | * U-boot - Configuration file for BlackStamp board |
| 3 | * Configuration by Ben Matthews for UR LLE using bf533-stamp.h |
| 4 | * as a template |
| 5 | * See http://blackfin.uclinux.org/gf/project/blackstamp/ |
| 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_BLACKSTAMP_H__ |
| 9 | #define __CONFIG_BLACKSTAMP_H__ |
| 10 | |
Mike Frysinger | f348ab8 | 2009-04-24 17:22:40 -0400 | [diff] [blame] | 11 | #include <asm/config-pre.h> |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 12 | |
| 13 | /* |
| 14 | * Debugging: Set these options if you're having problems |
| 15 | */ |
| 16 | /* |
| 17 | * #define CONFIG_DEBUG_EARLY_SERIAL |
| 18 | * #define DEBUG |
| 19 | * #define CONFIG_DEBUG_DUMP |
| 20 | * #define CONFIG_DEBUG_DUMP_SYMS |
| 21 | */ |
| 22 | #define CONFIG_PANIC_HANG 0 |
| 23 | |
| 24 | /* CPU Options |
| 25 | * Be sure to set the Silicon Revision Correctly |
| 26 | */ |
Mike Frysinger | fbcf8e8 | 2010-12-23 14:58:37 -0500 | [diff] [blame] | 27 | #define CONFIG_BFIN_CPU bf532-0.5 |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 28 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER |
| 29 | |
| 30 | /* |
| 31 | * Board settings |
| 32 | */ |
Ben Warren | 7194ab8 | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 33 | #define CONFIG_SMC91111 1 |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 34 | #define CONFIG_SMC91111_BASE 0x20300300 |
| 35 | |
| 36 | /* FLASH/ETHERNET uses the same address range |
| 37 | * Depending on what you have the CPLD doing |
| 38 | * this probably isn't needed |
| 39 | */ |
| 40 | #define SHARED_RESOURCES 1 |
| 41 | |
| 42 | /* Is I2C bit-banged? */ |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 43 | |
| 44 | /* |
| 45 | * Clock Settings |
| 46 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
| 47 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
| 48 | */ |
| 49 | /* CONFIG_CLKIN_HZ is any value in Hz */ |
| 50 | #define CONFIG_CLKIN_HZ 25000000 |
| 51 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
| 52 | /* 1 = CLKIN / 2 */ |
| 53 | #define CONFIG_CLKIN_HALF 0 |
| 54 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
| 55 | /* 1 = bypass PLL */ |
| 56 | #define CONFIG_PLL_BYPASS 0 |
| 57 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
| 58 | /* Values can range from 0-63 (where 0 means 64) */ |
| 59 | #define CONFIG_VCO_MULT 16 |
| 60 | /* CCLK_DIV controls the core clock divider */ |
| 61 | /* Values can be 1, 2, 4, or 8 ONLY */ |
| 62 | #define CONFIG_CCLK_DIV 1 |
| 63 | /* SCLK_DIV controls the system clock divider */ |
| 64 | /* Values can range from 1-15 */ |
| 65 | #define CONFIG_SCLK_DIV 3 |
| 66 | |
| 67 | /* |
| 68 | * Network settings |
| 69 | */ |
| 70 | |
Ben Warren | 7194ab8 | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 71 | #ifdef CONFIG_SMC91111 |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 72 | #define CONFIG_IPADDR 192.168.0.15 |
| 73 | #define CONFIG_NETMASK 255.255.255.0 |
| 74 | #define CONFIG_GATEWAYIP 192.168.0.1 |
| 75 | #define CONFIG_SERVERIP 192.168.0.2 |
| 76 | #define CONFIG_HOSTNAME blackstamp |
Joe Hershberger | 8b3637c | 2011-10-13 13:03:47 +0000 | [diff] [blame] | 77 | #define CONFIG_ROOTPATH "/checkout/uClinux-dist/romfs" |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 78 | #define CONFIG_SYS_AUTOLOAD "no" |
| 79 | |
| 80 | /* To remove hardcoding and enable MAC storage in EEPROM */ |
| 81 | /* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */ |
| 82 | #endif |
| 83 | |
| 84 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
Mike Frysinger | f8bf54b | 2009-06-25 19:40:28 -0400 | [diff] [blame] | 85 | #define CONFIG_ENV_OFFSET 0x40000 |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 86 | #define CONFIG_ENV_SIZE 0x2000 |
| 87 | #define CONFIG_ENV_SECT_SIZE 0x40000 |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 88 | |
| 89 | /* |
| 90 | * SDRAM settings & memory map |
| 91 | */ |
| 92 | |
| 93 | #define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */ |
| 94 | #define CONFIG_MEM_ADD_WDTH 10 /* 8, 9, 10, 11 */ |
| 95 | |
| 96 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) |
| 97 | #define CONFIG_SYS_MALLOC_LEN (384 << 10) |
| 98 | |
| 99 | /* |
| 100 | * Command settings |
| 101 | */ |
| 102 | |
| 103 | #define CONFIG_SYS_LONGHELP 1 |
| 104 | #define CONFIG_CMDLINE_EDITING 1 |
| 105 | #define CONFIG_AUTO_COMPLETE 1 |
| 106 | #define CONFIG_ENV_OVERWRITE 1 |
| 107 | |
| 108 | #include <config_cmd_default.h> |
| 109 | |
Ben Warren | 7194ab8 | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 110 | #ifdef CONFIG_SMC91111 |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 111 | # define CONFIG_CMD_DHCP |
| 112 | # define CONFIG_CMD_PING |
| 113 | #else |
| 114 | # undef CONFIG_CMD_NET |
| 115 | #endif |
| 116 | |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 117 | #ifdef CONFIG_SYS_I2C_SOFT |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 118 | # define CONFIG_CMD_I2C |
| 119 | #endif |
| 120 | |
| 121 | #define CONFIG_CMD_BOOTLDR |
| 122 | #define CONFIG_CMD_CACHE |
| 123 | #define CONFIG_CMD_CPLBINFO |
| 124 | #define CONFIG_CMD_DATE |
| 125 | #define CONFIG_CMD_SF |
| 126 | #define CONFIG_CMD_ELF |
| 127 | |
| 128 | #define CONFIG_BOOTDELAY 5 |
| 129 | #define CONFIG_BOOTCOMMAND "run ramboot" |
| 130 | #define CONFIG_BOOTARGS \ |
| 131 | "root=/dev/mtdblock0 rw " \ |
Marek Vasut | 5368c55 | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 132 | "clkin_hz=" __stringify(CONFIG_CLKIN_HZ) " " \ |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 133 | "earlyprintk=" \ |
| 134 | "serial," \ |
Marek Vasut | 5368c55 | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 135 | "uart" __stringify(CONFIG_UART_CONSOLE) "," \ |
| 136 | __stringify(CONFIG_BAUDRATE) " " \ |
| 137 | "console=ttyBF0," __stringify(CONFIG_BAUDRATE) |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 138 | |
| 139 | #if defined(CONFIG_CMD_NET) |
| 140 | # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) |
| 141 | # define UBOOT_ENV_FILE "u-boot.bin" |
| 142 | # else |
| 143 | # define UBOOT_ENV_FILE "u-boot.ldr" |
| 144 | # endif |
| 145 | # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) |
| 146 | # ifdef CONFIG_SPI |
| 147 | # define UBOOT_ENV_UPDATE \ |
| 148 | "eeprom write $(loadaddr) 0x0 $(filesize)" |
| 149 | # else |
| 150 | # define UBOOT_ENV_UPDATE \ |
Marek Vasut | 5368c55 | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 151 | "sf probe " __stringify(BFIN_BOOT_SPI_SSEL) ";" \ |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 152 | "sf erase 0 0x40000;" \ |
| 153 | "sf write $(loadaddr) 0 $(filesize)" |
| 154 | # endif |
| 155 | # else |
| 156 | # define UBOOT_ENV_UPDATE \ |
| 157 | "protect off 0x20000000 0x2003FFFF;" \ |
| 158 | "erase 0x20000000 0x2003FFFF;" \ |
| 159 | "cp.b $(loadaddr) 0x20000000 $(filesize)" |
| 160 | # endif |
| 161 | # define NETWORK_ENV_SETTINGS \ |
| 162 | "ubootfile=" UBOOT_ENV_FILE "\0" \ |
| 163 | "update=" \ |
| 164 | "tftp $(loadaddr) $(ubootfile);" \ |
| 165 | UBOOT_ENV_UPDATE \ |
| 166 | "\0" \ |
| 167 | "addip=set bootargs $(bootargs) " \ |
| 168 | "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \ |
| 169 | "$(hostname):eth0:off" \ |
| 170 | "\0" \ |
| 171 | "ramargs=set bootargs " CONFIG_BOOTARGS "\0" \ |
| 172 | "ramboot=" \ |
| 173 | "tftp $(loadaddr) uImage;" \ |
| 174 | "run ramargs;" \ |
| 175 | "run addip;" \ |
| 176 | "bootm" \ |
| 177 | "\0" \ |
| 178 | "nfsargs=set bootargs " \ |
| 179 | "root=/dev/nfs rw " \ |
| 180 | "nfsroot=$(serverip):$(rootpath),tcp,nfsvers=3" \ |
| 181 | "\0" \ |
| 182 | "nfsboot=" \ |
| 183 | "tftp $(loadaddr) vmImage;" \ |
| 184 | "run nfsargs;" \ |
| 185 | "run addip;" \ |
| 186 | "bootm" \ |
| 187 | "\0" |
| 188 | #else |
| 189 | # define NETWORK_ENV_SETTINGS |
| 190 | #endif |
| 191 | |
| 192 | /* |
| 193 | * Console settings |
| 194 | */ |
| 195 | #define CONFIG_BAUDRATE 57600 |
| 196 | #define CONFIG_LOADS_ECHO 1 |
| 197 | #define CONFIG_UART_CONSOLE 0 |
| 198 | |
| 199 | /* |
| 200 | * I2C settings |
| 201 | * By default PF2 is used as SDA and PF3 as SCL on the Stamp board |
| 202 | * Located on the expansion connector on pins 86/85 |
| 203 | * Note these pins are arbitrarily chosen because we aren't using |
| 204 | * them yet. You can (and probably should) change these values! |
| 205 | */ |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 206 | #ifdef CONFIG_SYS_I2C_SOFT |
Mike Frysinger | beb60e7 | 2010-06-08 16:22:44 -0400 | [diff] [blame] | 207 | #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9 |
| 208 | #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8 |
Heiko Schocher | ea818db | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 209 | #define CONFIG_SYS_SOFT_I2C_SPEED 50000 |
| 210 | #define CONFIG_SYS_SOFT_I2C_SLAVE 0xFE |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 211 | #endif |
| 212 | |
| 213 | /* |
| 214 | * Miscellaneous configurable options |
| 215 | */ |
| 216 | #define CONFIG_RTC_BFIN 1 |
| 217 | |
| 218 | /* |
| 219 | * Serial Flash Infomation |
| 220 | */ |
| 221 | #define CONFIG_BFIN_SPI |
Mike Frysinger | f8bf54b | 2009-06-25 19:40:28 -0400 | [diff] [blame] | 222 | /* For the M25P64 SCK Should be Kept < 15Mhz */ |
| 223 | #define CONFIG_ENV_SPI_MAX_HZ 15000000 |
| 224 | #define CONFIG_SF_DEFAULT_SPEED 15000000 |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 225 | #define CONFIG_SPI_FLASH |
| 226 | #define CONFIG_SPI_FLASH_STMICRO |
| 227 | |
| 228 | /* |
| 229 | * FLASH organization and environment definitions |
| 230 | */ |
| 231 | |
| 232 | #define CONFIG_EBIU_AMGCTL_VAL 0xFF |
| 233 | #define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3 |
| 234 | #define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983 |
| 235 | #define CONFIG_EBIU_SDRRC_VAL 0x268 |
| 236 | #define CONFIG_EBIU_SDGCTL_VAL 0x911109 |
| 237 | |
| 238 | /* Even though Rev C boards have Parallel Flash |
| 239 | * We aren't supporting it. Newer versions of the |
| 240 | * hardware don't support Parallel Flash at all. |
| 241 | */ |
| 242 | #define CONFIG_SYS_NO_FLASH |
| 243 | #undef CONFIG_CMD_IMLS |
| 244 | #undef CONFIG_CMD_JFFS2 |
| 245 | #undef CONFIG_CMD_FLASH |
| 246 | |
Mike Frysinger | 3088189 | 2008-10-12 23:28:33 -0400 | [diff] [blame] | 247 | #endif |