wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2003 |
| 3 | * Texas Instruments. |
| 4 | * Kshitij Gupta <kshitij@ti.com> |
| 5 | * Configuation settings for the TI OMAP Innovator board. |
| 6 | * |
| 7 | * (C) Copyright 2004 |
| 8 | * ARM Ltd. |
| 9 | * Philippe Robin, <philippe.robin@arm.com> |
| 10 | * Configuration for Versatile PB. |
| 11 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 12 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #ifndef __CONFIG_H |
| 16 | #define __CONFIG_H |
| 17 | |
| 18 | /* |
| 19 | * High Level Configuration Options |
| 20 | * (easy to change) |
| 21 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 22 | #define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 23 | #define CONFIG_VERSATILE 1 /* in Versatile Platform Board */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 24 | #define CONFIG_ARCH_VERSATILE 1 /* Specifically, a Versatile */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 25 | |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 26 | #define CONFIG_SYS_MEMTEST_START 0x100000 |
| 27 | #define CONFIG_SYS_MEMTEST_END 0x10000000 |
| 28 | #define CONFIG_SYS_HZ (1000000 / 256) |
| 29 | #define CONFIG_SYS_TIMERBASE 0x101E2000 /* Timer 0 and 1 base */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 30 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 31 | #define CONFIG_SYS_TIMER_INTERVAL 10000 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 32 | #define CONFIG_SYS_TIMER_RELOAD (CONFIG_SYS_TIMER_INTERVAL >> 4) |
| 33 | #define CONFIG_SYS_TIMER_CTRL 0x84 /* Enable, Clock / 16 */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 34 | |
| 35 | /* |
| 36 | * control registers |
| 37 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 38 | #define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 39 | |
| 40 | /* |
| 41 | * System controller bit assignment |
| 42 | */ |
| 43 | #define VERSATILE_REFCLK 0 |
| 44 | #define VERSATILE_TIMCLK 1 |
| 45 | |
| 46 | #define VERSATILE_TIMER1_EnSel 15 |
| 47 | #define VERSATILE_TIMER2_EnSel 17 |
| 48 | #define VERSATILE_TIMER3_EnSel 19 |
| 49 | #define VERSATILE_TIMER4_EnSel 21 |
| 50 | |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 51 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 52 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 53 | #define CONFIG_MISC_INIT_R 1 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 54 | /* |
| 55 | * Size of malloc() pool |
| 56 | */ |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 57 | #define CONFIG_ENV_SIZE 8192 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 58 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 59 | |
| 60 | /* |
| 61 | * Hardware drivers |
| 62 | */ |
| 63 | |
Ben Warren | 7194ab8 | 2009-10-04 22:37:03 -0700 | [diff] [blame] | 64 | #define CONFIG_SMC91111 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 65 | #define CONFIG_SMC_USE_32_BIT |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 66 | #define CONFIG_SMC91111_BASE 0x10010000 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 67 | #undef CONFIG_SMC91111_EXT_PHY |
| 68 | |
| 69 | /* |
| 70 | * NS16550 Configuration |
| 71 | */ |
Andreas Engel | 48d0192 | 2008-09-08 14:30:53 +0200 | [diff] [blame] | 72 | #define CONFIG_PL011_SERIAL |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 73 | #define CONFIG_PL011_CLOCK 24000000 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 74 | #define CONFIG_PL01x_PORTS \ |
| 75 | {(void *)CONFIG_SYS_SERIAL0, \ |
| 76 | (void *)CONFIG_SYS_SERIAL1 } |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 77 | #define CONFIG_CONS_INDEX 0 |
wdenk | 6705d81 | 2004-08-02 23:22:59 +0000 | [diff] [blame] | 78 | |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 79 | #define CONFIG_BAUDRATE 38400 |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 80 | #define CONFIG_SYS_SERIAL0 0x101F1000 |
| 81 | #define CONFIG_SYS_SERIAL1 0x101F2000 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 82 | |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 83 | /* |
| 84 | * Command line configuration. |
| 85 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 86 | #define CONFIG_CMD_BDI |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 87 | #define CONFIG_CMD_DHCP |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 88 | #define CONFIG_CMD_FLASH |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 89 | #define CONFIG_CMD_IMI |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 90 | #define CONFIG_CMD_MEMORY |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 91 | #define CONFIG_CMD_NET |
| 92 | #define CONFIG_CMD_PING |
Mike Frysinger | bdab39d | 2009-01-28 19:08:14 -0500 | [diff] [blame] | 93 | #define CONFIG_CMD_SAVEENV |
Jon Loeliger | dca3b3d | 2007-07-04 22:33:46 -0500 | [diff] [blame] | 94 | |
Jon Loeliger | d3b8c1a | 2007-07-09 21:57:31 -0500 | [diff] [blame] | 95 | /* |
| 96 | * BOOTP options |
| 97 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 98 | #define CONFIG_BOOTP_BOOTPATH |
Jon Loeliger | d3b8c1a | 2007-07-09 21:57:31 -0500 | [diff] [blame] | 99 | #define CONFIG_BOOTP_GATEWAY |
| 100 | #define CONFIG_BOOTP_HOSTNAME |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 101 | #define CONFIG_BOOTP_SUBNETMASK |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 102 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 103 | #define CONFIG_BOOTDELAY 2 |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 104 | #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp "\ |
| 105 | "netdev=25,0,0xf1010000,0xf1010010,eth0" |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 106 | |
| 107 | /* |
| 108 | * Static configuration when assigning fixed address |
| 109 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 110 | #define CONFIG_BOOTFILE "/tftpboot/uImage" /* file to load */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 111 | |
| 112 | /* |
| 113 | * Miscellaneous configurable options |
| 114 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 115 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 116 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | d6e8ed8 | 2009-05-02 11:53:49 +0200 | [diff] [blame] | 117 | /* Monitor Command Prompt */ |
| 118 | #ifdef CONFIG_ARCH_VERSATILE_AB |
| 119 | # define CONFIG_SYS_PROMPT "VersatileAB # " |
| 120 | #else |
| 121 | # define CONFIG_SYS_PROMPT "VersatilePB # " |
| 122 | #endif |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 123 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_PBSIZE \ |
| 125 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 126 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 127 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 128 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 129 | #define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 130 | |
| 131 | /*----------------------------------------------------------------------- |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 132 | * Physical Memory Map |
| 133 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 134 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
| 135 | #define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ |
| 136 | #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 137 | #define PHYS_FLASH_SIZE 0x04000000 /* 64MB */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 138 | |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 139 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 140 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00800000 |
| 141 | #define CONFIG_SYS_INIT_RAM_SIZE 0x000FFFFF |
| 142 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ |
| 143 | GENERATED_GBL_DATA_SIZE) |
| 144 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 145 | CONFIG_SYS_GBL_DATA_OFFSET) |
| 146 | |
| 147 | #define CONFIG_BOARD_EARLY_INIT_F |
| 148 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 149 | /*----------------------------------------------------------------------- |
| 150 | * FLASH and environment organization |
| 151 | */ |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 152 | #ifdef CONFIG_ARCH_VERSATILE_QEMU |
| 153 | #define CONFIG_SYS_TEXT_BASE 0x10000 |
| 154 | #define CONFIG_SYS_NO_FLASH |
| 155 | #define CONFIG_ENV_IS_NOWHERE |
| 156 | #define CONFIG_SYS_MONITOR_LEN 0x80000 |
| 157 | #else |
| 158 | #define CONFIG_SYS_TEXT_BASE 0x01000000 |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 159 | /* |
| 160 | * Use the CFI flash driver for ease of use |
| 161 | */ |
| 162 | #define CONFIG_SYS_FLASH_CFI |
| 163 | #define CONFIG_FLASH_CFI_DRIVER |
| 164 | #define CONFIG_ENV_IS_IN_FLASH 1 |
| 165 | /* |
| 166 | * System control register |
| 167 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 2600b85 | 2009-06-20 11:02:17 +0200 | [diff] [blame] | 168 | #define VERSATILE_SYS_BASE 0x10000000 |
| 169 | #define VERSATILE_SYS_FLASH_OFFSET 0x4C |
| 170 | #define VERSATILE_FLASHCTRL \ |
| 171 | (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET) |
| 172 | /* Enable writing to flash */ |
| 173 | #define VERSATILE_FLASHPROG_FLVPPEN (1 << 0) |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 174 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 175 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 176 | #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */ |
| 177 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 178 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 179 | /* |
| 180 | * Note that CONFIG_SYS_MAX_FLASH_SECT allows for a parameter block |
| 181 | * i.e. |
| 182 | * the bottom "sector" (bottom boot), or top "sector" |
| 183 | * (top boot), is a seperate erase region divided into |
| 184 | * 4 (equal) smaller sectors. This, notionally, allows |
| 185 | * quicker erase/rewrire of the most frequently changed |
| 186 | * area...... |
| 187 | * CONFIG_SYS_MAX_FLASH_SECT is padded up to a multiple of 4 |
| 188 | */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 189 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 190 | #ifdef CONFIG_ARCH_VERSATILE_AB |
| 191 | #define FLASH_SECTOR_SIZE 0x00020000 /* 128 KB sectors */ |
| 192 | #define CONFIG_ENV_SECT_SIZE (2 * FLASH_SECTOR_SIZE) |
| 193 | #define CONFIG_SYS_MAX_FLASH_SECT (520) |
| 194 | #endif |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 195 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 196 | #ifdef CONFIG_ARCH_VERSATILE_PB /* Versatile PB is default */ |
| 197 | #define FLASH_SECTOR_SIZE 0x00040000 /* 256 KB sectors */ |
| 198 | #define CONFIG_ENV_SECT_SIZE FLASH_SECTOR_SIZE |
| 199 | #define CONFIG_SYS_MAX_FLASH_SECT (260) |
| 200 | #endif |
| 201 | |
| 202 | #define CONFIG_SYS_FLASH_BASE 0x34000000 |
| 203 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 204 | |
| 205 | #define CONFIG_SYS_MONITOR_LEN (4 * CONFIG_ENV_SECT_SIZE) |
| 206 | |
| 207 | /* The ARM Boot Monitor is shipped in the lowest sector of flash */ |
| 208 | |
| 209 | #define FLASH_TOP (CONFIG_SYS_FLASH_BASE + PHYS_FLASH_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 210 | #define CONFIG_ENV_ADDR (FLASH_TOP - CONFIG_ENV_SECT_SIZE) |
| 211 | #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) |
| 212 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_ENV_ADDR - CONFIG_SYS_MONITOR_LEN) |
| 213 | |
| 214 | #define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */ |
| 215 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */ |
| 216 | |
402jagan@gmail.com | de1f9ac | 2012-07-29 04:26:08 +0000 | [diff] [blame] | 217 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */ |
Stefano Babic | d388298 | 2011-06-24 03:04:38 +0000 | [diff] [blame] | 218 | #endif |
| 219 | |
Jean-Christophe PLAGNIOL-VILLARD | 9869227 | 2009-05-02 11:53:50 +0200 | [diff] [blame] | 220 | #endif /* __CONFIG_H */ |