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Aneesh V16dc7022011-09-08 11:05:49 -04001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
6 *
7 * TI OMAP4 common configuration settings
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_OMAP4_COMMON_H
29#define __CONFIG_OMAP4_COMMON_H
30
31/*
32 * High Level Configuration Options
33 */
34#define CONFIG_ARMV7 1 /* This is an ARM V7 CPU core */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP44XX 1 /* which is a 44XX */
37#define CONFIG_OMAP4430 1 /* which is in a 4430 */
Marek Vasut308252a2012-07-21 05:02:23 +000038#define CONFIG_OMAP_GPIO
Aneesh V16dc7022011-09-08 11:05:49 -040039
40/* Get CPU defs */
41#include <asm/arch/cpu.h>
Sricharan508a58f2011-11-15 09:49:55 -050042#include <asm/arch/omap.h>
Aneesh V16dc7022011-09-08 11:05:49 -040043
44/* Display CPU and Board Info */
45#define CONFIG_DISPLAY_CPUINFO 1
46#define CONFIG_DISPLAY_BOARDINFO 1
47
48/* Clock Defines */
49#define V_OSCK 38400000 /* Clock output from T2 */
50#define V_SCLK V_OSCK
51
Aneesh V16dc7022011-09-08 11:05:49 -040052#define CONFIG_MISC_INIT_R
53
54#define CONFIG_OF_LIBFDT 1
Tom Rinif0617d42013-02-19 11:18:18 +000055#define CONFIG_CMD_BOOTZ
Aneesh V16dc7022011-09-08 11:05:49 -040056#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
57#define CONFIG_SETUP_MEMORY_TAGS 1
58#define CONFIG_INITRD_TAG 1
59#define CONFIG_REVISION_TAG 1
60
61/*
62 * Size of malloc() pool
63 * Total Size Environment - 128k
64 * Malloc - add 256k
65 */
66#define CONFIG_ENV_SIZE (128 << 10)
67#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10))
68/* Vector Base */
69#define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE
70
71/*
72 * Hardware drivers
73 */
74
75/*
76 * serial port - NS16550 compatible
77 */
78#define V_NS16550_CLK 48000000
79
80#define CONFIG_SYS_NS16550
81#define CONFIG_SYS_NS16550_SERIAL
82#define CONFIG_SYS_NS16550_REG_SIZE (-4)
83#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84#define CONFIG_CONS_INDEX 3
85#define CONFIG_SYS_NS16550_COM3 UART3_BASE
86
87#define CONFIG_BAUDRATE 115200
88#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
89 115200}
SRICHARAN R47c6ea02013-04-24 00:41:25 +000090
91/* CPU */
92#define CONFIG_ARCH_CPU_INIT
93
Aneesh V16dc7022011-09-08 11:05:49 -040094/* I2C */
95#define CONFIG_HARD_I2C 1
96#define CONFIG_SYS_I2C_SPEED 100000
97#define CONFIG_SYS_I2C_SLAVE 1
Aneesh V16dc7022011-09-08 11:05:49 -040098#define CONFIG_DRIVER_OMAP34XX_I2C 1
99#define CONFIG_I2C_MULTI_BUS 1
100
101/* TWL6030 */
Balaji T K14fa2dd2011-09-08 06:34:57 +0000102#ifndef CONFIG_SPL_BUILD
Aneesh V16dc7022011-09-08 11:05:49 -0400103#define CONFIG_TWL6030_POWER 1
Balaji T K14fa2dd2011-09-08 06:34:57 +0000104#endif
Aneesh V16dc7022011-09-08 11:05:49 -0400105
106/* MMC */
107#define CONFIG_GENERIC_MMC 1
108#define CONFIG_MMC 1
109#define CONFIG_OMAP_HSMMC 1
Aneesh V16dc7022011-09-08 11:05:49 -0400110#define CONFIG_DOS_PARTITION 1
111
112
113/* USB */
114#define CONFIG_MUSB_UDC 1
115#define CONFIG_USB_OMAP3 1
116
117/* USB device configuration */
118#define CONFIG_USB_DEVICE 1
119#define CONFIG_USB_TTY 1
120#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
121
122/* Flash */
123#define CONFIG_SYS_NO_FLASH 1
124
125/* commands to include */
126#include <config_cmd_default.h>
127
128/* Enabled commands */
129#define CONFIG_CMD_EXT2 /* EXT2 Support */
130#define CONFIG_CMD_FAT /* FAT support */
131#define CONFIG_CMD_I2C /* I2C serial bus support */
132#define CONFIG_CMD_MMC /* MMC support */
133
134/* Disabled commands */
135#undef CONFIG_CMD_NET
136#undef CONFIG_CMD_NFS
137#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
138#undef CONFIG_CMD_IMLS /* List all found images */
139
140/*
141 * Environment setup
142 */
143
144#define CONFIG_BOOTDELAY 3
SRICHARAN R143070d2013-04-04 23:39:27 +0000145#define CONFIG_ENV_VARS_UBOOT_CONFIG
146#define CONFIG_CMD_FS_GENERIC
147#define CONFIG_CMD_EXT2
148#define CONFIG_CMD_EXT4
Aneesh V16dc7022011-09-08 11:05:49 -0400149
150#define CONFIG_ENV_OVERWRITE
151
152#define CONFIG_EXTRA_ENV_SETTINGS \
153 "loadaddr=0x82000000\0" \
Aneesh Vd71a4912011-11-21 23:38:58 +0000154 "console=ttyO2,115200n8\0" \
Jon Hunterc176dd02012-05-01 10:05:08 +0000155 "fdt_high=0xffffffff\0" \
SRICHARAN R143070d2013-04-04 23:39:27 +0000156 "fdtaddr=0x80f80000\0" \
157 "bootpart=0:2\0" \
158 "bootdir=/boot\0" \
SRICHARAN Raaed0a22013-04-04 23:39:47 +0000159 "bootfile=zImage\0" \
Aneesh V16dc7022011-09-08 11:05:49 -0400160 "usbtty=cdc_acm\0" \
161 "vram=16M\0" \
162 "mmcdev=0\0" \
163 "mmcroot=/dev/mmcblk0p2 rw\0" \
164 "mmcrootfstype=ext3 rootwait\0" \
165 "mmcargs=setenv bootargs console=${console} " \
166 "vram=${vram} " \
167 "root=${mmcroot} " \
168 "rootfstype=${mmcrootfstype}\0" \
169 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
170 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
171 "source ${loadaddr}\0" \
Javier Martinez Canillasd70f5482013-01-07 03:51:20 +0000172 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
173 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
174 "env import -t ${loadaddr} ${filesize}\0" \
SRICHARAN R143070d2013-04-04 23:39:27 +0000175 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
Aneesh V16dc7022011-09-08 11:05:49 -0400176 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
177 "run mmcargs; " \
SRICHARAN Raaed0a22013-04-04 23:39:47 +0000178 "bootz ${loadaddr} - ${fdtaddr}\0" \
SRICHARAN R143070d2013-04-04 23:39:27 +0000179 "findfdt="\
180 "if test $board_name = sdp4430; then " \
181 "setenv fdtfile omap4-sdp.dtb; fi; " \
182 "if test $board_name = panda; then " \
Dan Murphy34f667b2013-04-18 06:29:53 +0000183 "setenv fdtfile omap4-panda.dtb; fi;" \
184 "if test $board_name = panda-es; then " \
185 "setenv fdtfile omap4-panda-es.dtb; fi; \0" \
SRICHARAN R143070d2013-04-04 23:39:27 +0000186 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
Aneesh V16dc7022011-09-08 11:05:49 -0400187
188#define CONFIG_BOOTCOMMAND \
SRICHARAN R143070d2013-04-04 23:39:27 +0000189 "run findfdt; " \
Andrew Bradford66968112012-10-01 05:06:52 +0000190 "mmc dev ${mmcdev}; if mmc rescan; then " \
Javier Martinez Canillasd70f5482013-01-07 03:51:20 +0000191 "echo SD/MMC found on device ${mmcdev};" \
Aneesh V16dc7022011-09-08 11:05:49 -0400192 "if run loadbootscript; then " \
193 "run bootscript; " \
194 "else " \
Javier Martinez Canillasd70f5482013-01-07 03:51:20 +0000195 "if run loadbootenv; then " \
196 "run importbootenv; " \
197 "fi;" \
198 "if test -n ${uenvcmd}; then " \
199 "echo Running uenvcmd ...;" \
200 "run uenvcmd;" \
201 "fi;" \
202 "fi;" \
SRICHARAN R143070d2013-04-04 23:39:27 +0000203 "if run loadimage; then " \
204 "run loadfdt;" \
Javier Martinez Canillasd70f5482013-01-07 03:51:20 +0000205 "run mmcboot; " \
Aneesh V16dc7022011-09-08 11:05:49 -0400206 "fi; " \
207 "fi"
208
209#define CONFIG_AUTO_COMPLETE 1
210
211/*
212 * Miscellaneous configurable options
213 */
214
215#define CONFIG_SYS_LONGHELP /* undef to save memory */
216#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Aneesh V16dc7022011-09-08 11:05:49 -0400217#define CONFIG_SYS_CBSIZE 512
218/* Print Buffer Size */
219#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
220 sizeof(CONFIG_SYS_PROMPT) + 16)
221#define CONFIG_SYS_MAXARGS 16
222/* Boot Argument Buffer Size */
223#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
224
225/*
226 * memtest setup
227 */
228#define CONFIG_SYS_MEMTEST_START 0x80000000
229#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20))
230
231/* Default load address */
232#define CONFIG_SYS_LOAD_ADDR 0x80000000
233
234/* Use General purpose timer 1 */
235#define CONFIG_SYS_TIMERBASE GPT2_BASE
236#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
237#define CONFIG_SYS_HZ 1000
238
239/*
Aneesh V16dc7022011-09-08 11:05:49 -0400240 * SDRAM Memory Map
241 * Even though we use two CS all the memory
242 * is mapped to one contiguous block
243 */
244#define CONFIG_NR_DRAM_BANKS 1
245
246#define CONFIG_SYS_SDRAM_BASE 0x80000000
Tom Rini41aebf82012-08-08 17:03:10 -0700247#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
Aneesh V16dc7022011-09-08 11:05:49 -0400248 GENERATED_GBL_DATA_SIZE)
249
250#ifndef CONFIG_SYS_L2CACHE_OFF
251#define CONFIG_SYS_L2_PL310 1
252#define CONFIG_SYS_PL310_BASE 0x48242000
253#endif
Aneesh V8e408522011-11-21 23:38:59 +0000254#define CONFIG_SYS_CACHELINE_SIZE 32
Aneesh V16dc7022011-09-08 11:05:49 -0400255
256/* Defines for SDRAM init */
SRICHARAN R8e706912011-09-27 01:43:18 +0000257#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
258
Aneesh V16dc7022011-09-08 11:05:49 -0400259#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
260#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
261#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
262#endif
263
264/* Defines for SPL */
265#define CONFIG_SPL
Tom Rini47f7bca2012-08-13 12:03:19 -0700266#define CONFIG_SPL_FRAMEWORK
Aneesh V16dc7022011-09-08 11:05:49 -0400267#define CONFIG_SPL_TEXT_BASE 0x40304350
268#define CONFIG_SPL_MAX_SIZE (38 * 1024)
Tom Rini41aebf82012-08-08 17:03:10 -0700269#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
Tom Rini861a86f2012-08-13 11:37:56 -0700270#define CONFIG_SPL_DISPLAY_PRINT
Aneesh V16dc7022011-09-08 11:05:49 -0400271
Aneesh V2d01dd92011-10-21 12:29:34 -0400272/*
Aneesh V2d01dd92011-10-21 12:29:34 -0400273 * 64 bytes before this address should be set aside for u-boot.img's
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000274 * header. That is 80E7FFC0--0x80E80000 should not be used for any
Aneesh V2d01dd92011-10-21 12:29:34 -0400275 * other needs.
276 */
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000277#define CONFIG_SYS_TEXT_BASE 0x80E80000
Aneesh V2d01dd92011-10-21 12:29:34 -0400278
Aneesh Vf6ddfdd2011-11-21 23:39:04 +0000279/*
280 * BSS and malloc area 64MB into memory to allow enough
281 * space for the kernel at the beginning of memory
282 */
283#define CONFIG_SPL_BSS_START_ADDR 0x84000000
284#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
285#define CONFIG_SYS_SPL_MALLOC_START 0x84100000
286#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
Aneesh V16dc7022011-09-08 11:05:49 -0400287
288#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
289#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
290#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
291#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
292
293#define CONFIG_SPL_LIBCOMMON_SUPPORT
294#define CONFIG_SPL_LIBDISK_SUPPORT
295#define CONFIG_SPL_I2C_SUPPORT
296#define CONFIG_SPL_MMC_SUPPORT
297#define CONFIG_SPL_FAT_SUPPORT
298#define CONFIG_SPL_LIBGENERIC_SUPPORT
299#define CONFIG_SPL_SERIAL_SUPPORT
Marek Vasut16e41c82012-07-21 05:02:27 +0000300#define CONFIG_SPL_GPIO_SUPPORT
Thomas Weberd1df0fd2012-05-14 10:28:54 +0000301#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
Aneesh V16dc7022011-09-08 11:05:49 -0400302
Aneesh V20c63122012-03-08 07:20:22 +0000303#define CONFIG_SYS_THUMB_BUILD
304
Aneesh V16dc7022011-09-08 11:05:49 -0400305#endif /* __CONFIG_OMAP4_COMMON_H */