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Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner041cdb52016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner041cdb52016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangdaeed1d2017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangdaeed1d2017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner0a2be692017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020037 select BOARD_LATE_INIT
Heiko Stübner0a2be692017-02-18 19:46:36 +010038 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang168eef72017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080051 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yangfb7b1b72019-07-16 20:40:17 +080062 imply TPL_BOOTROM_SUPPORT
Kever Yang6ae28a32019-07-09 22:05:56 +080063 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang168eef72017-06-23 17:17:52 +080064 select ROCKCHIP_BROM_HELPER
Kever Yangc34643e2019-04-02 20:41:24 +080065 select TPL_LIBCOMMON_SUPPORT
66 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080067 help
68 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
69 including NEON and GPU, Mali-400 graphics, several DDR3 options
70 and video codec support. Peripherals include Gigabit Ethernet,
71 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
72
Simon Glass2444dae2015-08-30 16:55:38 -060073config ROCKCHIP_RK3288
74 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053075 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080076 select SPL_BOARD_INIT if SPL
Kever Yanga381bcf2016-07-19 21:16:59 +080077 select SUPPORT_SPL
78 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +080079 select SUPPORT_TPL
80 imply TPL_BOOTROM_SUPPORT
81 imply TPL_CLK
82 imply TPL_DM
83 imply TPL_DRIVERS_MISC_SUPPORT
84 imply TPL_LIBCOMMON_SUPPORT
85 imply TPL_LIBGENERIC_SUPPORT
86 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yang45290842019-07-02 11:43:06 +080087 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +080088 imply TPL_OF_CONTROL
89 imply TPL_OF_PLATDATA
90 imply TPL_RAM
91 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +080092 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +080093 imply TPL_SERIAL_SUPPORT
94 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +080095 imply USB_FUNCTION_ROCKUSB
96 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -060097 help
98 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
99 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
100 video interfaces supporting HDMI and eDP, several DDR3 options
101 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100102 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600103
Kever Yang85a3cfb2017-02-23 15:37:51 +0800104config ROCKCHIP_RK3328
105 bool "Support Rockchip RK3328"
106 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300107 select SUPPORT_SPL
108 select SPL
109 imply SPL_SERIAL_SUPPORT
110 imply SPL_SEPARATE_BSS
111 select ENABLE_ARM_SOC_BOOT0_HOOK
112 select DEBUG_UART_BOARD_INIT
113 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800114 help
115 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
116 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
117 video interfaces supporting HDMI and eDP, several DDR3 options
118 and video codec support. Peripherals include Gigabit Ethernet,
119 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
120
Andreas Färber37a0c602017-05-15 17:51:18 +0800121config ROCKCHIP_RK3368
122 bool "Support Rockchip RK3368"
123 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200124 select SUPPORT_SPL
125 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200126 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
127 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich50714572017-06-11 23:46:25 +0200128 imply SPL_SEPARATE_BSS
129 imply SPL_SERIAL_SUPPORT
130 imply TPL_SERIAL_SUPPORT
Kever Yang82560cb2019-07-09 22:05:58 +0800131 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800132 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200133 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
134 into a big and little cluster with 4 cores each) Cortex-A53 including
135 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
136 (for the little cluster), PowerVR G6110 based graphics, one video
137 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
138 video codec support.
139
140 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
141 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800142
Kever Yanga381bcf2016-07-19 21:16:59 +0800143config ROCKCHIP_RK3399
144 bool "Support Rockchip RK3399"
145 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800146 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800147 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800148 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530149 select SPL_ATF
150 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530151 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530152 select SPL_LOAD_FIT
153 select SPL_CLK if SPL
154 select SPL_PINCTRL if SPL
155 select SPL_RAM if SPL
156 select SPL_REGMAP if SPL
157 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800158 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
159 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800160 select SPL_SEPARATE_BSS
Philipp Tomsichc0508e42017-07-26 12:29:01 +0200161 select SPL_SERIAL_SUPPORT
162 select SPL_DRIVERS_MISC_SUPPORT
Jagan Teki2666bd42019-05-08 11:11:43 +0530163 select CLK
164 select FIT
165 select PINCTRL
166 select RAM
167 select REGMAP
168 select SYSCON
169 select DM_PMIC
170 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800171 select BOARD_LATE_INIT
Andy Yanb4d23f72017-10-11 15:00:49 +0800172 select ROCKCHIP_BROM_HELPER
Kever Yang6bbf5e12018-11-09 11:18:15 +0800173 imply TPL_SERIAL_SUPPORT
174 imply TPL_LIBCOMMON_SUPPORT
175 imply TPL_LIBGENERIC_SUPPORT
176 imply TPL_SYS_MALLOC_SIMPLE
177 imply TPL_BOOTROM_SUPPORT
178 imply TPL_DRIVERS_MISC_SUPPORT
179 imply TPL_OF_CONTROL
180 imply TPL_DM
181 imply TPL_REGMAP
182 imply TPL_SYSCON
183 imply TPL_RAM
184 imply TPL_CLK
185 imply TPL_TINY_MEMSET
Kever Yang27381812019-07-09 22:06:01 +0800186 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yanga381bcf2016-07-19 21:16:59 +0800187 help
188 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
189 and quad-core Cortex-A53.
190 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
191 video interfaces supporting HDMI and eDP, several DDR3 options
192 and video codec support. Peripherals include Gigabit Ethernet,
193 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
194
Andy Yan2c1e11d2017-06-01 18:00:55 +0800195config ROCKCHIP_RV1108
196 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530197 select CPU_V7A
Andy Yan2c1e11d2017-06-01 18:00:55 +0800198 help
199 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
200 and a DSP.
201
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200202config ROCKCHIP_USB_UART
203 bool "Route uart output to usb pins"
204 help
205 Rockchip SoCs have the ability to route the signals of the debug
206 uart through the d+ and d- pins of a specific usb phy to enable
207 some form of closed-case debugging. With this option supported
208 SoCs will enable this routing as a debug measure.
209
Philipp Tomsichee14d292017-06-29 11:21:15 +0200210config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800211 bool "SPL returns to bootrom"
212 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100213 select ROCKCHIP_BROM_HELPER
Philipp Tomsichee14d292017-06-29 11:21:15 +0200214 depends on SPL
215 help
216 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
217 SPL will return to the boot rom, which will then load the U-Boot
218 binary to keep going on.
219
220config TPL_ROCKCHIP_BACK_TO_BROM
221 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800222 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200223 select ROCKCHIP_BROM_HELPER
224 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800225 help
226 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
227 SPL will return to the boot rom, which will then load the U-Boot
228 binary to keep going on.
229
Kever Yang18f85082019-07-09 22:05:55 +0800230config TPL_ROCKCHIP_COMMON_BOARD
231 bool ""
232 depends on TPL
233 help
234 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
235 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
236 common board is a basic TPL board init which can be shared for most
237 of SoCs to avoid copy-pase for different SoCs.
238
Andy Yane3067792017-10-11 15:00:16 +0800239config ROCKCHIP_BOOT_MODE_REG
240 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800241 help
Kever Yang15f09a12019-03-28 11:01:23 +0800242 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800243 according to the value from this register.
244
Kever Yangfa1392a2017-04-20 17:03:46 +0800245config ROCKCHIP_SPL_RESERVE_IRAM
246 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800247 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800248 help
249 SPL may need reserve memory for firmware loaded by SPL, whose load
250 address is in IRAM and may overlay with SPL text area if not
251 reserved.
252
Heiko Stübner1d845942017-02-18 19:46:25 +0100253config ROCKCHIP_BROM_HELPER
254 bool
255
Philipp Tomsichb377d222017-10-10 16:21:10 +0200256config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
257 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
258 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
259 help
260 Some Rockchip BROM variants (e.g. on the RK3188) load the
261 first stage in segments and enter multiple times. E.g. on
262 the RK3188, the first 1KB of the first stage are loaded
263 first and entered; after returning to the BROM, the
264 remainder of the first stage is loaded, but the BROM
265 re-enters at the same address/to the same code as previously.
266
267 This enables support code in the BOOT0 hook for the SPL stage
268 to allow multiple entries.
269
270config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
271 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
272 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
273 help
274 Some Rockchip BROM variants (e.g. on the RK3188) load the
275 first stage in segments and enter multiple times. E.g. on
276 the RK3188, the first 1KB of the first stage are loaded
277 first and entered; after returning to the BROM, the
278 remainder of the first stage is loaded, but the BROM
279 re-enters at the same address/to the same code as previously.
280
281 This enables support code in the BOOT0 hook for the TPL stage
282 to allow multiple entries.
283
Sandy Patterson230e0e02016-08-29 07:31:16 -0400284config SPL_MMC_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200285 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400286
huang linbe1d5e02015-11-17 14:20:27 +0800287source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800288source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100289source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800290source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200291source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800292source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800293source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800294source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800295source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600296endif