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Simon Glass2444dae2015-08-30 16:55:38 -06001if ARCH_ROCKCHIP
2
Heiko Stübner041cdb52016-07-16 00:17:15 +02003config ROCKCHIP_RK3036
4 bool "Support Rockchip RK3036"
Lokesh Vutlaacf15002018-04-26 18:21:26 +05305 select CPU_V7A
Kever Yanga381bcf2016-07-19 21:16:59 +08006 select SUPPORT_SPL
7 select SPL
Eddie Cai451dcf52018-01-17 09:51:41 +08008 imply USB_FUNCTION_ROCKUSB
9 imply CMD_ROCKUSB
Heiko Stübner041cdb52016-07-16 00:17:15 +020010 help
11 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
12 including NEON and GPU, Mali-400 graphics, several DDR3 options
13 and video codec support. Peripherals include Gigabit Ethernet,
14 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
15
Kever Yangdaeed1d2017-11-28 16:04:16 +080016config ROCKCHIP_RK3128
17 bool "Support Rockchip RK3128"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053018 select CPU_V7A
Kever Yangdaeed1d2017-11-28 16:04:16 +080019 help
20 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7
21 including NEON and GPU, Mali-400 graphics, several DDR3 options
22 and video codec support. Peripherals include Gigabit Ethernet,
23 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
24
Heiko Stübner0a2be692017-02-18 19:46:36 +010025config ROCKCHIP_RK3188
26 bool "Support Rockchip RK3188"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053027 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080028 select SPL_BOARD_INIT if SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010029 select SUPPORT_SPL
Heiko Stübner0a2be692017-02-18 19:46:36 +010030 select SPL
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020031 select SPL_CLK
Philipp Tomsich4bbb05b2017-10-10 16:21:17 +020032 select SPL_REGMAP
33 select SPL_SYSCON
34 select SPL_RAM
35 select SPL_DRIVERS_MISC_SUPPORT
Philipp Tomsich4d9253f2017-10-10 16:21:15 +020036 select SPL_ROCKCHIP_EARLYRETURN_TO_BROM
Heiko Stübner008a6102017-04-06 00:19:36 +020037 select BOARD_LATE_INIT
Heiko Stübner0a2be692017-02-18 19:46:36 +010038 select ROCKCHIP_BROM_HELPER
39 help
40 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9
41 including NEON and GPU, 512KB L2 cache, Mali-400 graphics, two
42 video interfaces, several memory options and video codec support.
43 Peripherals include Fast Ethernet, USB2 host and OTG, SDIO, I2S,
44 UART, SPI, I2C and PWMs.
45
Kever Yang168eef72017-06-23 17:17:52 +080046config ROCKCHIP_RK322X
47 bool "Support Rockchip RK3228/RK3229"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053048 select CPU_V7A
Kever Yang168eef72017-06-23 17:17:52 +080049 select SUPPORT_SPL
Kever Yangc34643e2019-04-02 20:41:24 +080050 select SUPPORT_TPL
Kever Yang168eef72017-06-23 17:17:52 +080051 select SPL
Kever Yangc34643e2019-04-02 20:41:24 +080052 select SPL_DM
53 select SPL_OF_LIBFDT
54 select TPL
55 select TPL_DM
56 select TPL_OF_LIBFDT
57 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
58 select TPL_NEEDS_SEPARATE_STACK if TPL
59 select SPL_DRIVERS_MISC_SUPPORT
60 imply SPL_SERIAL_SUPPORT
61 imply TPL_SERIAL_SUPPORT
Kever Yang6ae28a32019-07-09 22:05:56 +080062 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yang168eef72017-06-23 17:17:52 +080063 select ROCKCHIP_BROM_HELPER
Kever Yangc34643e2019-04-02 20:41:24 +080064 select TPL_LIBCOMMON_SUPPORT
65 select TPL_LIBGENERIC_SUPPORT
Kever Yang168eef72017-06-23 17:17:52 +080066 help
67 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7
68 including NEON and GPU, Mali-400 graphics, several DDR3 options
69 and video codec support. Peripherals include Gigabit Ethernet,
70 USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
71
Simon Glass2444dae2015-08-30 16:55:38 -060072config ROCKCHIP_RK3288
73 bool "Support Rockchip RK3288"
Lokesh Vutlaacf15002018-04-26 18:21:26 +053074 select CPU_V7A
Ley Foon Tan0680f1b2017-05-03 17:13:32 +080075 select SPL_BOARD_INIT if SPL
Kever Yanga381bcf2016-07-19 21:16:59 +080076 select SUPPORT_SPL
77 select SPL
Kever Yangd18ca742019-07-02 11:43:05 +080078 select SUPPORT_TPL
79 imply TPL_BOOTROM_SUPPORT
80 imply TPL_CLK
81 imply TPL_DM
82 imply TPL_DRIVERS_MISC_SUPPORT
83 imply TPL_LIBCOMMON_SUPPORT
84 imply TPL_LIBGENERIC_SUPPORT
85 imply TPL_NEEDS_SEPARATE_TEXT_BASE
Kever Yang45290842019-07-02 11:43:06 +080086 imply TPL_NEEDS_SEPARATE_STACK
Kever Yangd18ca742019-07-02 11:43:05 +080087 imply TPL_OF_CONTROL
88 imply TPL_OF_PLATDATA
89 imply TPL_RAM
90 imply TPL_REGMAP
Kever Yang3338f542019-07-09 22:05:57 +080091 imply TPL_ROCKCHIP_COMMON_BOARD
Kever Yangd18ca742019-07-02 11:43:05 +080092 imply TPL_SERIAL_SUPPORT
93 imply TPL_SYSCON
Eddie Caic3d098e2017-12-15 08:17:13 +080094 imply USB_FUNCTION_ROCKUSB
95 imply CMD_ROCKUSB
Simon Glass2444dae2015-08-30 16:55:38 -060096 help
97 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17
98 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
99 video interfaces supporting HDMI and eDP, several DDR3 options
100 and video codec support. Peripherals include Gigabit Ethernet,
Andreas Färberef904bf2016-11-02 18:03:01 +0100101 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
Simon Glass2444dae2015-08-30 16:55:38 -0600102
Kever Yang85a3cfb2017-02-23 15:37:51 +0800103config ROCKCHIP_RK3328
104 bool "Support Rockchip RK3328"
105 select ARM64
Kever Yangc009aeb2019-06-09 00:27:15 +0300106 select SUPPORT_SPL
107 select SPL
108 imply SPL_SERIAL_SUPPORT
109 imply SPL_SEPARATE_BSS
110 select ENABLE_ARM_SOC_BOOT0_HOOK
111 select DEBUG_UART_BOARD_INIT
112 select SYS_NS16550
Kever Yang85a3cfb2017-02-23 15:37:51 +0800113 help
114 The Rockchip RK3328 is a ARM-based SoC with a quad-core Cortex-A53.
115 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
116 video interfaces supporting HDMI and eDP, several DDR3 options
117 and video codec support. Peripherals include Gigabit Ethernet,
118 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
119
Andreas Färber37a0c602017-05-15 17:51:18 +0800120config ROCKCHIP_RK3368
121 bool "Support Rockchip RK3368"
122 select ARM64
Philipp Tomsich50714572017-06-11 23:46:25 +0200123 select SUPPORT_SPL
124 select SUPPORT_TPL
Philipp Tomsich4cf43782017-07-28 20:03:07 +0200125 select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
126 select TPL_NEEDS_SEPARATE_STACK if TPL
Philipp Tomsich50714572017-06-11 23:46:25 +0200127 imply SPL_SEPARATE_BSS
128 imply SPL_SERIAL_SUPPORT
129 imply TPL_SERIAL_SUPPORT
Kever Yang82560cb2019-07-09 22:05:58 +0800130 imply TPL_ROCKCHIP_COMMON_BOARD
Andreas Färber37a0c602017-05-15 17:51:18 +0800131 help
Philipp Tomsich9a8f0092017-06-10 00:47:53 +0200132 The Rockchip RK3368 is a ARM-based SoC with a octa-core (organised
133 into a big and little cluster with 4 cores each) Cortex-A53 including
134 AdvSIMD, 512KB L2 cache (for the big cluster) and 256 KB L2 cache
135 (for the little cluster), PowerVR G6110 based graphics, one video
136 output processor supporting LVDS/HDMI/eDP, several DDR3 options and
137 video codec support.
138
139 On-chip peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO,
140 I2S, UARTs, SPI, I2C and PWMs.
Andreas Färber37a0c602017-05-15 17:51:18 +0800141
Kever Yanga381bcf2016-07-19 21:16:59 +0800142config ROCKCHIP_RK3399
143 bool "Support Rockchip RK3399"
144 select ARM64
Kever Yang66e87cc2017-02-22 16:56:38 +0800145 select SUPPORT_SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800146 select SUPPORT_TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800147 select SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530148 select SPL_ATF
149 select SPL_ATF_NO_PLATFORM_PARAM if SPL_ATF
Jagan Tekiadde32d2019-06-21 00:25:03 +0530150 select SPL_BOARD_INIT if SPL
Jagan Teki2666bd42019-05-08 11:11:43 +0530151 select SPL_LOAD_FIT
152 select SPL_CLK if SPL
153 select SPL_PINCTRL if SPL
154 select SPL_RAM if SPL
155 select SPL_REGMAP if SPL
156 select SPL_SYSCON if SPL
Kever Yang6bbf5e12018-11-09 11:18:15 +0800157 select TPL_NEEDS_SEPARATE_TEXT_BASE if TPL
158 select TPL_NEEDS_SEPARATE_STACK if TPL
Kever Yang66e87cc2017-02-22 16:56:38 +0800159 select SPL_SEPARATE_BSS
Philipp Tomsichc0508e42017-07-26 12:29:01 +0200160 select SPL_SERIAL_SUPPORT
161 select SPL_DRIVERS_MISC_SUPPORT
Jagan Teki2666bd42019-05-08 11:11:43 +0530162 select CLK
163 select FIT
164 select PINCTRL
165 select RAM
166 select REGMAP
167 select SYSCON
168 select DM_PMIC
169 select DM_REGULATOR_FIXED
Andy Yane3067792017-10-11 15:00:16 +0800170 select BOARD_LATE_INIT
Andy Yanb4d23f72017-10-11 15:00:49 +0800171 select ROCKCHIP_BROM_HELPER
Kever Yang6bbf5e12018-11-09 11:18:15 +0800172 imply TPL_SERIAL_SUPPORT
173 imply TPL_LIBCOMMON_SUPPORT
174 imply TPL_LIBGENERIC_SUPPORT
175 imply TPL_SYS_MALLOC_SIMPLE
Jagan Teki4977cf62019-06-21 00:25:06 +0530176 imply TPL_BOARD_INIT
Kever Yang6bbf5e12018-11-09 11:18:15 +0800177 imply TPL_BOOTROM_SUPPORT
178 imply TPL_DRIVERS_MISC_SUPPORT
179 imply TPL_OF_CONTROL
180 imply TPL_DM
181 imply TPL_REGMAP
182 imply TPL_SYSCON
183 imply TPL_RAM
184 imply TPL_CLK
185 imply TPL_TINY_MEMSET
Kever Yanga381bcf2016-07-19 21:16:59 +0800186 help
187 The Rockchip RK3399 is a ARM-based SoC with a dual-core Cortex-A72
188 and quad-core Cortex-A53.
189 including NEON and GPU, 1MB L2 cache, Mali-T7 graphics, two
190 video interfaces supporting HDMI and eDP, several DDR3 options
191 and video codec support. Peripherals include Gigabit Ethernet,
192 USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs.
193
Andy Yan2c1e11d2017-06-01 18:00:55 +0800194config ROCKCHIP_RV1108
195 bool "Support Rockchip RV1108"
Lokesh Vutlaacf15002018-04-26 18:21:26 +0530196 select CPU_V7A
Andy Yan2c1e11d2017-06-01 18:00:55 +0800197 help
198 The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
199 and a DSP.
200
Heiko Stuebner5b5ca4c2018-10-08 13:01:56 +0200201config ROCKCHIP_USB_UART
202 bool "Route uart output to usb pins"
203 help
204 Rockchip SoCs have the ability to route the signals of the debug
205 uart through the d+ and d- pins of a specific usb phy to enable
206 some form of closed-case debugging. With this option supported
207 SoCs will enable this routing as a debug measure.
208
Philipp Tomsichee14d292017-06-29 11:21:15 +0200209config SPL_ROCKCHIP_BACK_TO_BROM
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800210 bool "SPL returns to bootrom"
211 default y if ROCKCHIP_RK3036
Heiko Stübner1d845942017-02-18 19:46:25 +0100212 select ROCKCHIP_BROM_HELPER
Philipp Tomsichee14d292017-06-29 11:21:15 +0200213 depends on SPL
214 help
215 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
216 SPL will return to the boot rom, which will then load the U-Boot
217 binary to keep going on.
218
219config TPL_ROCKCHIP_BACK_TO_BROM
220 bool "TPL returns to bootrom"
Kever Yang6bbf5e12018-11-09 11:18:15 +0800221 default y
Philipp Tomsichee14d292017-06-29 11:21:15 +0200222 select ROCKCHIP_BROM_HELPER
223 depends on TPL
Xu Ziyuanb47ea792016-07-12 19:09:49 +0800224 help
225 Rockchip SoCs have ability to load SPL & U-Boot binary. If enabled,
226 SPL will return to the boot rom, which will then load the U-Boot
227 binary to keep going on.
228
Kever Yang18f85082019-07-09 22:05:55 +0800229config TPL_ROCKCHIP_COMMON_BOARD
230 bool ""
231 depends on TPL
232 help
233 Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
234 init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
235 common board is a basic TPL board init which can be shared for most
236 of SoCs to avoid copy-pase for different SoCs.
237
Andy Yane3067792017-10-11 15:00:16 +0800238config ROCKCHIP_BOOT_MODE_REG
239 hex "Rockchip boot mode flag register address"
Andy Yane3067792017-10-11 15:00:16 +0800240 help
Kever Yang15f09a12019-03-28 11:01:23 +0800241 The Soc will enter to different boot mode(defined in asm/arch-rockchip/boot_mode.h)
Andy Yane3067792017-10-11 15:00:16 +0800242 according to the value from this register.
243
Kever Yangfa1392a2017-04-20 17:03:46 +0800244config ROCKCHIP_SPL_RESERVE_IRAM
245 hex "Size of IRAM reserved in SPL"
Kever Yang8a8106f2017-12-18 15:13:19 +0800246 default 0
Kever Yangfa1392a2017-04-20 17:03:46 +0800247 help
248 SPL may need reserve memory for firmware loaded by SPL, whose load
249 address is in IRAM and may overlay with SPL text area if not
250 reserved.
251
Heiko Stübner1d845942017-02-18 19:46:25 +0100252config ROCKCHIP_BROM_HELPER
253 bool
254
Philipp Tomsichb377d222017-10-10 16:21:10 +0200255config SPL_ROCKCHIP_EARLYRETURN_TO_BROM
256 bool "SPL requires early-return (for RK3188-style BROM) to BROM"
257 depends on SPL && ENABLE_ARM_SOC_BOOT0_HOOK
258 help
259 Some Rockchip BROM variants (e.g. on the RK3188) load the
260 first stage in segments and enter multiple times. E.g. on
261 the RK3188, the first 1KB of the first stage are loaded
262 first and entered; after returning to the BROM, the
263 remainder of the first stage is loaded, but the BROM
264 re-enters at the same address/to the same code as previously.
265
266 This enables support code in the BOOT0 hook for the SPL stage
267 to allow multiple entries.
268
269config TPL_ROCKCHIP_EARLYRETURN_TO_BROM
270 bool "TPL requires early-return (for RK3188-style BROM) to BROM"
271 depends on TPL && ENABLE_ARM_SOC_BOOT0_HOOK
272 help
273 Some Rockchip BROM variants (e.g. on the RK3188) load the
274 first stage in segments and enter multiple times. E.g. on
275 the RK3188, the first 1KB of the first stage are loaded
276 first and entered; after returning to the BROM, the
277 remainder of the first stage is loaded, but the BROM
278 re-enters at the same address/to the same code as previously.
279
280 This enables support code in the BOOT0 hook for the TPL stage
281 to allow multiple entries.
282
Sandy Patterson230e0e02016-08-29 07:31:16 -0400283config SPL_MMC_SUPPORT
Philipp Tomsichee14d292017-06-29 11:21:15 +0200284 default y if !SPL_ROCKCHIP_BACK_TO_BROM
Sandy Patterson230e0e02016-08-29 07:31:16 -0400285
huang linbe1d5e02015-11-17 14:20:27 +0800286source "arch/arm/mach-rockchip/rk3036/Kconfig"
Kever Yangdaeed1d2017-11-28 16:04:16 +0800287source "arch/arm/mach-rockchip/rk3128/Kconfig"
Heiko Stübner0a2be692017-02-18 19:46:36 +0100288source "arch/arm/mach-rockchip/rk3188/Kconfig"
Kever Yangb24a8ec2017-06-23 17:17:54 +0800289source "arch/arm/mach-rockchip/rk322x/Kconfig"
Heiko Stübner041cdb52016-07-16 00:17:15 +0200290source "arch/arm/mach-rockchip/rk3288/Kconfig"
Kever Yang85a3cfb2017-02-23 15:37:51 +0800291source "arch/arm/mach-rockchip/rk3328/Kconfig"
Andreas Färber37a0c602017-05-15 17:51:18 +0800292source "arch/arm/mach-rockchip/rk3368/Kconfig"
Kever Yanga381bcf2016-07-19 21:16:59 +0800293source "arch/arm/mach-rockchip/rk3399/Kconfig"
Andy Yan2c1e11d2017-06-01 18:00:55 +0800294source "arch/arm/mach-rockchip/rv1108/Kconfig"
Simon Glass2444dae2015-08-30 16:55:38 -0600295endif