Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007-2008 |
Stelian Pop | c9e798d | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 3 | * Stelian Pop <stelian@popies.net> |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * |
| 6 | * Configuation settings for the AT91SAM9261EK board. |
| 7 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_H |
| 12 | #define __CONFIG_H |
| 13 | |
| 14 | /* ARM asynchronous clock */ |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 15 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
Achim Ehrlich | 7c966a8 | 2010-02-24 10:29:16 +0100 | [diff] [blame] | 16 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 17 | |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 18 | #ifdef CONFIG_AT91SAM9G10 |
| 19 | #define CONFIG_AT91SAM9G10EK /* It's an Atmel AT91SAM9G10 EK*/ |
Sedji Gaouaou | 5ccc2d9 | 2009-06-25 17:04:15 +0200 | [diff] [blame] | 20 | #else |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 21 | #define CONFIG_AT91SAM9261EK /* It's an Atmel AT91SAM9261 EK*/ |
Sedji Gaouaou | 5ccc2d9 | 2009-06-25 17:04:15 +0200 | [diff] [blame] | 22 | #endif |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 23 | |
| 24 | #include <asm/hardware.h> |
| 25 | |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 26 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 27 | #define CONFIG_SETUP_MEMORY_TAGS |
| 28 | #define CONFIG_INITRD_TAG |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 29 | |
| 30 | #define CONFIG_SKIP_LOWLEVEL_INIT |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 31 | |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 32 | #define CONFIG_ATMEL_LEGACY |
| 33 | #define CONFIG_SYS_TEXT_BASE 0x21f00000 |
| 34 | |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 35 | /* |
| 36 | * Hardware drivers |
| 37 | */ |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 38 | |
Stelian Pop | 820f2a9 | 2008-05-08 14:52:30 +0200 | [diff] [blame] | 39 | /* LCD */ |
Stelian Pop | 820f2a9 | 2008-05-08 14:52:30 +0200 | [diff] [blame] | 40 | #define LCD_BPP LCD_COLOR8 |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 41 | #define CONFIG_LCD_LOGO |
Stelian Pop | 820f2a9 | 2008-05-08 14:52:30 +0200 | [diff] [blame] | 42 | #undef LCD_TEST_PATTERN |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 43 | #define CONFIG_LCD_INFO |
| 44 | #define CONFIG_LCD_INFO_BELOW_LOGO |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 45 | #define CONFIG_ATMEL_LCD |
Sedji Gaouaou | 5ccc2d9 | 2009-06-25 17:04:15 +0200 | [diff] [blame] | 46 | #ifdef CONFIG_AT91SAM9261EK |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 47 | #define CONFIG_ATMEL_LCD_BGR555 |
Sedji Gaouaou | 5ccc2d9 | 2009-06-25 17:04:15 +0200 | [diff] [blame] | 48 | #endif |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 49 | |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 50 | /* |
| 51 | * BOOTP options |
| 52 | */ |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 53 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 54 | #define CONFIG_BOOTP_BOOTPATH |
| 55 | #define CONFIG_BOOTP_GATEWAY |
| 56 | #define CONFIG_BOOTP_HOSTNAME |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 57 | |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 58 | /* SDRAM */ |
| 59 | #define CONFIG_NR_DRAM_BANKS 1 |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 60 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 61 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 |
| 62 | #define CONFIG_SYS_INIT_SP_ADDR \ |
Wenyou.Yang@microchip.com | 324873e | 2017-07-21 13:28:40 +0800 | [diff] [blame] | 63 | (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE) |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 64 | |
| 65 | /* NAND flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 74c076d | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 66 | #ifdef CONFIG_CMD_NAND |
| 67 | #define CONFIG_NAND_ATMEL |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 68 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 69 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 70 | #define CONFIG_SYS_NAND_DBW_8 |
Jean-Christophe PLAGNIOL-VILLARD | 74c076d | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 71 | /* our ALE is AD22 */ |
| 72 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 22) |
| 73 | /* our CLE is AD21 */ |
| 74 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) |
| 75 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| 76 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 |
Wolfgang Denk | 2eb99ca | 2009-07-18 21:52:24 +0200 | [diff] [blame] | 77 | |
Jean-Christophe PLAGNIOL-VILLARD | 74c076d | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 78 | #endif |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 79 | |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 80 | /* Ethernet */ |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 81 | #define CONFIG_DRIVER_DM9000 |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 82 | #define CONFIG_DM9000_BASE 0x30000000 |
| 83 | #define DM9000_IO CONFIG_DM9000_BASE |
| 84 | #define DM9000_DATA (CONFIG_DM9000_BASE + 4) |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 85 | #define CONFIG_DM9000_USE_16BIT |
| 86 | #define CONFIG_DM9000_NO_SROM |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 87 | #define CONFIG_NET_RETRY_COUNT 20 |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 88 | #define CONFIG_RESET_PHY_R |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 89 | |
| 90 | /* USB */ |
Jean-Christophe PLAGNIOL-VILLARD | 2b7178a | 2009-03-27 23:26:44 +0100 | [diff] [blame] | 91 | #define CONFIG_USB_ATMEL |
Bo Shen | dcd2f1a | 2013-10-21 16:14:00 +0800 | [diff] [blame] | 92 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 93 | #define CONFIG_USB_OHCI_NEW |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 94 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 95 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */ |
Sedji Gaouaou | 5ccc2d9 | 2009-06-25 17:04:15 +0200 | [diff] [blame] | 96 | #ifdef CONFIG_AT91SAM9G10EK |
| 97 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10" |
| 98 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261" |
Sedji Gaouaou | 5ccc2d9 | 2009-06-25 17:04:15 +0200 | [diff] [blame] | 100 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 101 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 102 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 103 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 104 | |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 105 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 106 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 107 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 108 | #ifdef CONFIG_SYS_USE_DATAFLASH_CS0 |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 109 | |
| 110 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
Nicolas Ferre | 89a7a87 | 2008-12-06 13:11:14 +0100 | [diff] [blame] | 111 | #define CONFIG_ENV_OFFSET 0x4200 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 112 | #define CONFIG_ENV_SIZE 0x4200 |
Wenyou.Yang@microchip.com | 324873e | 2017-07-21 13:28:40 +0800 | [diff] [blame] | 113 | #define CONFIG_ENV_SECT_SIZE 0x210 |
| 114 | #define CONFIG_ENV_SPI_MAX_HZ 15000000 |
| 115 | #define CONFIG_BOOTCOMMAND "sf probe 0; " \ |
| 116 | "sf read 0x22000000 0x84000 0x294000; " \ |
| 117 | "bootm 0x22000000" |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 118 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 119 | "root=/dev/mtdblock0 " \ |
Albin Tonnerre | 918319c | 2009-07-22 18:30:03 +0200 | [diff] [blame] | 120 | "mtdparts=atmel_nand:-(root) " \ |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 121 | "rw rootfstype=jffs2" |
| 122 | |
Nicolas Ferre | 89a7a87 | 2008-12-06 13:11:14 +0100 | [diff] [blame] | 123 | #elif CONFIG_SYS_USE_DATAFLASH_CS3 |
| 124 | |
| 125 | /* bootstrap + u-boot + env + linux in dataflash on CS3 */ |
Nicolas Ferre | 89a7a87 | 2008-12-06 13:11:14 +0100 | [diff] [blame] | 126 | #define CONFIG_ENV_OFFSET 0x4200 |
Nicolas Ferre | 89a7a87 | 2008-12-06 13:11:14 +0100 | [diff] [blame] | 127 | #define CONFIG_ENV_SIZE 0x4200 |
Wenyou.Yang@microchip.com | 324873e | 2017-07-21 13:28:40 +0800 | [diff] [blame] | 128 | #define CONFIG_ENV_SECT_SIZE 0x210 |
| 129 | #define CONFIG_ENV_SPI_MAX_HZ 15000000 |
| 130 | #define CONFIG_BOOTCOMMAND "sf probe 0:3; " \ |
| 131 | "sf read 0x22000000 0x84000 0x294000; " \ |
| 132 | "bootm 0x22000000" |
Nicolas Ferre | 89a7a87 | 2008-12-06 13:11:14 +0100 | [diff] [blame] | 133 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 134 | "root=/dev/mtdblock0 " \ |
Albin Tonnerre | 918319c | 2009-07-22 18:30:03 +0200 | [diff] [blame] | 135 | "mtdparts=atmel_nand:-(root) " \ |
Nicolas Ferre | 89a7a87 | 2008-12-06 13:11:14 +0100 | [diff] [blame] | 136 | "rw rootfstype=jffs2" |
| 137 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 138 | #else /* CONFIG_SYS_USE_NANDFLASH */ |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 139 | |
| 140 | /* bootstrap + u-boot + env + linux in nandflash */ |
Wenyou.Yang@microchip.com | 324873e | 2017-07-21 13:28:40 +0800 | [diff] [blame] | 141 | #define CONFIG_ENV_OFFSET 0x120000 |
Bo Shen | 0c58cfa | 2013-02-20 00:16:25 +0000 | [diff] [blame] | 142 | #define CONFIG_ENV_OFFSET_REDUND 0x100000 |
Jean-Christophe PLAGNIOL-VILLARD | 0e8d158 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 143 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
Bo Shen | 0c58cfa | 2013-02-20 00:16:25 +0000 | [diff] [blame] | 144 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" |
| 145 | #define CONFIG_BOOTARGS \ |
| 146 | "console=ttyS0,115200 earlyprintk " \ |
| 147 | "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \ |
| 148 | "256k(env),256k(env_redundant),256k(spare)," \ |
| 149 | "512k(dtb),6M(kernel)ro,-(rootfs) " \ |
| 150 | "root=/dev/mtdblock7 rw rootfstype=jffs2" |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 151 | #endif |
| 152 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 153 | #define CONFIG_SYS_CBSIZE 256 |
| 154 | #define CONFIG_SYS_MAXARGS 16 |
Xu, Hong | f7aea46 | 2011-07-31 22:49:00 +0000 | [diff] [blame] | 155 | #define CONFIG_SYS_LONGHELP |
| 156 | #define CONFIG_CMDLINE_EDITING |
Alexandre Belloni | e139cb3 | 2012-07-02 04:26:58 +0000 | [diff] [blame] | 157 | #define CONFIG_AUTO_COMPLETE |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 158 | |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 159 | /* |
| 160 | * Size of malloc() pool |
| 161 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 162 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 163 | |
Stelian Pop | d99a8ff | 2008-05-08 20:52:22 +0200 | [diff] [blame] | 164 | #endif |