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Steve Sakomanc57cca22010-06-11 20:35:26 -07001/*
2 * (C) Copyright 2010
3 * Texas Instruments Incorporated, <www.ti.com>
4 * Steve Sakoman <steve@sakoman.com>
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Steve Sakomanc57cca22010-06-11 20:35:26 -07007 */
8#include <common.h>
9#include <asm/arch/sys_proto.h>
Sukumar Ghorai7e982c92010-09-18 20:56:18 -070010#include <asm/arch/mmc_host_def.h>
Lokesh Vutlaaf1d0022013-05-30 02:54:32 +000011#include <asm/arch/clock.h>
Chris Lalancettedf65a3f2011-12-13 09:41:12 +000012#include <asm/arch/gpio.h>
Govindraj.R43b62392012-02-06 03:55:34 +000013#include <asm/gpio.h>
Steve Sakomanc57cca22010-06-11 20:35:26 -070014
Aneesh V469ec1e2011-07-21 09:10:01 -040015#include "panda_mux_data.h"
Steve Sakoman2ad853c2010-07-15 13:43:10 -070016
Govindraj.R43b62392012-02-06 03:55:34 +000017#ifdef CONFIG_USB_EHCI
18#include <usb.h>
19#include <asm/arch/ehci.h>
20#include <asm/ehci-omap.h>
21#endif
22
Chris Lalancettedf65a3f2011-12-13 09:41:12 +000023#define PANDA_ULPI_PHY_TYPE_GPIO 182
Dan Murphy7d47d1c2013-06-13 11:21:13 -050024#define PANDA_BOARD_ID_1_GPIO 101
25#define PANDA_ES_BOARD_ID_1_GPIO 48
26#define PANDA_BOARD_ID_2_GPIO 171
27#define PANDA_ES_BOARD_ID_3_GPIO 3
28#define PANDA_ES_BOARD_ID_4_GPIO 2
Chris Lalancettedf65a3f2011-12-13 09:41:12 +000029
Steve Sakomanc57cca22010-06-11 20:35:26 -070030DECLARE_GLOBAL_DATA_PTR;
31
32const struct omap_sysinfo sysinfo = {
33 "Board: OMAP4 Panda\n"
34};
35
Chris Lalancettedf65a3f2011-12-13 09:41:12 +000036struct omap4_scrm_regs *const scrm = (struct omap4_scrm_regs *)0x4a30a000;
37
Steve Sakomanc57cca22010-06-11 20:35:26 -070038/**
39 * @brief board_init
40 *
41 * @return 0
42 */
43int board_init(void)
44{
Steve Sakoman27952012010-07-15 16:19:16 -040045 gpmc_init();
46
Steve Sakomanc57cca22010-06-11 20:35:26 -070047 gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA;
48 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */
49
50 return 0;
51}
52
53int board_eth_init(bd_t *bis)
54{
55 return 0;
56}
57
Dan Murphy7d47d1c2013-06-13 11:21:13 -050058/*
59* Routine: get_board_revision
60* Description: Detect if we are running on a panda revision A1-A6,
61* or an ES panda board. This can be done by reading
62* the level of GPIOs and checking the processor revisions.
63* This should result in:
64* Panda 4430:
65* GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
66* GPIO171, GPIO101, GPIO182: 1 0 1 => A6
67* Panda ES:
68* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 0 1 1 => B1/B2
69* GPIO2, GPIO3, GPIO171, GPIO48, GPIO182: 0 0 1 1 1 => B3
70*/
71int get_board_revision(void)
72{
73 int board_id0, board_id1, board_id2;
74 int board_id3, board_id4;
75 int board_id;
76
77 int processor_rev = omap_revision();
78
79 /* Setup the mux for the common board ID pins (gpio 171 and 182) */
80 writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
81 writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT);
82
83 board_id0 = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
84 board_id2 = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
85
86 if ((processor_rev >= OMAP4460_ES1_0 &&
87 processor_rev <= OMAP4460_ES1_1)) {
88 /*
89 * Setup the mux for the ES specific board ID pins (gpio 101,
90 * 2 and 3.
91 */
92 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
93 GPMC_A24);
94 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
95 UNIPRO_RY0);
96 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
97 UNIPRO_RX1);
98
99 board_id1 = gpio_get_value(PANDA_ES_BOARD_ID_1_GPIO);
100 board_id3 = gpio_get_value(PANDA_ES_BOARD_ID_3_GPIO);
101 board_id4 = gpio_get_value(PANDA_ES_BOARD_ID_4_GPIO);
102
103#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
104 setenv("board_name", strcat(CONFIG_SYS_BOARD, "-es"));
105#endif
106 board_id = ((board_id4 << 4) | (board_id3 << 3) |
107 (board_id2 << 2) | (board_id1 << 1) | (board_id0));
108 } else {
109 /* Setup the mux for the Ax specific board ID pins (gpio 101) */
110 writew((IEN | M3), (*ctrl)->control_padconf_core_base +
111 FREF_CLK2_OUT);
112
113 board_id1 = gpio_get_value(PANDA_BOARD_ID_1_GPIO);
114 board_id = ((board_id2 << 2) | (board_id1 << 1) | (board_id0));
115
116#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
117 if ((board_id >= 0x3) && (processor_rev == OMAP4430_ES2_3))
118 setenv("board_name", strcat(CONFIG_SYS_BOARD, "-a4"));
119#endif
120 }
121
122 return board_id;
123}
124
Steve Sakomanc57cca22010-06-11 20:35:26 -0700125/**
Hardik Patel675cc772013-11-27 21:16:21 +0530126 * is_panda_es_rev_b3() - Detect if we are running on rev B3 of panda board ES
127 *
128 *
129 * Detect if we are running on B3 version of ES panda board,
130 * This can be done by reading the level of GPIO 171 and checking the
131 * processor revisions.
132 * GPIO171: 1 => Panda ES Rev B3
133 *
134 * Return : return 1 if Panda ES Rev B3 , else return 0
135 */
136u8 is_panda_es_rev_b3(void)
137{
138 int processor_rev = omap_revision();
139 int ret = 0;
140
141 if ((processor_rev >= OMAP4460_ES1_0 &&
142 processor_rev <= OMAP4460_ES1_1)) {
143
144 /* Setup the mux for the common board ID pins (gpio 171) */
145 writew((IEN | M3),
146 (*ctrl)->control_padconf_core_base + UNIPRO_TX0);
147
148 /* if processor_rev is panda ES and GPIO171 is 1,it is rev b3 */
149 ret = gpio_get_value(PANDA_BOARD_ID_2_GPIO);
150 }
151 return ret;
152}
153
154#ifdef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
155/*
156 * emif_get_reg_dump() - emif_get_reg_dump strong function
157 *
158 * @emif_nr - emif base
159 * @regs - reg dump of timing values
160 *
161 * Strong function to override emif_get_reg_dump weak function in sdram_elpida.c
162 */
163void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
164{
165 u32 omap4_rev = omap_revision();
166
167 /* Same devices and geometry on both EMIFs */
168 if (omap4_rev == OMAP4430_ES1_0)
169 *regs = &emif_regs_elpida_380_mhz_1cs;
170 else if (omap4_rev == OMAP4430_ES2_0)
171 *regs = &emif_regs_elpida_200_mhz_2cs;
172 else if (omap4_rev == OMAP4430_ES2_3)
173 *regs = &emif_regs_elpida_400_mhz_1cs;
174 else if (omap4_rev < OMAP4470_ES1_0) {
175 if(is_panda_es_rev_b3())
176 *regs = &emif_regs_elpida_400_mhz_1cs;
177 else
178 *regs = &emif_regs_elpida_400_mhz_2cs;
179 }
180 else
181 *regs = &emif_regs_elpida_400_mhz_1cs;
182}
183#endif
184
185/**
Steve Sakomanc57cca22010-06-11 20:35:26 -0700186 * @brief misc_init_r - Configure Panda board specific configurations
187 * such as power configurations, ethernet initialization as phase2 of
188 * boot sequence
189 *
190 * @return 0
191 */
192int misc_init_r(void)
193{
Chris Lalancettedf65a3f2011-12-13 09:41:12 +0000194 int phy_type;
195 u32 auxclk, altclksrc;
Nishanth Menon8a0c6d62014-03-28 11:00:04 -0500196 u32 id[4];
Chris Lalancettedf65a3f2011-12-13 09:41:12 +0000197
198 /* EHCI is not supported on ES1.0 */
199 if (omap_revision() == OMAP4430_ES1_0)
200 return 0;
201
Dan Murphy7d47d1c2013-06-13 11:21:13 -0500202 get_board_revision();
Dan Murphy34f667b2013-04-18 06:29:53 +0000203
Chris Lalancettedf65a3f2011-12-13 09:41:12 +0000204 gpio_direction_input(PANDA_ULPI_PHY_TYPE_GPIO);
205 phy_type = gpio_get_value(PANDA_ULPI_PHY_TYPE_GPIO);
206
207 if (phy_type == 1) {
208 /* ULPI PHY supplied by auxclk3 derived from sys_clk */
209 debug("ULPI PHY supplied by auxclk3\n");
210
211 auxclk = readl(&scrm->auxclk3);
212 /* Select sys_clk */
213 auxclk &= ~AUXCLK_SRCSELECT_MASK;
214 auxclk |= AUXCLK_SRCSELECT_SYS_CLK << AUXCLK_SRCSELECT_SHIFT;
215 /* Set the divisor to 2 */
216 auxclk &= ~AUXCLK_CLKDIV_MASK;
217 auxclk |= AUXCLK_CLKDIV_2 << AUXCLK_CLKDIV_SHIFT;
218 /* Request auxilary clock #3 */
219 auxclk |= AUXCLK_ENABLE_MASK;
220
221 writel(auxclk, &scrm->auxclk3);
Dan Murphybf3b98a2013-06-13 11:21:26 -0500222 } else {
Chris Lalancettedf65a3f2011-12-13 09:41:12 +0000223 /* ULPI PHY supplied by auxclk1 derived from PER dpll */
224 debug("ULPI PHY supplied by auxclk1\n");
225
226 auxclk = readl(&scrm->auxclk1);
227 /* Select per DPLL */
228 auxclk &= ~AUXCLK_SRCSELECT_MASK;
229 auxclk |= AUXCLK_SRCSELECT_PER_DPLL << AUXCLK_SRCSELECT_SHIFT;
230 /* Set the divisor to 16 */
231 auxclk &= ~AUXCLK_CLKDIV_MASK;
232 auxclk |= AUXCLK_CLKDIV_16 << AUXCLK_CLKDIV_SHIFT;
233 /* Request auxilary clock #3 */
234 auxclk |= AUXCLK_ENABLE_MASK;
235
236 writel(auxclk, &scrm->auxclk1);
237 }
238
239 altclksrc = readl(&scrm->altclksrc);
240
241 /* Activate alternate system clock supplier */
242 altclksrc &= ~ALTCLKSRC_MODE_MASK;
243 altclksrc |= ALTCLKSRC_MODE_ACTIVE;
244
245 /* enable clocks */
246 altclksrc |= ALTCLKSRC_ENABLE_INT_MASK | ALTCLKSRC_ENABLE_EXT_MASK;
247
248 writel(altclksrc, &scrm->altclksrc);
249
Nishanth Menon8a0c6d62014-03-28 11:00:04 -0500250 id[0] = readl(STD_FUSE_DIE_ID_0);
251 id[1] = readl(STD_FUSE_DIE_ID_1);
252 id[2] = readl(STD_FUSE_DIE_ID_2);
253 id[3] = readl(STD_FUSE_DIE_ID_3);
254 usb_fake_mac_from_die_id(id);
Dan Murphye84b8f62013-10-10 08:54:23 -0500255
Steve Sakomanc57cca22010-06-11 20:35:26 -0700256 return 0;
257}
Steve Sakoman2ad853c2010-07-15 13:43:10 -0700258
Sricharan508a58f2011-11-15 09:49:55 -0500259void set_muxconf_regs_essential(void)
260{
Lokesh Vutla9239f5b2013-05-30 02:54:30 +0000261 do_set_mux((*ctrl)->control_padconf_core_base,
262 core_padconf_array_essential,
Sricharan508a58f2011-11-15 09:49:55 -0500263 sizeof(core_padconf_array_essential) /
264 sizeof(struct pad_conf_entry));
265
Lokesh Vutla9239f5b2013-05-30 02:54:30 +0000266 do_set_mux((*ctrl)->control_padconf_wkup_base,
267 wkup_padconf_array_essential,
Sricharan508a58f2011-11-15 09:49:55 -0500268 sizeof(wkup_padconf_array_essential) /
269 sizeof(struct pad_conf_entry));
270
271 if (omap_revision() >= OMAP4460_ES1_0)
Lokesh Vutla9239f5b2013-05-30 02:54:30 +0000272 do_set_mux((*ctrl)->control_padconf_wkup_base,
Dan Murphybf3b98a2013-06-13 11:21:26 -0500273 wkup_padconf_array_essential_4460,
274 sizeof(wkup_padconf_array_essential_4460) /
275 sizeof(struct pad_conf_entry));
Sricharan508a58f2011-11-15 09:49:55 -0500276}
277
Sricharan508a58f2011-11-15 09:49:55 -0500278#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
Sukumar Ghorai7e982c92010-09-18 20:56:18 -0700279int board_mmc_init(bd_t *bis)
280{
Nikita Kiryanove3913f52012-12-03 02:19:47 +0000281 return omap_mmc_init(0, 0, 0, -1, -1);
Sukumar Ghorai7e982c92010-09-18 20:56:18 -0700282}
283#endif
Sricharan508a58f2011-11-15 09:49:55 -0500284
Govindraj.R43b62392012-02-06 03:55:34 +0000285#ifdef CONFIG_USB_EHCI
286
287static struct omap_usbhs_board_data usbhs_bdata = {
288 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
289 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
290 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
291};
292
Troy Kisky127efc42013-10-10 15:27:57 -0700293int ehci_hcd_init(int index, enum usb_init_type init,
294 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
Govindraj.R43b62392012-02-06 03:55:34 +0000295{
296 int ret;
297 unsigned int utmi_clk;
298
299 /* Now we can enable our port clocks */
300 utmi_clk = readl((void *)CM_L3INIT_HSUSBHOST_CLKCTRL);
301 utmi_clk |= HSUSBHOST_CLKCTRL_CLKSEL_UTMI_P1_MASK;
Wolfgang Denke7300f42014-03-25 14:49:48 +0100302 setbits_le32((void *)CM_L3INIT_HSUSBHOST_CLKCTRL, utmi_clk);
Govindraj.R43b62392012-02-06 03:55:34 +0000303
Mateusz Zalega16297cf2013-10-04 19:22:26 +0200304 ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
Govindraj.R43b62392012-02-06 03:55:34 +0000305 if (ret < 0)
306 return ret;
307
308 return 0;
309}
310
Lucas Stach676ae062012-09-26 00:14:35 +0200311int ehci_hcd_stop(int index)
Govindraj.R43b62392012-02-06 03:55:34 +0000312{
313 return omap_ehci_hcd_stop();
314}
315#endif
316
Sricharan508a58f2011-11-15 09:49:55 -0500317/*
318 * get_board_rev() - get board revision
319 */
320u32 get_board_rev(void)
321{
322 return 0x20;
323}