blob: ace16535ff618ce1f43b926e98029881bd5e9ecb [file] [log] [blame]
wdenk945af8d2003-07-16 21:53:01 +00001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * CPU specific code for the MPC5xxx CPUs
26 */
27
28#include <common.h>
29#include <watchdog.h>
30#include <command.h>
31#include <mpc5xxx.h>
Grant Likelycf2817a2007-09-06 09:46:23 -060032#include <asm/io.h>
wdenk945af8d2003-07-16 21:53:01 +000033#include <asm/processor.h>
34
Grant Likelycf2817a2007-09-06 09:46:23 -060035#if defined(CONFIG_OF_LIBFDT)
36#include <libfdt.h>
37#include <libfdt_env.h>
Kumar Galae93becf2007-11-03 19:46:28 -050038#include <fdt_support.h>
Stefan Roesee59581c2006-11-28 17:55:49 +010039#endif
40
Wolfgang Denkd87080b2006-03-31 18:32:53 +020041DECLARE_GLOBAL_DATA_PTR;
42
wdenk945af8d2003-07-16 21:53:01 +000043int checkcpu (void)
44{
wdenk945af8d2003-07-16 21:53:01 +000045 ulong clock = gd->cpu_clk;
46 char buf[32];
wdenk36c72872004-06-09 17:45:32 +000047#ifndef CONFIG_MGT5100
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020048 uint svr, pvr;
wdenk36c72872004-06-09 17:45:32 +000049#endif
wdenk945af8d2003-07-16 21:53:01 +000050
51 puts ("CPU: ");
52
wdenk36c72872004-06-09 17:45:32 +000053#ifdef CONFIG_MGT5100
54 puts (CPU_ID_STR);
wdenk945af8d2003-07-16 21:53:01 +000055 printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
wdenk36c72872004-06-09 17:45:32 +000056#else
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020057 svr = get_svr();
58 pvr = get_pvr();
Grzegorz Wianeckia9d87e22007-04-29 14:01:54 +020059
60 switch (pvr) {
61 case PVR_5200:
62 printf("MPC5200");
63 break;
64 case PVR_5200B:
65 printf("MPC5200B");
wdenk36c72872004-06-09 17:45:32 +000066 break;
67 default:
Grzegorz Wianeckia9d87e22007-04-29 14:01:54 +020068 printf("Unknown MPC5xxx");
wdenk36c72872004-06-09 17:45:32 +000069 break;
70 }
71
Wolfgang Denkcf48eb92006-04-16 10:51:58 +020072 printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020073 PVR_MAJ(pvr), PVR_MIN(pvr));
wdenk36c72872004-06-09 17:45:32 +000074#endif
wdenk945af8d2003-07-16 21:53:01 +000075 printf (" at %s MHz\n", strmhz (buf, clock));
wdenk945af8d2003-07-16 21:53:01 +000076 return 0;
77}
78
79/* ------------------------------------------------------------------------- */
80
81int
82do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
83{
wdenkd94f92c2003-08-28 09:41:22 +000084 ulong msr;
wdenk945af8d2003-07-16 21:53:01 +000085 /* Interrupts and MMU off */
86 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
87
88 msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
89 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
90
wdenkd94f92c2003-08-28 09:41:22 +000091 /* Charge the watchdog timer */
wdenk2d5b5612003-10-14 19:43:55 +000092 *(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f;
wdenkd94f92c2003-08-28 09:41:22 +000093 *(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */
wdenk2d5b5612003-10-14 19:43:55 +000094 while(1);
wdenkd94f92c2003-08-28 09:41:22 +000095
wdenk945af8d2003-07-16 21:53:01 +000096 return 1;
97
98}
99
100/* ------------------------------------------------------------------------- */
101
102/*
103 * Get timebase clock frequency (like cpu_clk in Hz)
104 *
105 */
106unsigned long get_tbclk (void)
107{
wdenk945af8d2003-07-16 21:53:01 +0000108 ulong tbclk;
109
110 tbclk = (gd->bus_clk + 3L) / 4L;
111
112 return (tbclk);
113}
114
115/* ------------------------------------------------------------------------- */
Stefan Roesee59581c2006-11-28 17:55:49 +0100116
Marian Balakowicz75d3e8f2008-02-21 17:20:18 +0100117#if defined(CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
Grant Likelycf2817a2007-09-06 09:46:23 -0600118void ft_cpu_setup(void *blob, bd_t *bd)
119{
120 int div = in_8((void*)CFG_MBAR + 0x204) & 0x0020 ? 8 : 4;
121 char * cpu_path = "/cpus/" OF_CPU;
André Schwarzc5123892008-03-13 13:50:52 +0100122#ifdef CONFIG_MPC5xxx_FEC
Grant Likelycf2817a2007-09-06 09:46:23 -0600123 char * eth_path = "/" OF_SOC "/ethernet@3000";
André Schwarzc5123892008-03-13 13:50:52 +0100124#endif
Stefan Roesee59581c2006-11-28 17:55:49 +0100125
Kumar Galae93becf2007-11-03 19:46:28 -0500126 do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
127 do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
128 do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
129 do_fixup_by_path_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipbfreq, 1);
130 do_fixup_by_path_u32(blob, "/" OF_SOC, "system-frequency",
131 bd->bi_busfreq*div, 1);
André Schwarzc5123892008-03-13 13:50:52 +0100132#ifdef CONFIG_MPC5xxx_FEC
Kumar Galae93becf2007-11-03 19:46:28 -0500133 do_fixup_by_path(blob, eth_path, "mac-address", bd->bi_enetaddr, 6, 0);
134 do_fixup_by_path(blob, eth_path, "local-mac-address", bd->bi_enetaddr, 6, 0);
André Schwarzc5123892008-03-13 13:50:52 +0100135#endif
Stefan Roesee59581c2006-11-28 17:55:49 +0100136}
137#endif