blob: 7b460e83c45726004a605b9ef3a5775e6cc000c5 [file] [log] [blame]
Simon Glass8ef07572014-11-12 22:42:07 -07001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2008
4 * Graeme Russ, graeme.russ@gmail.com.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9/*
10 * board/config.h - configuration options, board specific
11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16#include <configs/x86-common.h>
17
Bin Meng24ef0422015-01-06 22:14:19 +080018
Simon Glass8ef07572014-11-12 22:42:07 -070019#define CONFIG_SYS_MONITOR_LEN (1 << 20)
Bin Meng24ef0422015-01-06 22:14:19 +080020
Simon Glass65dd74a2014-11-12 22:42:28 -070021#define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000
Simon Glass437c2b72014-11-12 22:42:25 -070022#define CONFIG_BOARD_EARLY_INIT_F
Simon Glass069f5482015-01-19 22:16:15 -070023#define CONFIG_MISC_INIT_R
Simon Glass8ef07572014-11-12 22:42:07 -070024
Simon Glass8ef07572014-11-12 22:42:07 -070025#define CONFIG_NR_DRAM_BANKS 8
Bin Meng8c5224c2014-12-17 15:50:42 +080026#define CONFIG_X86_MRC_ADDR 0xfffa0000
Simon Glass65dd74a2014-11-12 22:42:28 -070027#define CONFIG_CACHE_MRC_SIZE_KB 512
Simon Glass8ef07572014-11-12 22:42:07 -070028
Bin Meng41702ba2014-12-17 15:50:47 +080029#define CONFIG_X86_SERIAL
Simon Glass8ef07572014-11-12 22:42:07 -070030
31#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \
32 PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
33 {PCI_VENDOR_ID_INTEL, \
34 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
35 {PCI_VENDOR_ID_INTEL, \
36 PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
37 {PCI_VENDOR_ID_INTEL, \
38 PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
39
Bin Meng63faf252014-12-17 15:50:43 +080040#define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin
Simon Glass62d0c5e2014-11-14 20:56:38 -070041#define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000
Simon Glass8ef07572014-11-12 22:42:07 -070042
Simon Glass6e5b12b2014-11-12 22:42:13 -070043#define CONFIG_PCI_MEM_BUS 0xe0000000
44#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
45#define CONFIG_PCI_MEM_SIZE 0x10000000
46
47#define CONFIG_PCI_PREF_BUS 0xd0000000
48#define CONFIG_PCI_PREF_PHYS CONFIG_PCI_PREF_BUS
49#define CONFIG_PCI_PREF_SIZE 0x10000000
50
51#define CONFIG_PCI_IO_BUS 0x1000
52#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
53#define CONFIG_PCI_IO_SIZE 0xefff
54
Simon Glassb6b4a0e2014-11-14 18:18:29 -070055#define CONFIG_SYS_EARLY_PCI_INIT
56#define CONFIG_PCI_PNP
57
Simon Glassa6fa83f2014-11-14 20:56:44 -070058#define CONFIG_BIOSEMU
59#define VIDEO_IO_OFFSET 0
60#define CONFIG_X86EMU_RAW_IO
61
Simon Glass22e131c2014-11-14 20:56:45 -070062#define CONFIG_CROS_EC
63#define CONFIG_CROS_EC_LPC
64#define CONFIG_CMD_CROS_EC
65#define CONFIG_ARCH_EARLY_INIT_R
66
Simon Glasse43ade32015-01-19 22:16:17 -070067#undef CONFIG_ENV_IS_NOWHERE
68#undef CONFIG_ENV_SIZE
69#define CONFIG_ENV_SIZE 0x1000
70#define CONFIG_ENV_SECT_SIZE 0x1000
71#define CONFIG_ENV_IS_IN_SPI_FLASH
72#define CONFIG_ENV_OFFSET 0x003f8000
73
Simon Glass8ef07572014-11-12 22:42:07 -070074#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \
75 "stdout=vga,serial\0" \
76 "stderr=vga,serial\0"
77
78#endif /* __CONFIG_H */