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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Fabio Estevam47173482016-02-29 09:33:22 -03002/*
3 * Copyright (C) 2016 NXP Semiconductors
4 * Author: Fabio Estevam <fabio.estevam@nxp.com>
Fabio Estevam47173482016-02-29 09:33:22 -03005 */
6
7#include <asm/arch/clock.h>
8#include <asm/arch/imx-regs.h>
9#include <asm/arch/mx7-pins.h>
10#include <asm/arch/sys_proto.h>
11#include <asm/gpio.h>
Bryan O'Donoghuea2accd82018-04-24 18:46:33 +010012#include <asm/mach-imx/hab.h>
Stefano Babic552a8482017-06-29 10:16:06 +020013#include <asm/mach-imx/iomux-v3.h>
Fabio Estevam47173482016-02-29 09:33:22 -030014#include <asm/io.h>
15#include <common.h>
Fabio Estevam47173482016-02-29 09:33:22 -030016#include <asm/arch/crm_regs.h>
17#include <usb.h>
Kevin Hilman25aaebd2016-12-16 13:08:10 -080018#include <netdev.h>
Vanessa Maegima7d301a52016-08-19 10:21:36 -030019#include <power/pmic.h>
20#include <power/pfuze3000_pmic.h>
21#include "../freescale/common/pfuze.h"
Bryan O'Donoghue852cc542018-03-26 15:27:34 +010022#include <asm/setup.h>
23#include <asm/bootm.h>
Fabio Estevam47173482016-02-29 09:33:22 -030024
25DECLARE_GLOBAL_DATA_PTR;
26
27#define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU100KOHM | \
28 PAD_CTL_HYS)
Fabio Estevam47173482016-02-29 09:33:22 -030029
30int dram_init(void)
31{
32 gd->ram_size = PHYS_SDRAM_SIZE;
33
Bryan O'Donoghue7175ef42018-04-24 18:46:35 +010034 /* Subtract the defined OPTEE runtime firmware length */
35#ifdef CONFIG_OPTEE_TZDRAM_SIZE
36 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
37#endif
38
Fabio Estevam47173482016-02-29 09:33:22 -030039 return 0;
40}
41
Marco Franchi0a35cc92016-06-10 14:45:28 -030042static iomux_v3_cfg_t const wdog_pads[] = {
43 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL),
44};
45
Fabio Estevam47173482016-02-29 09:33:22 -030046static iomux_v3_cfg_t const uart1_pads[] = {
47 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
48 MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
49};
50
Fabio Estevam47173482016-02-29 09:33:22 -030051static void setup_iomux_uart(void)
52{
53 imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
54};
55
Fabio Estevam47173482016-02-29 09:33:22 -030056int board_early_init_f(void)
57{
58 setup_iomux_uart();
59
60 return 0;
61}
62
Bryan O'Donoghue8ba37732019-01-18 17:40:14 +000063#ifdef CONFIG_DM_PMIC
Vanessa Maegima7d301a52016-08-19 10:21:36 -030064int power_init_board(void)
65{
Bryan O'Donoghue8ba37732019-01-18 17:40:14 +000066 struct udevice *dev;
67 int ret, dev_id, rev_id;
Vanessa Maegima7d301a52016-08-19 10:21:36 -030068
Bryan O'Donoghue8ba37732019-01-18 17:40:14 +000069 ret = pmic_get("pfuze3000", &dev);
70 if (ret == -ENODEV)
71 return 0;
72 if (ret != 0)
Vanessa Maegima7d301a52016-08-19 10:21:36 -030073 return ret;
74
Bryan O'Donoghue8ba37732019-01-18 17:40:14 +000075 dev_id = pmic_reg_read(dev, PFUZE3000_DEVICEID);
76 rev_id = pmic_reg_read(dev, PFUZE3000_REVID);
77 printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
Vanessa Maegima7d301a52016-08-19 10:21:36 -030078
79 /* disable Low Power Mode during standby mode */
Fabio Estevame077b3b2019-02-14 11:37:51 -020080 pmic_reg_write(dev, PFUZE3000_LDOGCTL, 1);
Vanessa Maegima7d301a52016-08-19 10:21:36 -030081
82 return 0;
83}
84#endif
85
Kevin Hilman25aaebd2016-12-16 13:08:10 -080086int board_eth_init(bd_t *bis)
87{
88 int ret = 0;
89
90#ifdef CONFIG_USB_ETHER
91 ret = usb_eth_initialize(bis);
92 if (ret < 0)
93 printf("Error %d registering USB ether.\n", ret);
94#endif
95
96 return ret;
97}
98
Fabio Estevam47173482016-02-29 09:33:22 -030099int board_init(void)
100{
101 /* address of boot parameters */
102 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
103
104 return 0;
105}
106
107int checkboard(void)
108{
Fabio Estevamd4ee5042016-08-25 21:07:20 -0300109 char *mode;
110
111 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT))
112 mode = "secure";
113 else
114 mode = "non-secure";
115
Bryan O'Donoghuefbbf44a2018-04-24 18:46:36 +0100116#ifdef CONFIG_OPTEE_TZDRAM_SIZE
117 unsigned long optee_start, optee_end;
118
119 optee_end = PHYS_SDRAM + PHYS_SDRAM_SIZE;
120 optee_start = optee_end - CONFIG_OPTEE_TZDRAM_SIZE;
121
122 printf("Board: WARP7 in %s mode OPTEE DRAM 0x%08lx-0x%08lx\n",
123 mode, optee_start, optee_end);
124#else
Fabio Estevamd4ee5042016-08-25 21:07:20 -0300125 printf("Board: WARP7 in %s mode\n", mode);
Bryan O'Donoghuefbbf44a2018-04-24 18:46:36 +0100126#endif
Fabio Estevam47173482016-02-29 09:33:22 -0300127
128 return 0;
129}
130
131int board_usb_phy_mode(int port)
132{
133 return USB_INIT_DEVICE;
134}
Marco Franchi0a35cc92016-06-10 14:45:28 -0300135
136int board_late_init(void)
137{
138 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
Bryan O'Donoghue852cc542018-03-26 15:27:34 +0100139#ifdef CONFIG_SERIAL_TAG
140 struct tag_serialnr serialnr;
141 char serial_string[0x20];
142#endif
Marco Franchi0a35cc92016-06-10 14:45:28 -0300143
144 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
145
146 set_wdog_reset(wdog);
147
148 /*
149 * Do not assert internal WDOG_RESET_B_DEB(controlled by bit 4),
150 * since we use PMIC_PWRON to reset the board.
151 */
152 clrsetbits_le16(&wdog->wcr, 0, 0x10);
153
Bryan O'Donoghuea2accd82018-04-24 18:46:33 +0100154#ifdef CONFIG_SECURE_BOOT
155 /* Determine HAB state */
156 env_set_ulong(HAB_ENABLED_ENVNAME, imx_hab_is_enabled());
157#else
158 env_set_ulong(HAB_ENABLED_ENVNAME, 0);
159#endif
160
Bryan O'Donoghue852cc542018-03-26 15:27:34 +0100161#ifdef CONFIG_SERIAL_TAG
162 /* Set serial# standard environment variable based on OTP settings */
163 get_board_serial(&serialnr);
164 snprintf(serial_string, sizeof(serial_string), "WaRP7-0x%08x%08x",
165 serialnr.low, serialnr.high);
166 env_set("serial#", serial_string);
167#endif
168
Marco Franchi0a35cc92016-06-10 14:45:28 -0300169 return 0;
170}