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wdenk945af8d2003-07-16 21:53:01 +00001/*
Detlev Zundela21fb982010-01-20 14:28:48 +01002 * (C) Copyright 2000-2010
wdenk945af8d2003-07-16 21:53:01 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * CPU specific code for the MPC5xxx CPUs
26 */
27
28#include <common.h>
29#include <watchdog.h>
30#include <command.h>
Grzegorz Bernacki5c4fa9b2009-03-17 10:06:40 +010031#include <net.h>
wdenk945af8d2003-07-16 21:53:01 +000032#include <mpc5xxx.h>
Ben Warrene1d74802008-08-31 10:39:12 -070033#include <netdev.h>
Grant Likelycf2817a2007-09-06 09:46:23 -060034#include <asm/io.h>
wdenk945af8d2003-07-16 21:53:01 +000035#include <asm/processor.h>
36
Grant Likelycf2817a2007-09-06 09:46:23 -060037#if defined(CONFIG_OF_LIBFDT)
38#include <libfdt.h>
39#include <libfdt_env.h>
Kumar Galae93becf2007-11-03 19:46:28 -050040#include <fdt_support.h>
Stefan Roesee59581c2006-11-28 17:55:49 +010041#endif
42
Heiko Schocher3887c3f2009-09-23 07:56:08 +020043#if defined(CONFIG_OF_IDE_FIXUP)
44#include <ide.h>
45#endif
46
Wolfgang Denkd87080b2006-03-31 18:32:53 +020047DECLARE_GLOBAL_DATA_PTR;
48
wdenk945af8d2003-07-16 21:53:01 +000049int checkcpu (void)
50{
wdenk945af8d2003-07-16 21:53:01 +000051 ulong clock = gd->cpu_clk;
52 char buf[32];
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020053 uint svr, pvr;
wdenk945af8d2003-07-16 21:53:01 +000054
55 puts ("CPU: ");
56
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020057 svr = get_svr();
58 pvr = get_pvr();
Grzegorz Wianeckia9d87e22007-04-29 14:01:54 +020059
60 switch (pvr) {
61 case PVR_5200:
62 printf("MPC5200");
63 break;
64 case PVR_5200B:
65 printf("MPC5200B");
wdenk36c72872004-06-09 17:45:32 +000066 break;
67 default:
Grzegorz Wianeckia9d87e22007-04-29 14:01:54 +020068 printf("Unknown MPC5xxx");
wdenk36c72872004-06-09 17:45:32 +000069 break;
70 }
71
Wolfgang Denkcf48eb92006-04-16 10:51:58 +020072 printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020073 PVR_MAJ(pvr), PVR_MIN(pvr));
wdenk945af8d2003-07-16 21:53:01 +000074 printf (" at %s MHz\n", strmhz (buf, clock));
wdenk945af8d2003-07-16 21:53:01 +000075 return 0;
76}
77
78/* ------------------------------------------------------------------------- */
79
80int
Wolfgang Denk54841ab2010-06-28 22:00:46 +020081do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
wdenk945af8d2003-07-16 21:53:01 +000082{
wdenkd94f92c2003-08-28 09:41:22 +000083 ulong msr;
wdenk945af8d2003-07-16 21:53:01 +000084 /* Interrupts and MMU off */
85 __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
86
87 msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
88 __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
89
wdenkd94f92c2003-08-28 09:41:22 +000090 /* Charge the watchdog timer */
wdenk2d5b5612003-10-14 19:43:55 +000091 *(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f;
wdenkd94f92c2003-08-28 09:41:22 +000092 *(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */
wdenk2d5b5612003-10-14 19:43:55 +000093 while(1);
wdenkd94f92c2003-08-28 09:41:22 +000094
wdenk945af8d2003-07-16 21:53:01 +000095 return 1;
96
97}
98
99/* ------------------------------------------------------------------------- */
100
101/*
102 * Get timebase clock frequency (like cpu_clk in Hz)
103 *
104 */
105unsigned long get_tbclk (void)
106{
wdenk945af8d2003-07-16 21:53:01 +0000107 ulong tbclk;
108
109 tbclk = (gd->bus_clk + 3L) / 4L;
110
111 return (tbclk);
112}
113
114/* ------------------------------------------------------------------------- */
Stefan Roesee59581c2006-11-28 17:55:49 +0100115
Marian Balakowicz75d3e8f2008-02-21 17:20:18 +0100116#if defined(CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
Grant Likelycf2817a2007-09-06 09:46:23 -0600117void ft_cpu_setup(void *blob, bd_t *bd)
118{
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200119 int div = in_8((void*)CONFIG_SYS_MBAR + 0x204) & 0x0020 ? 8 : 4;
Grant Likelycf2817a2007-09-06 09:46:23 -0600120 char * cpu_path = "/cpus/" OF_CPU;
André Schwarzc5123892008-03-13 13:50:52 +0100121#ifdef CONFIG_MPC5xxx_FEC
Grzegorz Bernacki5c4fa9b2009-03-17 10:06:40 +0100122 uchar enetaddr[6];
Grant Likelycf2817a2007-09-06 09:46:23 -0600123 char * eth_path = "/" OF_SOC "/ethernet@3000";
André Schwarzc5123892008-03-13 13:50:52 +0100124#endif
Stefan Roesee59581c2006-11-28 17:55:49 +0100125
Kumar Galae93becf2007-11-03 19:46:28 -0500126 do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
127 do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
128 do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
129 do_fixup_by_path_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipbfreq, 1);
130 do_fixup_by_path_u32(blob, "/" OF_SOC, "system-frequency",
131 bd->bi_busfreq*div, 1);
André Schwarzc5123892008-03-13 13:50:52 +0100132#ifdef CONFIG_MPC5xxx_FEC
Mike Frysinger6bacfa62009-02-11 19:18:41 -0500133 eth_getenv_enetaddr("ethaddr", enetaddr);
134 do_fixup_by_path(blob, eth_path, "mac-address", enetaddr, 6, 0);
135 do_fixup_by_path(blob, eth_path, "local-mac-address", enetaddr, 6, 0);
André Schwarzc5123892008-03-13 13:50:52 +0100136#endif
Heiko Schocher3887c3f2009-09-23 07:56:08 +0200137#if defined(CONFIG_OF_IDE_FIXUP)
138 if (!ide_device_present(0)) {
139 /* NO CF card detected -> delete ata node in DTS */
140 int nodeoffset = 0;
141 char nodename[] = "/soc5200@f0000000/ata@3a00";
142
143 nodeoffset = fdt_path_offset(blob, nodename);
144 if (nodeoffset >= 0) {
145 fdt_del_node(blob, nodeoffset);
146 } else {
147 printf("%s: cannot find %s node err:%s\n",
148 __func__, nodename, fdt_strerror(nodeoffset));
149 }
150 }
151
152#endif
Heiko Schocher00b6d922009-12-03 11:20:06 +0100153 fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
Stefan Roesee59581c2006-11-28 17:55:49 +0100154}
155#endif
Axel Beierleinbef92e22008-08-16 00:30:48 +0200156
Ben Warrene1d74802008-08-31 10:39:12 -0700157#ifdef CONFIG_MPC5xxx_FEC
158/* Default initializations for FEC controllers. To override,
159 * create a board-specific function called:
160 * int board_eth_init(bd_t *bis)
161 */
162
163int cpu_eth_init(bd_t *bis)
164{
165 return mpc5xxx_fec_initialize(bis);
166}
167#endif
Detlev Zundela21fb982010-01-20 14:28:48 +0100168
169#if defined(CONFIG_WATCHDOG)
170void watchdog_reset(void)
171{
172 int re_enable = disable_interrupts();
173 reset_5xxx_watchdog();
174 if (re_enable) enable_interrupts();
175}
176
177void reset_5xxx_watchdog(void)
178{
179 volatile struct mpc5xxx_gpt *gpt0 =
180 (struct mpc5xxx_gpt *) MPC5XXX_GPT;
181
182 /* Trigger TIMER_0 by writing A5 to OCPW */
183 clrsetbits_be32(&gpt0->emsr, 0xff000000, 0xa5000000);
184}
185#endif /* CONFIG_WATCHDOG */