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Masahiro Yamada509eb672014-11-26 18:33:59 +09001/*
2 * Device Tree Source for UniPhier PH1-sLD8 SoC
3 *
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +09004 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada509eb672014-11-26 18:33:59 +09005 *
Masahiro Yamada13b2ba12015-06-30 18:27:01 +09006 * SPDX-License-Identifier: GPL-2.0+ X11
Masahiro Yamada509eb672014-11-26 18:33:59 +09007 */
8
9/include/ "skeleton.dtsi"
10
11/ {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090012 compatible = "socionext,ph1-sld8";
Masahiro Yamada509eb672014-11-26 18:33:59 +090013
14 cpus {
Masahiro Yamada509eb672014-11-26 18:33:59 +090015 #address-cells = <1>;
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +090016 #size-cells = <0>;
Masahiro Yamada509eb672014-11-26 18:33:59 +090017
18 cpu@0 {
19 device_type = "cpu";
20 compatible = "arm,cortex-a9";
21 reg = <0>;
22 };
23 };
24
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090025 clocks {
26 arm_timer_clk: arm_timer_clk {
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <50000000>;
30 };
31 };
32
Masahiro Yamada509eb672014-11-26 18:33:59 +090033 soc {
34 compatible = "simple-bus";
35 #address-cells = <1>;
36 #size-cells = <1>;
37 ranges;
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +090038 interrupt-parent = <&intc>;
39
40 extbus: extbus {
41 compatible = "simple-bus";
42 #address-cells = <2>;
43 #size-cells = <1>;
44 };
Masahiro Yamada625177d2014-11-26 18:34:00 +090045
46 uart0: serial@54006800 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090047 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +090048 status = "disabled";
49 reg = <0x54006800 0x20>;
50 clock-frequency = <80000000>;
51 };
52
53 uart1: serial@54006900 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090054 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +090055 status = "disabled";
56 reg = <0x54006900 0x20>;
57 clock-frequency = <80000000>;
58 };
59
60 uart2: serial@54006a00 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090061 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +090062 status = "disabled";
63 reg = <0x54006a00 0x20>;
64 clock-frequency = <80000000>;
65 };
66
67 uart3: serial@54006b00 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090068 compatible = "socionext,uniphier-uart";
Masahiro Yamada625177d2014-11-26 18:34:00 +090069 status = "disabled";
70 reg = <0x54006b00 0x20>;
71 clock-frequency = <80000000>;
72 };
Masahiro Yamada149c7512014-11-26 18:34:01 +090073
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +090074 i2c0: i2c@58400000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090075 compatible = "socionext,uniphier-i2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +090076 #address-cells = <1>;
77 #size-cells = <0>;
78 reg = <0x58400000 0x40>;
79 clock-frequency = <100000>;
80 status = "disabled";
81 };
82
83 i2c1: i2c@58480000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090084 compatible = "socionext,uniphier-i2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +090085 #address-cells = <1>;
86 #size-cells = <0>;
87 reg = <0x58480000 0x40>;
88 clock-frequency = <100000>;
89 status = "disabled";
90 };
91
92 i2c2: i2c@58500000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +090093 compatible = "socionext,uniphier-i2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +090094 #address-cells = <1>;
95 #size-cells = <0>;
96 reg = <0x58500000 0x40>;
97 clock-frequency = <100000>;
98 status = "disabled";
99 };
100
101 i2c3: i2c@58580000 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900102 compatible = "socionext,uniphier-i2c";
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900103 #address-cells = <1>;
104 #size-cells = <0>;
105 reg = <0x58580000 0x40>;
106 clock-frequency = <100000>;
107 status = "disabled";
108 };
109
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +0900110 system-bus-controller-misc@59800000 {
111 compatible = "socionext,uniphier-system-bus-controller-misc",
112 "syscon";
113 reg = <0x59800000 0x2000>;
114 };
115
Masahiro Yamada149c7512014-11-26 18:34:01 +0900116 usb0: usb@5a800100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900117 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada149c7512014-11-26 18:34:01 +0900118 status = "disabled";
119 reg = <0x5a800100 0x100>;
120 };
121
122 usb1: usb@5a810100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900123 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada149c7512014-11-26 18:34:01 +0900124 status = "disabled";
125 reg = <0x5a810100 0x100>;
126 };
127
128 usb2: usb@5a820100 {
Masahiro Yamada6462cde2015-03-11 15:54:46 +0900129 compatible = "socionext,uniphier-ehci", "generic-ehci";
Masahiro Yamada149c7512014-11-26 18:34:01 +0900130 status = "disabled";
131 reg = <0x5a820100 0x100>;
132 };
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900133
Masahiro Yamadaedcfaeb2015-06-30 18:27:00 +0900134 timer@60000200 {
135 compatible = "arm,cortex-a9-global-timer";
136 reg = <0x60000200 0x20>;
137 interrupts = <1 11 0x104>;
138 clocks = <&arm_timer_clk>;
139 };
140
141 timer@60000600 {
142 compatible = "arm,cortex-a9-twd-timer";
143 reg = <0x60000600 0x20>;
144 interrupts = <1 13 0x104>;
145 clocks = <&arm_timer_clk>;
146 };
147
148 intc: interrupt-controller@60001000 {
149 compatible = "arm,cortex-a9-gic";
150 #interrupt-cells = <3>;
151 interrupt-controller;
152 reg = <0x60001000 0x1000>,
153 <0x60000100 0x100>;
154 };
155
Masahiro Yamadaf5fd7af2014-12-06 00:03:23 +0900156 nand: nand@68000000 {
157 compatible = "denali,denali-nand-dt";
158 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
159 reg-names = "nand_data", "denali_reg";
160 };
Masahiro Yamada509eb672014-11-26 18:33:59 +0900161 };
162};