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wdenk71f95112003-06-15 22:40:42 +00001/*
Jerry Huang4a6ee172010-11-25 17:06:07 +00002 * Copyright 2008,2010 Freescale Semiconductor, Inc
Andy Fleming272cc702008-10-30 16:41:01 -05003 * Andy Fleming
4 *
5 * Based (loosely) on the Linux code
wdenk71f95112003-06-15 22:40:42 +00006 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
Thomas Chouabe2c932011-04-19 03:48:31 +000017 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk71f95112003-06-15 22:40:42 +000018 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#ifndef _MMC_H_
27#define _MMC_H_
wdenk71f95112003-06-15 22:40:42 +000028
Andy Fleming272cc702008-10-30 16:41:01 -050029#include <linux/list.h>
30
31#define SD_VERSION_SD 0x20000
32#define SD_VERSION_2 (SD_VERSION_SD | 0x20)
33#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10)
34#define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a)
35#define MMC_VERSION_MMC 0x10000
36#define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC)
37#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12)
38#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14)
39#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22)
40#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30)
41#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40)
42
43#define MMC_MODE_HS 0x001
44#define MMC_MODE_HS_52MHz 0x010
45#define MMC_MODE_4BIT 0x100
46#define MMC_MODE_8BIT 0x200
Thomas Choud52ebf12010-12-24 13:12:21 +000047#define MMC_MODE_SPI 0x400
Łukasz Majewskib1f1e8212011-07-05 02:19:44 +000048#define MMC_MODE_HC 0x800
Andy Fleming272cc702008-10-30 16:41:01 -050049
Łukasz Majewski62722032012-03-12 22:07:18 +000050#define MMC_MODE_MASK_WIDTH_BITS (MMC_MODE_4BIT | MMC_MODE_8BIT)
51#define MMC_MODE_WIDTH_BITS_SHIFT 8
52
Andy Fleming272cc702008-10-30 16:41:01 -050053#define SD_DATA_4BIT 0x00040000
54
Albin Tonnerre79b91de2009-08-22 14:21:53 +020055#define IS_SD(x) (x->version & SD_VERSION_SD)
Andy Fleming272cc702008-10-30 16:41:01 -050056
57#define MMC_DATA_READ 1
58#define MMC_DATA_WRITE 2
59
60#define NO_CARD_ERR -16 /* No SD/MMC card inserted */
61#define UNUSABLE_ERR -17 /* Unusable Card */
62#define COMM_ERR -18 /* Communications Error */
63#define TIMEOUT -19
64
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020065#define MMC_CMD_GO_IDLE_STATE 0
66#define MMC_CMD_SEND_OP_COND 1
67#define MMC_CMD_ALL_SEND_CID 2
68#define MMC_CMD_SET_RELATIVE_ADDR 3
69#define MMC_CMD_SET_DSR 4
Andy Fleming272cc702008-10-30 16:41:01 -050070#define MMC_CMD_SWITCH 6
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020071#define MMC_CMD_SELECT_CARD 7
Andy Fleming272cc702008-10-30 16:41:01 -050072#define MMC_CMD_SEND_EXT_CSD 8
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020073#define MMC_CMD_SEND_CSD 9
74#define MMC_CMD_SEND_CID 10
Andy Fleming272cc702008-10-30 16:41:01 -050075#define MMC_CMD_STOP_TRANSMISSION 12
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020076#define MMC_CMD_SEND_STATUS 13
77#define MMC_CMD_SET_BLOCKLEN 16
78#define MMC_CMD_READ_SINGLE_BLOCK 17
79#define MMC_CMD_READ_MULTIPLE_BLOCK 18
Andy Fleming272cc702008-10-30 16:41:01 -050080#define MMC_CMD_WRITE_SINGLE_BLOCK 24
81#define MMC_CMD_WRITE_MULTIPLE_BLOCK 25
Lei Wene6f99a52011-06-22 17:03:31 +000082#define MMC_CMD_ERASE_GROUP_START 35
83#define MMC_CMD_ERASE_GROUP_END 36
84#define MMC_CMD_ERASE 38
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020085#define MMC_CMD_APP_CMD 55
Thomas Choud52ebf12010-12-24 13:12:21 +000086#define MMC_CMD_SPI_READ_OCR 58
87#define MMC_CMD_SPI_CRC_ON_OFF 59
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020088
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020089#define SD_CMD_SEND_RELATIVE_ADDR 3
Andy Fleming272cc702008-10-30 16:41:01 -050090#define SD_CMD_SWITCH_FUNC 6
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020091#define SD_CMD_SEND_IF_COND 8
92
93#define SD_CMD_APP_SET_BUS_WIDTH 6
Lei Wene6f99a52011-06-22 17:03:31 +000094#define SD_CMD_ERASE_WR_BLK_START 32
95#define SD_CMD_ERASE_WR_BLK_END 33
Haavard Skinnemoen341188b2008-05-22 11:09:59 +020096#define SD_CMD_APP_SEND_OP_COND 41
Andy Fleming272cc702008-10-30 16:41:01 -050097#define SD_CMD_APP_SEND_SCR 51
98
99/* SCR definitions in different words */
100#define SD_HIGHSPEED_BUSY 0x00020000
101#define SD_HIGHSPEED_SUPPORTED 0x00020000
102
103#define MMC_HS_TIMING 0x00000100
104#define MMC_HS_52MHZ 0x2
105
Thomas Chouabe2c932011-04-19 03:48:31 +0000106#define OCR_BUSY 0x80000000
107#define OCR_HCS 0x40000000
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000108#define OCR_VOLTAGE_MASK 0x007FFF80
109#define OCR_ACCESS_MODE 0x60000000
Andy Fleming272cc702008-10-30 16:41:01 -0500110
Lei Wene6f99a52011-06-22 17:03:31 +0000111#define SECURE_ERASE 0x80000000
112
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000113#define MMC_STATUS_MASK (~0x0206BF7F)
Thomas Chouabe2c932011-04-19 03:48:31 +0000114#define MMC_STATUS_RDY_FOR_DATA (1 << 8)
115#define MMC_STATUS_CURR_STATE (0xf << 9)
Thomas Choued018b22011-04-19 03:48:32 +0000116#define MMC_STATUS_ERROR (1 << 19)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000117
Jan Kloetzked617c422012-02-05 22:29:12 +0000118#define MMC_STATE_PRG (7 << 9)
119
Andy Fleming272cc702008-10-30 16:41:01 -0500120#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
121#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
122#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
123#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
124#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
125#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
126#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
127#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
128#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
129#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
130#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
131#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
132#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
133#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
134#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
135#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
136#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
137
138#define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */
139#define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte
140 addressed by index which are
141 1 in value field */
142#define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte
143 addressed by index, which are
144 1 in value field */
145#define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */
146
147#define SD_SWITCH_CHECK 0
148#define SD_SWITCH_SWITCH 1
149
150/*
151 * EXT_CSD fields
152 */
Lei Wen0560db12011-10-03 20:35:10 +0000153#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */
154#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */
155#define EXT_CSD_PART_CONF 179 /* R/W */
156#define EXT_CSD_BUS_WIDTH 183 /* R/W */
157#define EXT_CSD_HS_TIMING 185 /* R/W */
158#define EXT_CSD_REV 192 /* RO */
159#define EXT_CSD_CARD_TYPE 196 /* RO */
160#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */
161#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */
Andy Fleming272cc702008-10-30 16:41:01 -0500162
163/*
164 * EXT_CSD field definitions
165 */
166
Thomas Chouabe2c932011-04-19 03:48:31 +0000167#define EXT_CSD_CMD_SET_NORMAL (1 << 0)
168#define EXT_CSD_CMD_SET_SECURE (1 << 1)
169#define EXT_CSD_CMD_SET_CPSECURE (1 << 2)
Andy Fleming272cc702008-10-30 16:41:01 -0500170
Thomas Chouabe2c932011-04-19 03:48:31 +0000171#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */
172#define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */
Andy Fleming272cc702008-10-30 16:41:01 -0500173
174#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */
175#define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */
176#define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */
Haavard Skinnemoen341188b2008-05-22 11:09:59 +0200177
Andy Fleming1de97f92008-10-30 16:31:39 -0500178#define R1_ILLEGAL_COMMAND (1 << 22)
179#define R1_APP_CMD (1 << 5)
180
Andy Fleming272cc702008-10-30 16:41:01 -0500181#define MMC_RSP_PRESENT (1 << 0)
Thomas Chouabe2c932011-04-19 03:48:31 +0000182#define MMC_RSP_136 (1 << 1) /* 136 bit response */
183#define MMC_RSP_CRC (1 << 2) /* expect valid crc */
184#define MMC_RSP_BUSY (1 << 3) /* card may send busy */
185#define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */
Andy Fleming272cc702008-10-30 16:41:01 -0500186
Thomas Chouabe2c932011-04-19 03:48:31 +0000187#define MMC_RSP_NONE (0)
188#define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
Andy Fleming272cc702008-10-30 16:41:01 -0500189#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \
190 MMC_RSP_BUSY)
Thomas Chouabe2c932011-04-19 03:48:31 +0000191#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC)
192#define MMC_RSP_R3 (MMC_RSP_PRESENT)
193#define MMC_RSP_R4 (MMC_RSP_PRESENT)
194#define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
195#define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
196#define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE)
Andy Fleming272cc702008-10-30 16:41:01 -0500197
Lei Wenbc897b12011-05-02 16:26:26 +0000198#define MMCPART_NOAVAILABLE (0xff)
199#define PART_ACCESS_MASK (0x7)
200#define PART_SUPPORT (0x1)
wdenk71f95112003-06-15 22:40:42 +0000201
Andy Fleming1de97f92008-10-30 16:31:39 -0500202struct mmc_cid {
203 unsigned long psn;
204 unsigned short oid;
205 unsigned char mid;
206 unsigned char prv;
207 unsigned char mdt;
208 char pnm[7];
209};
210
Andy Fleming272cc702008-10-30 16:41:01 -0500211struct mmc_cmd {
212 ushort cmdidx;
213 uint resp_type;
214 uint cmdarg;
Rabin Vincent0b453ff2009-04-05 13:30:55 +0530215 uint response[4];
Andy Fleming272cc702008-10-30 16:41:01 -0500216 uint flags;
217};
218
219struct mmc_data {
220 union {
221 char *dest;
222 const char *src; /* src buffers don't get written to */
223 };
224 uint flags;
225 uint blocks;
226 uint blocksize;
227};
228
229struct mmc {
230 struct list_head link;
231 char name[32];
232 void *priv;
233 uint voltages;
234 uint version;
Lei Wenbc897b12011-05-02 16:26:26 +0000235 uint has_init;
Andy Fleming272cc702008-10-30 16:41:01 -0500236 uint f_min;
237 uint f_max;
238 int high_capacity;
239 uint bus_width;
240 uint clock;
241 uint card_caps;
242 uint host_caps;
243 uint ocr;
244 uint scr[2];
245 uint csd[4];
Rabin Vincent0b453ff2009-04-05 13:30:55 +0530246 uint cid[4];
Andy Fleming272cc702008-10-30 16:41:01 -0500247 ushort rca;
Lei Wenbc897b12011-05-02 16:26:26 +0000248 char part_config;
249 char part_num;
Andy Fleming272cc702008-10-30 16:41:01 -0500250 uint tran_speed;
251 uint read_bl_len;
252 uint write_bl_len;
Lei Wene6f99a52011-06-22 17:03:31 +0000253 uint erase_grp_size;
Andy Fleming272cc702008-10-30 16:41:01 -0500254 u64 capacity;
255 block_dev_desc_t block_dev;
256 int (*send_cmd)(struct mmc *mmc,
257 struct mmc_cmd *cmd, struct mmc_data *data);
258 void (*set_ios)(struct mmc *mmc);
259 int (*init)(struct mmc *mmc);
Thierry Reding48972d92012-01-02 01:15:37 +0000260 int (*getcd)(struct mmc *mmc);
Sandeep Paulraj57418d22010-12-20 20:01:21 -0500261 uint b_max;
Andy Fleming272cc702008-10-30 16:41:01 -0500262};
263
264int mmc_register(struct mmc *mmc);
265int mmc_initialize(bd_t *bis);
266int mmc_init(struct mmc *mmc);
267int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
Jerry Huang4a6ee172010-11-25 17:06:07 +0000268void mmc_set_clock(struct mmc *mmc, uint clock);
Andy Fleming272cc702008-10-30 16:41:01 -0500269struct mmc *find_mmc_device(int dev_num);
Steve Sakoman89716962010-07-01 12:12:42 -0700270int mmc_set_dev(int dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500271void print_mmc_devices(char separator);
Lei Wenea6ebe22011-05-02 16:26:25 +0000272int get_mmc_num(void);
Thierry Reding314284b2012-01-02 01:15:36 +0000273int board_mmc_getcd(struct mmc *mmc);
Lei Wenbc897b12011-05-02 16:26:26 +0000274int mmc_switch_part(int dev_num, unsigned int part_num);
Thierry Reding48972d92012-01-02 01:15:37 +0000275int mmc_getcd(struct mmc *mmc);
Andy Fleming272cc702008-10-30 16:41:01 -0500276
Reinhard Meyer1592ef82010-08-13 10:31:06 +0200277#ifdef CONFIG_GENERIC_MMC
Thomas Choud52ebf12010-12-24 13:12:21 +0000278#define mmc_host_is_spi(mmc) ((mmc)->host_caps & MMC_MODE_SPI)
279struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode);
Reinhard Meyer1592ef82010-08-13 10:31:06 +0200280#else
Andy Fleming272cc702008-10-30 16:41:01 -0500281int mmc_legacy_init(int verbose);
282#endif
Reinhard Meyer1592ef82010-08-13 10:31:06 +0200283
wdenk71f95112003-06-15 22:40:42 +0000284#endif /* _MMC_H_ */