blob: 19b80556be05c26829159f54d39a0474a7de54f2 [file] [log] [blame]
Simon Glass1938f4a2013-03-11 06:49:53 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
Simon Glass1938f4a2013-03-11 06:49:53 +000011 */
12
13#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -070014#include <console.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000015#include <environment.h>
Simon Glassab7cd622014-07-23 06:55:04 -060016#include <dm.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000017#include <fdtdec.h>
Simon Glassf828bf22013-04-20 08:42:41 +000018#include <fs.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000019#include <i2c.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000020#include <initcall.h>
Simon Glass96d4b752017-03-31 08:40:37 -060021#include <init_helpers.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000022#include <logbuff.h>
Simon Glassfb5cf7f2015-02-27 22:06:36 -070023#include <malloc.h>
Joe Hershberger0eb25b62015-03-22 17:08:59 -050024#include <mapmem.h>
Simon Glassa733b062013-04-26 02:53:43 +000025#include <os.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000026#include <post.h>
Simon Glasse47b2d62017-03-31 08:40:38 -060027#include <relocate.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000028#include <spi.h>
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020029#include <status_led.h>
Simon Glass1057e6c2016-02-24 09:14:50 -070030#include <timer.h>
Simon Glass71c52db2013-06-11 11:14:42 -070031#include <trace.h>
Simon Glass5a541942016-01-18 19:52:21 -070032#include <video.h>
Simon Glasse4fef6c2013-03-11 14:30:42 +000033#include <watchdog.h>
Simon Glassb885d022017-05-17 08:23:01 -060034#ifdef CONFIG_MACH_TYPE
35#include <asm/mach-types.h>
36#endif
Simon Glass1fbf97d2017-03-31 08:40:39 -060037#if defined(CONFIG_MP) && defined(CONFIG_PPC)
38#include <asm/mp.h>
39#endif
Simon Glass1938f4a2013-03-11 06:49:53 +000040#include <asm/io.h>
41#include <asm/sections.h>
Simon Glassab7cd622014-07-23 06:55:04 -060042#include <dm/root.h>
Simon Glass056285f2017-03-31 08:40:35 -060043#include <linux/errno.h>
Simon Glass1938f4a2013-03-11 06:49:53 +000044
45/*
46 * Pointer to initial global data area
47 *
48 * Here we initialize it if needed.
49 */
50#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
51#undef XTRN_DECLARE_GLOBAL_DATA_PTR
52#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
53DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
54#else
55DECLARE_GLOBAL_DATA_PTR;
56#endif
57
58/*
Simon Glass4c509342015-04-28 20:25:03 -060059 * TODO(sjg@chromium.org): IMO this code should be
Simon Glass1938f4a2013-03-11 06:49:53 +000060 * refactored to a single function, something like:
61 *
62 * void led_set_state(enum led_colour_t colour, int on);
63 */
64/************************************************************************
65 * Coloured LED functionality
66 ************************************************************************
67 * May be supplied by boards if desired
68 */
Jeroen Hofsteec5d40012014-06-23 23:20:19 +020069__weak void coloured_LED_init(void) {}
70__weak void red_led_on(void) {}
71__weak void red_led_off(void) {}
72__weak void green_led_on(void) {}
73__weak void green_led_off(void) {}
74__weak void yellow_led_on(void) {}
75__weak void yellow_led_off(void) {}
76__weak void blue_led_on(void) {}
77__weak void blue_led_off(void) {}
Simon Glass1938f4a2013-03-11 06:49:53 +000078
79/*
80 * Why is gd allocated a register? Prior to reloc it might be better to
81 * just pass it around to each function in this file?
82 *
83 * After reloc one could argue that it is hardly used and doesn't need
84 * to be in a register. Or if it is it should perhaps hold pointers to all
85 * global data for all modules, so that post-reloc we can avoid the massive
86 * literal pool we get on ARM. Or perhaps just encourage each module to use
87 * a structure...
88 */
89
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080090#if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
Simon Glasse4fef6c2013-03-11 14:30:42 +000091static int init_func_watchdog_init(void)
92{
Tom Riniea3310e2017-03-14 11:08:10 -040093# if defined(CONFIG_HW_WATCHDOG) && \
94 (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
Stefan Roese14a380a2015-03-10 08:04:36 +010095 defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \
Anatolij Gustschin46d7a3b2016-06-13 14:24:23 +020096 defined(CONFIG_DESIGNWARE_WATCHDOG) || \
Stefan Roese14a380a2015-03-10 08:04:36 +010097 defined(CONFIG_IMX_WATCHDOG))
Sonic Zhangd54d7eb2014-07-17 19:01:34 +080098 hw_watchdog_init();
Simon Glasse4fef6c2013-03-11 14:30:42 +000099 puts(" Watchdog enabled\n");
Anatolij Gustschinba169d92016-06-13 14:24:24 +0200100# endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000101 WATCHDOG_RESET();
102
103 return 0;
104}
105
106int init_func_watchdog_reset(void)
107{
108 WATCHDOG_RESET();
109
110 return 0;
111}
112#endif /* CONFIG_WATCHDOG */
113
Jeroen Hofsteedd2a6cd2014-10-08 22:57:22 +0200114__weak void board_add_ram_info(int use_default)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000115{
116 /* please define platform specific board_add_ram_info() */
117}
118
Simon Glass1938f4a2013-03-11 06:49:53 +0000119static int init_baud_rate(void)
120{
121 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
122 return 0;
123}
124
125static int display_text_info(void)
126{
Ben Stoltz9b217492015-07-31 09:31:37 -0600127#if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100128 ulong bss_start, bss_end, text_base;
Simon Glass1938f4a2013-03-11 06:49:53 +0000129
Simon Glass632efa72013-03-11 07:06:48 +0000130 bss_start = (ulong)&__bss_start;
131 bss_end = (ulong)&__bss_end;
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100132
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800133#ifdef CONFIG_SYS_TEXT_BASE
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100134 text_base = CONFIG_SYS_TEXT_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800135#else
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100136 text_base = CONFIG_SYS_MONITOR_BASE;
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800137#endif
Daniel Schwierzeck9fdee7d2014-11-15 23:46:53 +0100138
139 debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
140 text_base, bss_start, bss_end);
Simon Glassa733b062013-04-26 02:53:43 +0000141#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000142
Simon Glass1938f4a2013-03-11 06:49:53 +0000143 return 0;
144}
145
146static int announce_dram_init(void)
147{
148 puts("DRAM: ");
149 return 0;
150}
151
152static int show_dram_config(void)
153{
York Sunfa39ffe2014-05-02 17:28:05 -0700154 unsigned long long size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000155
156#ifdef CONFIG_NR_DRAM_BANKS
157 int i;
158
159 debug("\nRAM Configuration:\n");
160 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
161 size += gd->bd->bi_dram[i].size;
Bin Meng715f5992015-08-06 01:31:20 -0700162 debug("Bank #%d: %llx ", i,
163 (unsigned long long)(gd->bd->bi_dram[i].start));
Simon Glass1938f4a2013-03-11 06:49:53 +0000164#ifdef DEBUG
165 print_size(gd->bd->bi_dram[i].size, "\n");
166#endif
167 }
168 debug("\nDRAM: ");
169#else
170 size = gd->ram_size;
171#endif
172
Simon Glasse4fef6c2013-03-11 14:30:42 +0000173 print_size(size, "");
174 board_add_ram_info(0);
175 putc('\n');
Simon Glass1938f4a2013-03-11 06:49:53 +0000176
177 return 0;
178}
179
Simon Glass76b00ac2017-03-31 08:40:32 -0600180__weak int dram_init_banksize(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000181{
182#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
183 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
184 gd->bd->bi_dram[0].size = get_effective_memsize();
185#endif
Simon Glass76b00ac2017-03-31 08:40:32 -0600186
187 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000188}
189
Simon Glass69153982017-05-12 21:09:56 -0600190#if defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000191static int init_func_i2c(void)
192{
193 puts("I2C: ");
trem815a76f2013-09-21 18:13:34 +0200194#ifdef CONFIG_SYS_I2C
195 i2c_init_all();
196#else
Simon Glasse4fef6c2013-03-11 14:30:42 +0000197 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
trem815a76f2013-09-21 18:13:34 +0200198#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000199 puts("ready\n");
200 return 0;
201}
202#endif
203
204#if defined(CONFIG_HARD_SPI)
205static int init_func_spi(void)
206{
207 puts("SPI: ");
208 spi_init();
209 puts("ready\n");
210 return 0;
211}
212#endif
213
214__maybe_unused
Simon Glass1938f4a2013-03-11 06:49:53 +0000215static int zero_global_data(void)
216{
217 memset((void *)gd, '\0', sizeof(gd_t));
218
219 return 0;
220}
221
222static int setup_mon_len(void)
223{
Michal Simeke945f6d2014-05-08 16:08:44 +0200224#if defined(__ARM__) || defined(__MICROBLAZE__)
Albert ARIBAUDb60eff32014-02-22 17:53:43 +0100225 gd->mon_len = (ulong)&__bss_end - (ulong)_start;
Ben Stoltz9b217492015-07-31 09:31:37 -0600226#elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
Simon Glassa733b062013-04-26 02:53:43 +0000227 gd->mon_len = (ulong)&_end - (ulong)_init;
Tom Riniea3310e2017-03-14 11:08:10 -0400228#elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800229 gd->mon_len = CONFIG_SYS_MONITOR_LEN;
Vladimir Zapolskiye2099d72016-11-28 00:15:24 +0200230#elif defined(CONFIG_NDS32) || defined(CONFIG_SH)
Kun-Hua Huang2e88bb22015-08-24 14:52:35 +0800231 gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
Simon Glassb0b35952016-05-14 18:49:28 -0600232#elif defined(CONFIG_SYS_MONITOR_BASE)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000233 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
234 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
Simon Glass632efa72013-03-11 07:06:48 +0000235#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000236 return 0;
237}
238
239__weak int arch_cpu_init(void)
240{
241 return 0;
242}
243
Paul Burton8ebf5062016-09-21 11:18:46 +0100244__weak int mach_cpu_init(void)
245{
246 return 0;
247}
248
Simon Glass1938f4a2013-03-11 06:49:53 +0000249/* Get the top of usable RAM */
250__weak ulong board_get_usable_ram_top(ulong total_size)
251{
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700252#ifdef CONFIG_SYS_SDRAM_BASE
253 /*
Simon Glass4c509342015-04-28 20:25:03 -0600254 * Detect whether we have so much RAM that it goes past the end of our
Stephen Warren1e4d11a2014-12-23 10:34:49 -0700255 * 32-bit address space. If so, clip the usable RAM so it doesn't.
256 */
257 if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
258 /*
259 * Will wrap back to top of 32-bit space when reservations
260 * are made.
261 */
262 return 0;
263#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000264 return gd->ram_top;
265}
266
267static int setup_dest_addr(void)
268{
269 debug("Monitor len: %08lX\n", gd->mon_len);
270 /*
271 * Ram is setup, size stored in gd !!
272 */
273 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
York Sun36cc0de2017-03-06 09:02:28 -0800274#if defined(CONFIG_SYS_MEM_TOP_HIDE)
Simon Glass1938f4a2013-03-11 06:49:53 +0000275 /*
276 * Subtract specified amount of memory to hide so that it won't
277 * get "touched" at all by U-Boot. By fixing up gd->ram_size
278 * the Linux kernel should now get passed the now "corrected"
York Sun36cc0de2017-03-06 09:02:28 -0800279 * memory size and won't touch it either. This should work
280 * for arch/ppc and arch/powerpc. Only Linux board ports in
281 * arch/powerpc with bootwrapper support, that recalculate the
282 * memory size from the SDRAM controller setup will have to
283 * get fixed.
Simon Glass1938f4a2013-03-11 06:49:53 +0000284 */
York Sun36cc0de2017-03-06 09:02:28 -0800285 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
286#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000287#ifdef CONFIG_SYS_SDRAM_BASE
288 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
289#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000290 gd->ram_top += get_effective_memsize();
Simon Glass1938f4a2013-03-11 06:49:53 +0000291 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000292 gd->relocaddr = gd->ram_top;
Simon Glass1938f4a2013-03-11 06:49:53 +0000293 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
Gabriel Huauec3b4822014-09-03 13:57:54 -0700294#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
Simon Glasse4fef6c2013-03-11 14:30:42 +0000295 /*
296 * We need to make sure the location we intend to put secondary core
297 * boot code is reserved and not used by any part of u-boot
298 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000299 if (gd->relocaddr > determine_mp_bootpg(NULL)) {
300 gd->relocaddr = determine_mp_bootpg(NULL);
301 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000302 }
303#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000304 return 0;
305}
306
Simon Glassb56db482017-03-31 08:40:28 -0600307#if defined(CONFIG_LOGBUFFER)
Simon Glass1938f4a2013-03-11 06:49:53 +0000308static int reserve_logbuffer(void)
309{
Simon Glassb56db482017-03-31 08:40:28 -0600310#ifndef CONFIG_ALT_LB_ADDR
Simon Glass1938f4a2013-03-11 06:49:53 +0000311 /* reserve kernel log buffer */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000312 gd->relocaddr -= LOGBUFF_RESERVE;
Simon Glass1938f4a2013-03-11 06:49:53 +0000313 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000314 gd->relocaddr);
Simon Glassb56db482017-03-31 08:40:28 -0600315#endif
316
Simon Glass1938f4a2013-03-11 06:49:53 +0000317 return 0;
318}
319#endif
320
321#ifdef CONFIG_PRAM
322/* reserve protected RAM */
323static int reserve_pram(void)
324{
325 ulong reg;
326
327 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000328 gd->relocaddr -= (reg << 10); /* size is in kB */
Simon Glass1938f4a2013-03-11 06:49:53 +0000329 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000330 gd->relocaddr);
Simon Glass1938f4a2013-03-11 06:49:53 +0000331 return 0;
332}
333#endif /* CONFIG_PRAM */
334
335/* Round memory pointer down to next 4 kB limit */
336static int reserve_round_4k(void)
337{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000338 gd->relocaddr &= ~(4096 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000339 return 0;
340}
341
Simon Glass80d4bcd2017-03-31 08:40:29 -0600342#ifdef CONFIG_ARM
Simon Glass1938f4a2013-03-11 06:49:53 +0000343static int reserve_mmu(void)
344{
Simon Glass80d4bcd2017-03-31 08:40:29 -0600345#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
Simon Glass1938f4a2013-03-11 06:49:53 +0000346 /* reserve TLB table */
David Fengcce6be72013-12-14 11:47:36 +0800347 gd->arch.tlb_size = PGTABLE_SIZE;
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000348 gd->relocaddr -= gd->arch.tlb_size;
Simon Glass1938f4a2013-03-11 06:49:53 +0000349
350 /* round down to next 64 kB limit */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000351 gd->relocaddr &= ~(0x10000 - 1);
Simon Glass1938f4a2013-03-11 06:49:53 +0000352
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000353 gd->arch.tlb_addr = gd->relocaddr;
Simon Glass1938f4a2013-03-11 06:49:53 +0000354 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
355 gd->arch.tlb_addr + gd->arch.tlb_size);
York Sun50e93b92016-06-24 16:46:19 -0700356
357#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
358 /*
359 * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
360 * with location within secure ram.
361 */
362 gd->arch.tlb_allocated = gd->arch.tlb_addr;
363#endif
Simon Glass80d4bcd2017-03-31 08:40:29 -0600364#endif
York Sun50e93b92016-06-24 16:46:19 -0700365
Simon Glass1938f4a2013-03-11 06:49:53 +0000366 return 0;
367}
368#endif
369
Simon Glass5a541942016-01-18 19:52:21 -0700370static int reserve_video(void)
371{
Simon Glass0f079eb2017-03-31 08:40:30 -0600372#ifdef CONFIG_DM_VIDEO
Simon Glass5a541942016-01-18 19:52:21 -0700373 ulong addr;
374 int ret;
375
376 addr = gd->relocaddr;
377 ret = video_reserve(&addr);
378 if (ret)
379 return ret;
380 gd->relocaddr = addr;
Simon Glass0f079eb2017-03-31 08:40:30 -0600381#elif defined(CONFIG_LCD)
Simon Glass5a541942016-01-18 19:52:21 -0700382# ifdef CONFIG_FB_ADDR
Simon Glass1938f4a2013-03-11 06:49:53 +0000383 gd->fb_base = CONFIG_FB_ADDR;
Simon Glass5a541942016-01-18 19:52:21 -0700384# else
Simon Glass1938f4a2013-03-11 06:49:53 +0000385 /* reserve memory for LCD display (always full pages) */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000386 gd->relocaddr = lcd_setmem(gd->relocaddr);
387 gd->fb_base = gd->relocaddr;
Simon Glass5a541942016-01-18 19:52:21 -0700388# endif /* CONFIG_FB_ADDR */
Simon Glass0f079eb2017-03-31 08:40:30 -0600389#elif defined(CONFIG_VIDEO) && \
Heiko Schocher5b8e76c2017-06-07 17:33:09 +0200390 (!defined(CONFIG_PPC)) && \
Simon Glass8703ef32016-01-18 19:52:20 -0700391 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
Tom Riniea3310e2017-03-14 11:08:10 -0400392 !defined(CONFIG_M68K)
Simon Glass8703ef32016-01-18 19:52:20 -0700393 /* reserve memory for video display (always full pages) */
394 gd->relocaddr = video_setmem(gd->relocaddr);
395 gd->fb_base = gd->relocaddr;
Simon Glass0f079eb2017-03-31 08:40:30 -0600396#endif
Simon Glass8703ef32016-01-18 19:52:20 -0700397
398 return 0;
399}
Simon Glass8703ef32016-01-18 19:52:20 -0700400
Simon Glass71c52db2013-06-11 11:14:42 -0700401static int reserve_trace(void)
402{
403#ifdef CONFIG_TRACE
404 gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
405 gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
406 debug("Reserving %dk for trace data at: %08lx\n",
407 CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
408#endif
409
410 return 0;
411}
412
Simon Glass1938f4a2013-03-11 06:49:53 +0000413static int reserve_uboot(void)
414{
415 /*
416 * reserve memory for U-Boot code, data & bss
417 * round down to next 4 kB limit
418 */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000419 gd->relocaddr -= gd->mon_len;
420 gd->relocaddr &= ~(4096 - 1);
Paul Burton703ec9d2017-06-19 11:53:47 -0700421#if defined(CONFIG_E500) || defined(CONFIG_MIPS)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000422 /* round down to next 64 kB limit so that IVPR stays aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000423 gd->relocaddr &= ~(65536 - 1);
Simon Glasse4fef6c2013-03-11 14:30:42 +0000424#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000425
426 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000427 gd->relocaddr);
428
429 gd->start_addr_sp = gd->relocaddr;
430
Simon Glass1938f4a2013-03-11 06:49:53 +0000431 return 0;
432}
433
434/* reserve memory for malloc() area */
435static int reserve_malloc(void)
436{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000437 gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
Simon Glass1938f4a2013-03-11 06:49:53 +0000438 debug("Reserving %dk for malloc() at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000439 TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000440 return 0;
441}
442
443/* (permanently) allocate a Board Info struct */
444static int reserve_board(void)
445{
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800446 if (!gd->bd) {
447 gd->start_addr_sp -= sizeof(bd_t);
448 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
449 memset(gd->bd, '\0', sizeof(bd_t));
450 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
451 sizeof(bd_t), gd->start_addr_sp);
452 }
Simon Glass1938f4a2013-03-11 06:49:53 +0000453 return 0;
454}
455
456static int setup_machine(void)
457{
458#ifdef CONFIG_MACH_TYPE
459 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
460#endif
461 return 0;
462}
463
464static int reserve_global_data(void)
465{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000466 gd->start_addr_sp -= sizeof(gd_t);
467 gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
Simon Glass1938f4a2013-03-11 06:49:53 +0000468 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000469 sizeof(gd_t), gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000470 return 0;
471}
472
473static int reserve_fdt(void)
474{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100475#ifndef CONFIG_OF_EMBED
Simon Glass1938f4a2013-03-11 06:49:53 +0000476 /*
Simon Glass4c509342015-04-28 20:25:03 -0600477 * If the device tree is sitting immediately above our image then we
Simon Glass1938f4a2013-03-11 06:49:53 +0000478 * must relocate it. If it is embedded in the data section, then it
479 * will be relocated with other data.
480 */
481 if (gd->fdt_blob) {
482 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
483
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000484 gd->start_addr_sp -= gd->fdt_size;
485 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
Simon Glassa733b062013-04-26 02:53:43 +0000486 debug("Reserving %lu Bytes for FDT at: %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000487 gd->fdt_size, gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000488 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100489#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000490
491 return 0;
492}
493
Simon Glass25e7dc62017-05-22 05:05:30 -0600494static int reserve_bootstage(void)
495{
496#ifdef CONFIG_BOOTSTAGE
497 int size = bootstage_get_size();
498
499 gd->start_addr_sp -= size;
500 gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
501 debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
502 gd->start_addr_sp);
503#endif
504
505 return 0;
506}
507
Andreas Bießmann68145d42015-02-06 23:06:45 +0100508int arch_reserve_stacks(void)
509{
510 return 0;
511}
512
Simon Glass1938f4a2013-03-11 06:49:53 +0000513static int reserve_stacks(void)
514{
Andreas Bießmann68145d42015-02-06 23:06:45 +0100515 /* make stack pointer 16-byte aligned */
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000516 gd->start_addr_sp -= 16;
517 gd->start_addr_sp &= ~0xf;
Simon Glass1938f4a2013-03-11 06:49:53 +0000518
519 /*
Simon Glass4c509342015-04-28 20:25:03 -0600520 * let the architecture-specific code tailor gd->start_addr_sp and
Andreas Bießmann68145d42015-02-06 23:06:45 +0100521 * gd->irq_sp
Simon Glass1938f4a2013-03-11 06:49:53 +0000522 */
Andreas Bießmann68145d42015-02-06 23:06:45 +0100523 return arch_reserve_stacks();
Simon Glass1938f4a2013-03-11 06:49:53 +0000524}
525
526static int display_new_sp(void)
527{
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000528 debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000529
530 return 0;
531}
532
Vladimir Zapolskiye2099d72016-11-28 00:15:24 +0200533#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
534 defined(CONFIG_SH)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000535static int setup_board_part1(void)
536{
537 bd_t *bd = gd->bd;
538
539 /*
540 * Save local variables to board info struct
541 */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000542 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
543 bd->bi_memsize = gd->ram_size; /* size in bytes */
544
545#ifdef CONFIG_SYS_SRAM_BASE
546 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
547 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
548#endif
549
Heiko Schocher50258972017-06-07 17:33:11 +0200550#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000551 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
552#endif
Heiko Schocher064b55c2017-06-14 05:49:40 +0200553#if defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000554 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
555#endif
556#if defined(CONFIG_MPC83xx)
557 bd->bi_immrbar = CONFIG_SYS_IMMR;
558#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000559
560 return 0;
561}
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100562#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000563
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100564#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000565static int setup_board_part2(void)
566{
567 bd_t *bd = gd->bd;
568
569 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
570 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
571#if defined(CONFIG_CPM2)
572 bd->bi_cpmfreq = gd->arch.cpm_clk;
573 bd->bi_brgfreq = gd->arch.brg_clk;
574 bd->bi_sccfreq = gd->arch.scc_clk;
575 bd->bi_vco = gd->arch.vco_out;
576#endif /* CONFIG_CPM2 */
Alison Wang1313db42015-02-12 18:33:15 +0800577#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
578 bd->bi_pcifreq = gd->pci_clk;
579#endif
580#if defined(CONFIG_EXTRA_CLOCK)
581 bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
582 bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
583 bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
584#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000585
586 return 0;
587}
588#endif
589
Simon Glass1938f4a2013-03-11 06:49:53 +0000590#ifdef CONFIG_POST
591static int init_post(void)
592{
593 post_bootmode_init();
594 post_run(NULL, POST_ROM | post_bootmode_get(0));
595
596 return 0;
597}
598#endif
599
Simon Glass1938f4a2013-03-11 06:49:53 +0000600static int reloc_fdt(void)
601{
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100602#ifndef CONFIG_OF_EMBED
Simon Glassf05ad9b2015-08-04 12:33:39 -0600603 if (gd->flags & GD_FLG_SKIP_RELOC)
604 return 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000605 if (gd->new_fdt) {
606 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
607 gd->fdt_blob = gd->new_fdt;
608 }
Siva Durga Prasad Paladugue9acb9e2015-12-03 15:46:03 +0100609#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000610
611 return 0;
612}
613
Simon Glass25e7dc62017-05-22 05:05:30 -0600614static int reloc_bootstage(void)
615{
616#ifdef CONFIG_BOOTSTAGE
617 if (gd->flags & GD_FLG_SKIP_RELOC)
618 return 0;
619 if (gd->new_bootstage) {
620 int size = bootstage_get_size();
621
622 debug("Copying bootstage from %p to %p, size %x\n",
623 gd->bootstage, gd->new_bootstage, size);
624 memcpy(gd->new_bootstage, gd->bootstage, size);
625 gd->bootstage = gd->new_bootstage;
626 }
627#endif
628
629 return 0;
630}
631
Simon Glass1938f4a2013-03-11 06:49:53 +0000632static int setup_reloc(void)
633{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600634 if (gd->flags & GD_FLG_SKIP_RELOC) {
635 debug("Skipping relocation due to flag\n");
636 return 0;
637 }
638
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800639#ifdef CONFIG_SYS_TEXT_BASE
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200640#ifdef ARM
641 gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
642#elif defined(CONFIG_M68K)
angelo@sysam.ite310b932015-02-12 01:40:17 +0100643 /*
644 * On all ColdFire arch cpu, monitor code starts always
645 * just after the default vector table location, so at 0x400
646 */
647 gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
Lothar Waßmann53207bf2017-06-08 10:18:25 +0200648#else
649 gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
angelo@sysam.ite310b932015-02-12 01:40:17 +0100650#endif
Sonic Zhangd54d7eb2014-07-17 19:01:34 +0800651#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000652 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
653
654 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
Simon Glassa733b062013-04-26 02:53:43 +0000655 debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000656 gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
657 gd->start_addr_sp);
Simon Glass1938f4a2013-03-11 06:49:53 +0000658
659 return 0;
660}
661
mario.six@gdsys.cc2a792752017-02-22 16:07:22 +0100662#ifdef CONFIG_OF_BOARD_FIXUP
663static int fix_fdt(void)
664{
665 return board_fix_fdt((void *)gd->fdt_blob);
666}
667#endif
668
Simon Glass1938f4a2013-03-11 06:49:53 +0000669/* ARM calls relocate_code from its crt0.S */
Simon Glass530f27e2017-01-16 07:03:49 -0700670#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
671 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000672
673static int jump_to_copy(void)
674{
Simon Glassf05ad9b2015-08-04 12:33:39 -0600675 if (gd->flags & GD_FLG_SKIP_RELOC)
676 return 0;
Simon Glass48a33802013-03-05 14:39:52 +0000677 /*
678 * x86 is special, but in a nice way. It uses a trampoline which
679 * enables the dcache if possible.
680 *
681 * For now, other archs use relocate_code(), which is implemented
682 * similarly for all archs. When we do generic relocation, hopefully
683 * we can make all archs enable the dcache prior to relocation.
684 */
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300685#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000686 /*
687 * SDRAM and console are now initialised. The final stack can now
688 * be setup in SDRAM. Code execution will continue in Flash, but
689 * with the stack in SDRAM and Global Data in temporary memory
690 * (CPU cache)
691 */
Simon Glassf0c7d9c2015-08-10 20:44:32 -0600692 arch_setup_gd(gd->new_gd);
Simon Glass48a33802013-03-05 14:39:52 +0000693 board_init_f_r_trampoline(gd->start_addr_sp);
694#else
Masahiro Yamadaa0ba2792013-05-27 00:37:30 +0000695 relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000696#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000697
698 return 0;
699}
700#endif
701
702/* Record the board_init_f() bootstage (after arch_cpu_init()) */
Simon Glassb383d6c2017-05-22 05:05:25 -0600703static int initf_bootstage(void)
Simon Glass1938f4a2013-03-11 06:49:53 +0000704{
Simon Glassbaa7d342017-06-07 10:28:46 -0600705 bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
706 IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
Simon Glassb383d6c2017-05-22 05:05:25 -0600707 int ret;
708
Simon Glass824bb1b2017-05-22 05:05:35 -0600709 ret = bootstage_init(!from_spl);
Simon Glassb383d6c2017-05-22 05:05:25 -0600710 if (ret)
711 return ret;
Simon Glass824bb1b2017-05-22 05:05:35 -0600712 if (from_spl) {
713 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
714 CONFIG_BOOTSTAGE_STASH_SIZE);
715
716 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
717 if (ret && ret != -ENOENT) {
718 debug("Failed to unstash bootstage: err=%d\n", ret);
719 return ret;
720 }
721 }
Simon Glassb383d6c2017-05-22 05:05:25 -0600722
Simon Glass1938f4a2013-03-11 06:49:53 +0000723 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
724
725 return 0;
726}
727
Simon Glass9854a872015-11-08 23:47:48 -0700728static int initf_console_record(void)
729{
Andy Yanf1896c42017-07-24 17:43:34 +0800730#if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
Simon Glass9854a872015-11-08 23:47:48 -0700731 return console_record_init();
732#else
733 return 0;
734#endif
735}
736
Simon Glassab7cd622014-07-23 06:55:04 -0600737static int initf_dm(void)
738{
Andy Yanf1896c42017-07-24 17:43:34 +0800739#if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
Simon Glassab7cd622014-07-23 06:55:04 -0600740 int ret;
741
Simon Glass63c5bf42017-05-22 05:05:32 -0600742 bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
Simon Glassab7cd622014-07-23 06:55:04 -0600743 ret = dm_init_and_scan(true);
Simon Glass63c5bf42017-05-22 05:05:32 -0600744 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
Simon Glassab7cd622014-07-23 06:55:04 -0600745 if (ret)
746 return ret;
747#endif
Simon Glass1057e6c2016-02-24 09:14:50 -0700748#ifdef CONFIG_TIMER_EARLY
749 ret = dm_timer_init();
750 if (ret)
751 return ret;
752#endif
Simon Glassab7cd622014-07-23 06:55:04 -0600753
754 return 0;
755}
756
Simon Glass146251f2015-01-19 22:16:12 -0700757/* Architecture-specific memory reservation */
758__weak int reserve_arch(void)
759{
760 return 0;
761}
762
Simon Glassd4c671c2015-03-05 12:25:16 -0700763__weak int arch_cpu_init_dm(void)
764{
765 return 0;
766}
767
Simon Glass4acff452017-01-16 07:03:50 -0700768static const init_fnc_t init_sequence_f[] = {
Simon Glass1938f4a2013-03-11 06:49:53 +0000769 setup_mon_len,
Simon Glassb45122f2015-02-27 22:06:34 -0700770#ifdef CONFIG_OF_CONTROL
Simon Glass08793612015-02-27 22:06:35 -0700771 fdtdec_setup,
Simon Glassb45122f2015-02-27 22:06:34 -0700772#endif
Kevin Hilmand2107182014-12-09 15:03:58 -0800773#ifdef CONFIG_TRACE
Simon Glass71c52db2013-06-11 11:14:42 -0700774 trace_early_init,
Kevin Hilmand2107182014-12-09 15:03:58 -0800775#endif
Simon Glass768e0f52014-11-10 18:00:18 -0700776 initf_malloc,
Simon Glass5ac44a52017-05-22 05:05:31 -0600777 initf_bootstage, /* uses its own timer, so does not need DM */
Simon Glass9854a872015-11-08 23:47:48 -0700778 initf_console_record,
Simon Glass671549e2017-03-28 10:27:18 -0600779#if defined(CONFIG_HAVE_FSP)
780 arch_fsp_init,
Bin Menga52a068e2015-08-20 06:40:18 -0700781#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000782 arch_cpu_init, /* basic arch cpu dependent setup */
Paul Burton8ebf5062016-09-21 11:18:46 +0100783 mach_cpu_init, /* SoC/machine dependent CPU setup */
Simon Glass3ea09532014-09-03 17:36:59 -0600784 initf_dm,
Simon Glassd4c671c2015-03-05 12:25:16 -0700785 arch_cpu_init_dm,
Simon Glass1938f4a2013-03-11 06:49:53 +0000786#if defined(CONFIG_BOARD_EARLY_INIT_F)
787 board_early_init_f,
788#endif
Simon Glass727e94a2017-03-28 10:27:26 -0600789#if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
Simon Glassc252c062017-03-28 10:27:19 -0600790 /* get CPU and bus clocks according to the environment variable */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000791 get_clocks, /* get CPU and bus clocks (etc.) */
Simon Glass1793e782017-03-28 10:27:23 -0600792#endif
Angelo Dureghello0ce45282017-05-10 23:58:06 +0200793#if !defined(CONFIG_M68K)
Simon Glass1938f4a2013-03-11 06:49:53 +0000794 timer_init, /* initialize timer */
Angelo Dureghello0ce45282017-05-10 23:58:06 +0200795#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000796#if defined(CONFIG_BOARD_POSTCLK_INIT)
797 board_postclk_init,
798#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000799 env_init, /* initialize environment */
800 init_baud_rate, /* initialze baudrate settings */
801 serial_init, /* serial communications setup */
802 console_init_f, /* stage 1 init of console */
803 display_options, /* say that we are here */
804 display_text_info, /* show debugging info if required */
Simon Glass76d1d022017-03-28 10:27:30 -0600805#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_SH) || \
806 defined(CONFIG_X86)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000807 checkcpu,
808#endif
Simon Glasscc664002017-01-23 13:31:25 -0700809#if defined(CONFIG_DISPLAY_CPUINFO)
Simon Glass1938f4a2013-03-11 06:49:53 +0000810 print_cpuinfo, /* display cpu info (and speed) */
Simon Glasscc664002017-01-23 13:31:25 -0700811#endif
Cooper Jr., Franklinaf9e6ad2017-06-16 17:25:12 -0500812#if defined(CONFIG_DTB_RESELECT)
813 embedded_dtb_select,
814#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000815#if defined(CONFIG_DISPLAY_BOARDINFO)
Masahiro Yamada0365ffc2015-01-14 17:07:05 +0900816 show_board_info,
Simon Glass1938f4a2013-03-11 06:49:53 +0000817#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000818 INIT_FUNC_WATCHDOG_INIT
819#if defined(CONFIG_MISC_INIT_F)
820 misc_init_f,
821#endif
822 INIT_FUNC_WATCHDOG_RESET
Simon Glass69153982017-05-12 21:09:56 -0600823#if defined(CONFIG_SYS_I2C)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000824 init_func_i2c,
825#endif
826#if defined(CONFIG_HARD_SPI)
827 init_func_spi,
828#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000829 announce_dram_init,
Simon Glass1938f4a2013-03-11 06:49:53 +0000830 dram_init, /* configure available RAM banks */
Simon Glasse4fef6c2013-03-11 14:30:42 +0000831#ifdef CONFIG_POST
832 post_init_f,
833#endif
834 INIT_FUNC_WATCHDOG_RESET
835#if defined(CONFIG_SYS_DRAM_TEST)
836 testdram,
837#endif /* CONFIG_SYS_DRAM_TEST */
838 INIT_FUNC_WATCHDOG_RESET
839
Simon Glass1938f4a2013-03-11 06:49:53 +0000840#ifdef CONFIG_POST
841 init_post,
842#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000843 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000844 /*
845 * Now that we have DRAM mapped and working, we can
846 * relocate the code and continue running from DRAM.
847 *
848 * Reserve memory at end of RAM for (top down in that order):
849 * - area that won't get touched by U-Boot and Linux (optional)
850 * - kernel log buffer
851 * - protected RAM
852 * - LCD framebuffer
853 * - monitor code
854 * - board info struct
855 */
856 setup_dest_addr,
Simon Glassb56db482017-03-31 08:40:28 -0600857#if defined(CONFIG_LOGBUFFER)
Simon Glass1938f4a2013-03-11 06:49:53 +0000858 reserve_logbuffer,
859#endif
860#ifdef CONFIG_PRAM
861 reserve_pram,
862#endif
863 reserve_round_4k,
Simon Glass80d4bcd2017-03-31 08:40:29 -0600864#ifdef CONFIG_ARM
Simon Glass1938f4a2013-03-11 06:49:53 +0000865 reserve_mmu,
866#endif
Simon Glass5a541942016-01-18 19:52:21 -0700867 reserve_video,
Simon Glass8703ef32016-01-18 19:52:20 -0700868 reserve_trace,
Simon Glass1938f4a2013-03-11 06:49:53 +0000869 reserve_uboot,
870 reserve_malloc,
871 reserve_board,
Simon Glass1938f4a2013-03-11 06:49:53 +0000872 setup_machine,
873 reserve_global_data,
874 reserve_fdt,
Simon Glass25e7dc62017-05-22 05:05:30 -0600875 reserve_bootstage,
Simon Glass146251f2015-01-19 22:16:12 -0700876 reserve_arch,
Simon Glass1938f4a2013-03-11 06:49:53 +0000877 reserve_stacks,
Simon Glass76b00ac2017-03-31 08:40:32 -0600878 dram_init_banksize,
Simon Glass1938f4a2013-03-11 06:49:53 +0000879 show_dram_config,
Vladimir Zapolskiye2099d72016-11-28 00:15:24 +0200880#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
881 defined(CONFIG_SH)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000882 setup_board_part1,
Daniel Schwierzeckfb3db632015-11-01 17:36:13 +0100883#endif
884#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
Simon Glasse4fef6c2013-03-11 14:30:42 +0000885 INIT_FUNC_WATCHDOG_RESET
886 setup_board_part2,
887#endif
Simon Glass1938f4a2013-03-11 06:49:53 +0000888 display_new_sp,
mario.six@gdsys.cc2a792752017-02-22 16:07:22 +0100889#ifdef CONFIG_OF_BOARD_FIXUP
890 fix_fdt,
891#endif
Simon Glasse4fef6c2013-03-11 14:30:42 +0000892 INIT_FUNC_WATCHDOG_RESET
Simon Glass1938f4a2013-03-11 06:49:53 +0000893 reloc_fdt,
Simon Glass25e7dc62017-05-22 05:05:30 -0600894 reloc_bootstage,
Simon Glass1938f4a2013-03-11 06:49:53 +0000895 setup_reloc,
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300896#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass313aef32015-01-01 16:18:09 -0700897 copy_uboot_to_ram,
Simon Glass313aef32015-01-01 16:18:09 -0700898 do_elf_reloc_fixups,
Simon Glass6bda55a2017-01-16 07:03:52 -0700899 clear_bss,
Simon Glass313aef32015-01-01 16:18:09 -0700900#endif
Chris Zankelde5e5ce2016-08-10 18:36:43 +0300901#if defined(CONFIG_XTENSA)
902 clear_bss,
903#endif
Simon Glass530f27e2017-01-16 07:03:49 -0700904#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
905 !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000906 jump_to_copy,
907#endif
908 NULL,
909};
910
911void board_init_f(ulong boot_flags)
912{
York Sun2a1680e2014-05-02 17:28:04 -0700913#ifdef CONFIG_SYS_GENERIC_GLOBAL_DATA
914 /*
Robert P. J. Dayfc0b5942016-09-07 14:27:59 -0400915 * For some architectures, global data is initialized and used before
York Sun2a1680e2014-05-02 17:28:04 -0700916 * calling this function. The data should be preserved. For others,
917 * CONFIG_SYS_GENERIC_GLOBAL_DATA should be defined and use the stack
918 * here to host global data until relocation.
919 */
Simon Glass1938f4a2013-03-11 06:49:53 +0000920 gd_t data;
921
922 gd = &data;
923
David Fengcce6be72013-12-14 11:47:36 +0800924 /*
925 * Clear global data before it is accessed at debug print
926 * in initcall_run_list. Otherwise the debug print probably
Robert P. J. Dayfc0b5942016-09-07 14:27:59 -0400927 * get the wrong value of gd->have_console.
David Fengcce6be72013-12-14 11:47:36 +0800928 */
David Fengcce6be72013-12-14 11:47:36 +0800929 zero_global_data();
930#endif
931
Simon Glass1938f4a2013-03-11 06:49:53 +0000932 gd->flags = boot_flags;
Alexey Brodkin9aed5a22013-11-27 22:32:40 +0400933 gd->have_console = 0;
Simon Glass1938f4a2013-03-11 06:49:53 +0000934
935 if (initcall_run_list(init_sequence_f))
936 hang();
937
Ben Stoltz9b217492015-07-31 09:31:37 -0600938#if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
Simon Glass530f27e2017-01-16 07:03:49 -0700939 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64)
Simon Glass1938f4a2013-03-11 06:49:53 +0000940 /* NOTREACHED - jump_to_copy() does not return */
941 hang();
942#endif
943}
944
Alexey Brodkin3fb80162015-02-24 19:40:36 +0300945#if defined(CONFIG_X86) || defined(CONFIG_ARC)
Simon Glass48a33802013-03-05 14:39:52 +0000946/*
947 * For now this code is only used on x86.
948 *
949 * init_sequence_f_r is the list of init functions which are run when
950 * U-Boot is executing from Flash with a semi-limited 'C' environment.
951 * The following limitations must be considered when implementing an
952 * '_f_r' function:
953 * - 'static' variables are read-only
954 * - Global Data (gd->xxx) is read/write
955 *
956 * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
957 * supported). It _should_, if possible, copy global data to RAM and
958 * initialise the CPU caches (to speed up the relocation process)
959 *
960 * NOTE: At present only x86 uses this route, but it is intended that
961 * all archs will move to this when generic relocation is implemented.
962 */
Simon Glass4acff452017-01-16 07:03:50 -0700963static const init_fnc_t init_sequence_f_r[] = {
Simon Glass530f27e2017-01-16 07:03:49 -0700964#if !CONFIG_IS_ENABLED(X86_64)
Simon Glass48a33802013-03-05 14:39:52 +0000965 init_cache_f_r,
Simon Glass530f27e2017-01-16 07:03:49 -0700966#endif
Simon Glass48a33802013-03-05 14:39:52 +0000967
968 NULL,
969};
970
971void board_init_f_r(void)
972{
973 if (initcall_run_list(init_sequence_f_r))
974 hang();
975
976 /*
Simon Glasse4d6ab02016-03-11 22:06:51 -0700977 * The pre-relocation drivers may be using memory that has now gone
978 * away. Mark serial as unavailable - this will fall back to the debug
979 * UART if available.
980 */
981 gd->flags &= ~GD_FLG_SERIAL_READY;
982
983 /*
Simon Glass48a33802013-03-05 14:39:52 +0000984 * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
985 * Transfer execution from Flash to RAM by calculating the address
986 * of the in-RAM copy of board_init_r() and calling it
987 */
Alexey Brodkin7bf9f202015-02-25 17:59:02 +0300988 (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
Simon Glass48a33802013-03-05 14:39:52 +0000989
990 /* NOTREACHED - board_init_r() does not return */
991 hang();
992}
Alexey Brodkin5bcd19a2015-03-24 11:12:47 +0300993#endif /* CONFIG_X86 */