wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000 |
| 3 | * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com |
| 4 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <command.h> |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 10 | #if defined(CONFIG_8xx) |
| 11 | #include <mpc8xx.h> |
Niklaus Giger | 78d2a64 | 2009-10-04 20:04:21 +0200 | [diff] [blame] | 12 | #elif defined (CONFIG_4xx) |
| 13 | extern void ppc4xx_reginfo(void); |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 14 | #elif defined (CONFIG_5xx) |
| 15 | #include <mpc5xx.h> |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 16 | #elif defined (CONFIG_MPC5200) |
| 17 | #include <mpc5xxx.h> |
Becky Bruce | 4f93f8b | 2008-01-23 16:31:06 -0600 | [diff] [blame] | 18 | #elif defined (CONFIG_MPC86xx) |
| 19 | extern void mpc86xx_reginfo(void); |
Becky Bruce | 199e262 | 2010-06-17 11:37:25 -0500 | [diff] [blame] | 20 | #elif defined(CONFIG_MPC85xx) |
| 21 | extern void mpc85xx_reginfo(void); |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 22 | #endif |
Jon Loeliger | 65c450b | 2007-06-11 19:01:54 -0500 | [diff] [blame] | 23 | |
Kim Phillips | 088f1b1 | 2012-10-29 13:34:31 +0000 | [diff] [blame] | 24 | static int do_reginfo(cmd_tbl_t *cmdtp, int flag, int argc, |
| 25 | char * const argv[]) |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 26 | { |
| 27 | #if defined(CONFIG_8xx) |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 28 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 29 | volatile memctl8xx_t *memctl = &immap->im_memctl; |
| 30 | volatile sysconf8xx_t *sysconf = &immap->im_siu_conf; |
| 31 | volatile sit8xx_t *timers = &immap->im_sit; |
| 32 | |
| 33 | /* Hopefully more PowerPC knowledgable people will add code to display |
| 34 | * other useful registers |
| 35 | */ |
| 36 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 37 | printf ("\nSystem Configuration registers\n" |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 38 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 39 | "\tIMMR\t0x%08X\n", get_immr(0)); |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 40 | |
| 41 | printf("\tSIUMCR\t0x%08X", sysconf->sc_siumcr); |
| 42 | printf("\tSYPCR\t0x%08X\n",sysconf->sc_sypcr); |
| 43 | |
| 44 | printf("\tSWT\t0x%08X", sysconf->sc_swt); |
| 45 | printf("\tSWSR\t0x%04X\n", sysconf->sc_swsr); |
| 46 | |
| 47 | printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n", |
| 48 | sysconf->sc_sipend, sysconf->sc_simask); |
| 49 | printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n", |
| 50 | sysconf->sc_siel, sysconf->sc_sivec); |
| 51 | printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n", |
| 52 | sysconf->sc_tesr, sysconf->sc_sdcr); |
| 53 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 54 | printf ("Memory Controller Registers\n" |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 55 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 56 | "\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0); |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 57 | printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1); |
| 58 | printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2); |
| 59 | printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, memctl->memc_or3); |
| 60 | printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", memctl->memc_br4, memctl->memc_or4); |
| 61 | printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl->memc_br5, memctl->memc_or5); |
| 62 | printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl->memc_br6, memctl->memc_or6); |
| 63 | printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl->memc_br7, memctl->memc_or7); |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 64 | printf ("\n" |
| 65 | "\tmamr\t0x%08X\tmbmr\t0x%08X \n", |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 66 | memctl->memc_mamr, memctl->memc_mbmr ); |
| 67 | printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n", |
| 68 | memctl->memc_mstat, memctl->memc_mptpr ); |
| 69 | printf("\tmdr\t0x%08X \n", memctl->memc_mdr); |
| 70 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 71 | printf ("\nSystem Integration Timers\n" |
| 72 | "\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n", |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 73 | timers->sit_tbscr, timers->sit_rtcsc); |
| 74 | printf("\tPISCR\t0x%08X \n", timers->sit_piscr); |
| 75 | |
| 76 | /* |
| 77 | * May be some CPM info here? |
| 78 | */ |
| 79 | |
Niklaus Giger | 78d2a64 | 2009-10-04 20:04:21 +0200 | [diff] [blame] | 80 | #elif defined (CONFIG_4xx) |
| 81 | ppc4xx_reginfo(); |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 82 | #elif defined(CONFIG_5xx) |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 83 | |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 84 | volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR; |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 85 | volatile memctl5xx_t *memctl = &immap->im_memctl; |
| 86 | volatile sysconf5xx_t *sysconf = &immap->im_siu_conf; |
| 87 | volatile sit5xx_t *timers = &immap->im_sit; |
| 88 | volatile car5xx_t *car = &immap->im_clkrst; |
| 89 | volatile uimb5xx_t *uimb = &immap->im_uimb; |
| 90 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 91 | puts ("\nSystem Configuration registers\n"); |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 92 | printf("\tIMMR\t0x%08X\tSIUMCR\t0x%08X \n", get_immr(0), sysconf->sc_siumcr); |
| 93 | printf("\tSYPCR\t0x%08X\tSWSR\t0x%04X \n" ,sysconf->sc_sypcr, sysconf->sc_swsr); |
| 94 | printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X \n", sysconf->sc_sipend, sysconf->sc_simask); |
| 95 | printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X \n", sysconf->sc_siel, sysconf->sc_sivec); |
| 96 | printf("\tTESR\t0x%08X\n", sysconf->sc_tesr); |
| 97 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 98 | puts ("\nMemory Controller Registers\n"); |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 99 | printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0); |
| 100 | printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1); |
| 101 | printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2); |
| 102 | printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, memctl->memc_or3); |
| 103 | printf("\tDMBR\t0x%08X\tDMOR\t0x%08X \n", memctl->memc_dmbr, memctl->memc_dmor ); |
| 104 | printf("\tMSTAT\t0x%08X\n", memctl->memc_mstat); |
| 105 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 106 | puts ("\nSystem Integration Timers\n"); |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 107 | printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n", timers->sit_tbscr, timers->sit_rtcsc); |
| 108 | printf("\tPISCR\t0x%08X \n", timers->sit_piscr); |
| 109 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 110 | puts ("\nClocks and Reset\n"); |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 111 | printf("\tSCCR\t0x%08X\tPLPRCR\t0x%08X \n", car->car_sccr, car->car_plprcr); |
| 112 | |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 113 | puts ("\nU-Bus to IMB3 Bus Interface\n"); |
wdenk | 0db5bca | 2003-03-31 17:27:09 +0000 | [diff] [blame] | 114 | printf("\tUMCR\t0x%08X\tUIPEND\t0x%08X \n", uimb->uimb_umcr, uimb->uimb_uipend); |
wdenk | 4b9206e | 2004-03-23 22:14:11 +0000 | [diff] [blame] | 115 | puts ("\n\n"); |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 116 | |
| 117 | #elif defined(CONFIG_MPC5200) |
| 118 | puts ("\nMPC5200 registers\n"); |
Jean-Christophe PLAGNIOL-VILLARD | 6d0f6bc | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 119 | printf ("MBAR=%08x\n", CONFIG_SYS_MBAR); |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 120 | puts ("Memory map registers\n"); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 121 | printf ("\tCS0: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 122 | *(volatile ulong*)MPC5XXX_CS0_START, |
| 123 | *(volatile ulong*)MPC5XXX_CS0_STOP, |
| 124 | *(volatile ulong*)MPC5XXX_CS0_CFG, |
| 125 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x00010000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 126 | printf ("\tCS1: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 127 | *(volatile ulong*)MPC5XXX_CS1_START, |
| 128 | *(volatile ulong*)MPC5XXX_CS1_STOP, |
| 129 | *(volatile ulong*)MPC5XXX_CS1_CFG, |
| 130 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x00020000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 131 | printf ("\tCS2: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 132 | *(volatile ulong*)MPC5XXX_CS2_START, |
| 133 | *(volatile ulong*)MPC5XXX_CS2_STOP, |
| 134 | *(volatile ulong*)MPC5XXX_CS2_CFG, |
| 135 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x00040000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 136 | printf ("\tCS3: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 137 | *(volatile ulong*)MPC5XXX_CS3_START, |
| 138 | *(volatile ulong*)MPC5XXX_CS3_STOP, |
| 139 | *(volatile ulong*)MPC5XXX_CS3_CFG, |
| 140 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x00080000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 141 | printf ("\tCS4: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 142 | *(volatile ulong*)MPC5XXX_CS4_START, |
| 143 | *(volatile ulong*)MPC5XXX_CS4_STOP, |
| 144 | *(volatile ulong*)MPC5XXX_CS4_CFG, |
| 145 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x00100000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 146 | printf ("\tCS5: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 147 | *(volatile ulong*)MPC5XXX_CS5_START, |
| 148 | *(volatile ulong*)MPC5XXX_CS5_STOP, |
| 149 | *(volatile ulong*)MPC5XXX_CS5_CFG, |
| 150 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x00200000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 151 | printf ("\tCS6: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 152 | *(volatile ulong*)MPC5XXX_CS6_START, |
| 153 | *(volatile ulong*)MPC5XXX_CS6_STOP, |
| 154 | *(volatile ulong*)MPC5XXX_CS6_CFG, |
| 155 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x04000000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 156 | printf ("\tCS7: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 157 | *(volatile ulong*)MPC5XXX_CS7_START, |
| 158 | *(volatile ulong*)MPC5XXX_CS7_STOP, |
| 159 | *(volatile ulong*)MPC5XXX_CS7_CFG, |
| 160 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x08000000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 161 | printf ("\tBOOTCS: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 162 | *(volatile ulong*)MPC5XXX_BOOTCS_START, |
| 163 | *(volatile ulong*)MPC5XXX_BOOTCS_STOP, |
| 164 | *(volatile ulong*)MPC5XXX_BOOTCS_CFG, |
| 165 | (*(volatile ulong*)MPC5XXX_ADDECR & 0x02000000) ? 1 : 0); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 166 | printf ("\tSDRAMCS0: %08lX\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 167 | *(volatile ulong*)MPC5XXX_SDRAM_CS0CFG); |
Wolfgang Denk | 9b55a25 | 2008-07-11 01:16:00 +0200 | [diff] [blame] | 168 | printf ("\tSDRAMCS1: %08lX\n", |
wdenk | 56523f1 | 2004-07-11 17:40:54 +0000 | [diff] [blame] | 169 | *(volatile ulong*)MPC5XXX_SDRAM_CS1CFG); |
Becky Bruce | 4f93f8b | 2008-01-23 16:31:06 -0600 | [diff] [blame] | 170 | #elif defined(CONFIG_MPC86xx) |
| 171 | mpc86xx_reginfo(); |
Mike Frysinger | 97c26e0 | 2008-02-04 19:26:56 -0500 | [diff] [blame] | 172 | |
Becky Bruce | 199e262 | 2010-06-17 11:37:25 -0500 | [diff] [blame] | 173 | #elif defined(CONFIG_MPC85xx) |
| 174 | mpc85xx_reginfo(); |
Sonic Zhang | a2979dc | 2012-08-16 11:56:14 +0800 | [diff] [blame] | 175 | #endif |
Becky Bruce | 4f93f8b | 2008-01-23 16:31:06 -0600 | [diff] [blame] | 176 | |
wdenk | e887afc | 2002-08-27 09:44:07 +0000 | [diff] [blame] | 177 | return 0; |
| 178 | } |
| 179 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 180 | /**************************************************/ |
| 181 | |
Mike Frysinger | 97c26e0 | 2008-02-04 19:26:56 -0500 | [diff] [blame] | 182 | #if defined(CONFIG_CMD_REGINFO) |
wdenk | 0d49839 | 2003-07-01 21:06:45 +0000 | [diff] [blame] | 183 | U_BOOT_CMD( |
Wolfgang Denk | 53677ef | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 184 | reginfo, 2, 1, do_reginfo, |
Peter Tyser | 2fb2604 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 185 | "print register information", |
Wolfgang Denk | a89c33d | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 186 | "" |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 187 | ); |
| 188 | #endif |