blob: 3c263e51c160f6134b8e166dd82c51b9095b5909 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +09002/*
3 * R8A66597 HCD (Host Controller Driver) for u-boot
4 *
5 * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +09006 */
7
8#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -07009#include <console.h>
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090010#include <usb.h>
11#include <asm/io.h>
Chris Brandt243fd642017-11-29 14:49:21 -050012#include <linux/iopoll.h>
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090013
14#include "r8a66597.h"
15
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090016#ifdef R8A66597_DEBUG
17#define R8A66597_DPRINT printf
18#else
19#define R8A66597_DPRINT(...)
20#endif
21
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090022static struct r8a66597 gr8a66597;
23
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +090024static void get_hub_data(struct usb_device *dev, u16 *hub_devnum, u16 *hubport)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090025{
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +090026 int i;
27
28 *hub_devnum = 0;
29 *hubport = 0;
30
31 /* check a device connected to root_hub */
32 if ((dev->parent && dev->parent->devnum == 1) ||
33 (dev->devnum == 1))
34 return;
35
36 for (i = 0; i < USB_MAXCHILDREN; i++) {
37 if (dev->parent->children[i] == dev) {
38 *hub_devnum = (u8)dev->parent->devnum;
39 *hubport = i;
40 return;
41 }
42 }
43
44 printf("get_hub_data error.\n");
45}
46
47static void set_devadd(struct r8a66597 *r8a66597, u8 r8a66597_address,
48 struct usb_device *dev, int port)
49{
50 u16 val, usbspd, upphub, hubport;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090051 unsigned long devadd_reg = get_devadd_addr(r8a66597_address);
52
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +090053 get_hub_data(dev, &upphub, &hubport);
54 usbspd = r8a66597->speed;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090055 val = (upphub << 11) | (hubport << 8) | (usbspd << 6) | (port & 0x0001);
56 r8a66597_write(r8a66597, val, devadd_reg);
57}
58
59static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
60{
61 u16 tmp;
62 int i = 0;
63
64#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
65 do {
66 r8a66597_write(r8a66597, SCKE, SYSCFG0);
67 tmp = r8a66597_read(r8a66597, SYSCFG0);
68 if (i++ > 1000) {
69 printf("register access fail.\n");
70 return -1;
71 }
72 } while ((tmp & SCKE) != SCKE);
73 r8a66597_write(r8a66597, 0x04, 0x02);
74#else
75 do {
76 r8a66597_write(r8a66597, USBE, SYSCFG0);
77 tmp = r8a66597_read(r8a66597, SYSCFG0);
78 if (i++ > 1000) {
79 printf("register access fail.\n");
80 return -1;
81 }
82 } while ((tmp & USBE) != USBE);
83 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
Chris Brandt11f46782017-11-27 14:04:10 -050084#if !defined(CONFIG_RZA_USB)
Nobuhiro Iwamatsu9d034202012-03-20 20:23:29 +000085 r8a66597_mdfy(r8a66597, CONFIG_R8A66597_XTAL, XTAL, SYSCFG0);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +090086
87 i = 0;
88 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
89 do {
90 udelay(1000);
91 tmp = r8a66597_read(r8a66597, SYSCFG0);
92 if (i++ > 500) {
93 printf("register access fail.\n");
94 return -1;
95 }
96 } while ((tmp & SCKE) != SCKE);
Chris Brandt11f46782017-11-27 14:04:10 -050097#else
98 /*
99 * RZ/A Only:
100 * Bits XTAL(UCKSEL) and UPLLE in SYSCFG0 for USB0 controls both USB0
101 * and USB1, so we must always set the USB0 register
102 */
103#if (CONFIG_R8A66597_XTAL == 1)
104 setbits(le16, R8A66597_BASE0, XTAL);
105#endif
106 mdelay(1);
107 setbits(le16, R8A66597_BASE0, UPLLE);
108 mdelay(1);
109 r8a66597_bset(r8a66597, SUSPM, SUSPMODE0);
110#endif /* CONFIG_RZA_USB */
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900111#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
112
113 return 0;
114}
115
116static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
117{
Chris Brandt11f46782017-11-27 14:04:10 -0500118#if !defined(CONFIG_RZA_USB)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900119 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
120 udelay(1);
121#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
122 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
123 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
124 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
125#endif
Chris Brandt11f46782017-11-27 14:04:10 -0500126#else
127 r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0);
128
129 clrbits(le16, R8A66597_BASE0, UPLLE);
130 mdelay(1);
131 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
132 mdelay(1);
133
134#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900135}
136
137static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
138{
139 u16 val;
140
141 val = port ? DRPD : DCFM | DRPD;
142 r8a66597_bset(r8a66597, val, get_syscfg_reg(port));
143 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
144
Chris Brandt11f46782017-11-27 14:04:10 -0500145#if !defined(CONFIG_RZA_USB)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900146 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR, get_dmacfg_reg(port));
Chris Brandt11f46782017-11-27 14:04:10 -0500147#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900148}
149
150static void r8a66597_disable_port(struct r8a66597 *r8a66597, int port)
151{
152 u16 val, tmp;
153
154 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
155 r8a66597_write(r8a66597, 0, get_intsts_reg(port));
156
157 r8a66597_port_power(r8a66597, port, 0);
158
159 do {
160 tmp = r8a66597_read(r8a66597, SOFCFG) & EDGESTS;
161 udelay(640);
162 } while (tmp == EDGESTS);
163
164 val = port ? DRPD : DCFM | DRPD;
165 r8a66597_bclr(r8a66597, val, get_syscfg_reg(port));
166 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
167}
168
169static int enable_controller(struct r8a66597 *r8a66597)
170{
171 int ret, port;
172
173 ret = r8a66597_clock_enable(r8a66597);
174 if (ret < 0)
175 return ret;
176
Chris Brandt11f46782017-11-27 14:04:10 -0500177#if !defined(CONFIG_RZA_USB)
Nobuhiro Iwamatsu9d034202012-03-20 20:23:29 +0000178 r8a66597_bset(r8a66597, CONFIG_R8A66597_LDRV & LDRV, PINCFG);
Chris Brandt11f46782017-11-27 14:04:10 -0500179#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900180 r8a66597_bset(r8a66597, USBE, SYSCFG0);
181
182 r8a66597_bset(r8a66597, INTL, SOFCFG);
183 r8a66597_write(r8a66597, 0, INTENB0);
yasuhisa umano8ecdce72014-04-18 11:33:08 +0900184 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
185 r8a66597_write(r8a66597, 0, get_intenb_reg(port));
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900186
Nobuhiro Iwamatsu9d034202012-03-20 20:23:29 +0000187 r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, CFIFOSEL);
188 r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D0FIFOSEL);
189 r8a66597_bset(r8a66597, CONFIG_R8A66597_ENDIAN & BIGEND, D1FIFOSEL);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900190 r8a66597_bset(r8a66597, TRNENSEL, SOFCFG);
191
192 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++)
193 r8a66597_enable_port(r8a66597, port);
194
195 return 0;
196}
197
198static void disable_controller(struct r8a66597 *r8a66597)
199{
200 int i;
201
202 if (!(r8a66597_read(r8a66597, SYSCFG0) & USBE))
203 return;
204
205 r8a66597_write(r8a66597, 0, INTENB0);
206 r8a66597_write(r8a66597, 0, INTSTS0);
207
208 r8a66597_write(r8a66597, 0, D0FIFOSEL);
209 r8a66597_write(r8a66597, 0, D1FIFOSEL);
210 r8a66597_write(r8a66597, 0, DCPCFG);
211 r8a66597_write(r8a66597, 0x40, DCPMAXP);
212 r8a66597_write(r8a66597, 0, DCPCTR);
213
214 for (i = 0; i <= 10; i++)
215 r8a66597_write(r8a66597, 0, get_devadd_addr(i));
216 for (i = 1; i <= 5; i++) {
217 r8a66597_write(r8a66597, 0, get_pipetre_addr(i));
218 r8a66597_write(r8a66597, 0, get_pipetrn_addr(i));
219 }
220 for (i = 1; i < R8A66597_MAX_NUM_PIPE; i++) {
221 r8a66597_write(r8a66597, 0, get_pipectr_addr(i));
222 r8a66597_write(r8a66597, i, PIPESEL);
223 r8a66597_write(r8a66597, 0, PIPECFG);
224 r8a66597_write(r8a66597, 0, PIPEBUF);
225 r8a66597_write(r8a66597, 0, PIPEMAXP);
226 r8a66597_write(r8a66597, 0, PIPEPERI);
227 }
228
229 for (i = 0; i < R8A66597_MAX_ROOT_HUB; i++)
230 r8a66597_disable_port(r8a66597, i);
231
232 r8a66597_clock_disable(r8a66597);
233}
234
235static void r8a66597_reg_wait(struct r8a66597 *r8a66597, unsigned long reg,
236 u16 mask, u16 loop)
237{
238 u16 tmp;
239 int i = 0;
240
241 do {
242 tmp = r8a66597_read(r8a66597, reg);
243 if (i++ > 1000000) {
244 printf("register%lx, loop %x is timeout\n", reg, loop);
245 break;
246 }
247 } while ((tmp & mask) != loop);
248}
249
250static void pipe_buffer_setting(struct r8a66597 *r8a66597,
251 struct usb_device *dev, unsigned long pipe)
252{
253 u16 val = 0;
254 u16 pipenum, bufnum, maxpacket;
255
256 if (usb_pipein(pipe)) {
257 pipenum = BULK_IN_PIPENUM;
258 bufnum = BULK_IN_BUFNUM;
259 maxpacket = dev->epmaxpacketin[usb_pipeendpoint(pipe)];
260 } else {
261 pipenum = BULK_OUT_PIPENUM;
262 bufnum = BULK_OUT_BUFNUM;
263 maxpacket = dev->epmaxpacketout[usb_pipeendpoint(pipe)];
264 }
265
266 if (r8a66597->pipe_config & (1 << pipenum))
267 return;
268 r8a66597->pipe_config |= (1 << pipenum);
269
270 r8a66597_bset(r8a66597, ACLRM, get_pipectr_addr(pipenum));
271 r8a66597_bclr(r8a66597, ACLRM, get_pipectr_addr(pipenum));
272 r8a66597_write(r8a66597, pipenum, PIPESEL);
273
274 /* FIXME: This driver support bulk transfer only. */
275 if (!usb_pipein(pipe))
276 val |= R8A66597_DIR;
277 else
278 val |= R8A66597_SHTNAK;
279 val |= R8A66597_BULK | R8A66597_DBLB | usb_pipeendpoint(pipe);
280 r8a66597_write(r8a66597, val, PIPECFG);
281
282 r8a66597_write(r8a66597, (8 << 10) | bufnum, PIPEBUF);
283 r8a66597_write(r8a66597, make_devsel(usb_pipedevice(pipe)) |
284 maxpacket, PIPEMAXP);
285 r8a66597_write(r8a66597, 0, PIPEPERI);
286 r8a66597_write(r8a66597, SQCLR, get_pipectr_addr(pipenum));
287}
288
289static int send_setup_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
290 struct devrequest *setup)
291{
292 int i;
293 unsigned short *p = (unsigned short *)setup;
294 unsigned long setup_addr = USBREQ;
295 u16 intsts1;
296 int timeout = 3000;
Chris Brandt11f46782017-11-27 14:04:10 -0500297#if defined(CONFIG_RZA_USB)
298 u16 dcpctr;
Chris Brandt11f46782017-11-27 14:04:10 -0500299#endif
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900300 u16 devsel = setup->request == USB_REQ_SET_ADDRESS ? 0 : dev->devnum;
301
302 r8a66597_write(r8a66597, make_devsel(devsel) |
303 (8 << dev->maxpacketsize), DCPMAXP);
304 r8a66597_write(r8a66597, ~(SIGN | SACK), INTSTS1);
305
Chris Brandt11f46782017-11-27 14:04:10 -0500306#if defined(CONFIG_RZA_USB)
307 dcpctr = r8a66597_read(r8a66597, DCPCTR);
308 if ((dcpctr & PID) == PID_BUF) {
Chris Brandt243fd642017-11-29 14:49:21 -0500309 if (readw_poll_timeout(r8a66597->reg + DCPCTR, dcpctr,
310 dcpctr & BSTS, 1000) < 0) {
311 printf("DCPCTR BSTS timeout!\n");
312 return -ETIMEDOUT;
Chris Brandt11f46782017-11-27 14:04:10 -0500313 }
314 }
315#endif
316
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900317 for (i = 0; i < 4; i++) {
318 r8a66597_write(r8a66597, le16_to_cpu(p[i]), setup_addr);
319 setup_addr += 2;
320 }
321 r8a66597_write(r8a66597, ~0x0001, BRDYSTS);
322 r8a66597_write(r8a66597, SUREQ, DCPCTR);
323
324 while (1) {
325 intsts1 = r8a66597_read(r8a66597, INTSTS1);
326 if (intsts1 & SACK)
327 break;
328 if (intsts1 & SIGN) {
329 printf("setup packet send error\n");
330 return -1;
331 }
332 if (timeout-- < 0) {
333 printf("setup packet timeout\n");
334 return -1;
335 }
336 udelay(500);
337 }
338
339 return 0;
340}
341
342static int send_bulk_packet(struct r8a66597 *r8a66597, struct usb_device *dev,
343 unsigned long pipe, void *buffer, int transfer_len)
344{
345 u16 tmp, bufsize;
346 u16 *buf;
347 size_t size;
348
349 R8A66597_DPRINT("%s\n", __func__);
350
351 r8a66597_mdfy(r8a66597, MBW | BULK_OUT_PIPENUM,
352 MBW | CURPIPE, CFIFOSEL);
353 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, BULK_OUT_PIPENUM);
354 tmp = r8a66597_read(r8a66597, CFIFOCTR);
355 if ((tmp & FRDY) == 0) {
356 printf("%s FRDY is not set (%x)\n", __func__, tmp);
357 return -1;
358 }
359
360 /* prepare parameters */
361 bufsize = dev->epmaxpacketout[usb_pipeendpoint(pipe)];
362 buf = (u16 *)(buffer + dev->act_len);
363 size = min((int)bufsize, transfer_len - dev->act_len);
364
365 /* write fifo */
366 r8a66597_write(r8a66597, ~(1 << BULK_OUT_PIPENUM), BEMPSTS);
367 if (buffer) {
368 r8a66597_write_fifo(r8a66597, CFIFO, buf, size);
369 r8a66597_write(r8a66597, BVAL, CFIFOCTR);
370 }
371
372 /* update parameters */
373 dev->act_len += size;
374
375 r8a66597_mdfy(r8a66597, PID_BUF, PID,
376 get_pipectr_addr(BULK_OUT_PIPENUM));
377
378 while (!(r8a66597_read(r8a66597, BEMPSTS) & (1 << BULK_OUT_PIPENUM)))
379 if (ctrlc())
380 return -1;
381 r8a66597_write(r8a66597, ~(1 << BULK_OUT_PIPENUM), BEMPSTS);
382
383 if (dev->act_len >= transfer_len)
384 r8a66597_mdfy(r8a66597, PID_NAK, PID,
385 get_pipectr_addr(BULK_OUT_PIPENUM));
386
387 return 0;
388}
389
390static int receive_bulk_packet(struct r8a66597 *r8a66597,
391 struct usb_device *dev,
392 unsigned long pipe,
393 void *buffer, int transfer_len)
394{
395 u16 tmp;
396 u16 *buf;
397 const u16 pipenum = BULK_IN_PIPENUM;
398 int rcv_len;
399 int maxpacket = dev->epmaxpacketin[usb_pipeendpoint(pipe)];
400
401 R8A66597_DPRINT("%s\n", __func__);
402
403 /* prepare */
404 if (dev->act_len == 0) {
405 r8a66597_mdfy(r8a66597, PID_NAK, PID,
406 get_pipectr_addr(pipenum));
407 r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
408
409 r8a66597_write(r8a66597, TRCLR, get_pipetre_addr(pipenum));
410 r8a66597_write(r8a66597,
411 (transfer_len + maxpacket - 1) / maxpacket,
412 get_pipetrn_addr(pipenum));
413 r8a66597_bset(r8a66597, TRENB, get_pipetre_addr(pipenum));
414
415 r8a66597_mdfy(r8a66597, PID_BUF, PID,
416 get_pipectr_addr(pipenum));
417 }
418
419 r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL);
420 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
421
422 while (!(r8a66597_read(r8a66597, BRDYSTS) & (1 << pipenum)))
423 if (ctrlc())
424 return -1;
425 r8a66597_write(r8a66597, ~(1 << pipenum), BRDYSTS);
426
427 tmp = r8a66597_read(r8a66597, CFIFOCTR);
428 if ((tmp & FRDY) == 0) {
429 printf("%s FRDY is not set. (%x)\n", __func__, tmp);
430 return -1;
431 }
432
433 buf = (u16 *)(buffer + dev->act_len);
434 rcv_len = tmp & DTLN;
435 dev->act_len += rcv_len;
436
437 if (buffer) {
438 if (rcv_len == 0)
439 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
440 else
441 r8a66597_read_fifo(r8a66597, CFIFO, buf, rcv_len);
442 }
443
444 return 0;
445}
446
447static int receive_control_packet(struct r8a66597 *r8a66597,
448 struct usb_device *dev,
449 void *buffer, int transfer_len)
450{
451 u16 tmp;
452 int rcv_len;
453
454 /* FIXME: limit transfer size : 64byte or less */
455
456 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
457 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
458 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
459 r8a66597_bset(r8a66597, SQSET, DCPCTR);
460 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
461 r8a66597_mdfy(r8a66597, PID_BUF, PID, DCPCTR);
462
463 while (!(r8a66597_read(r8a66597, BRDYSTS) & 0x0001))
464 if (ctrlc())
465 return -1;
466 r8a66597_write(r8a66597, ~0x0001, BRDYSTS);
467
468 r8a66597_mdfy(r8a66597, MBW, MBW | CURPIPE, CFIFOSEL);
469 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
470
471 tmp = r8a66597_read(r8a66597, CFIFOCTR);
472 if ((tmp & FRDY) == 0) {
473 printf("%s FRDY is not set. (%x)\n", __func__, tmp);
474 return -1;
475 }
476
477 rcv_len = tmp & DTLN;
478 dev->act_len += rcv_len;
479
480 r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
481
482 if (buffer) {
483 if (rcv_len == 0)
484 r8a66597_write(r8a66597, BCLR, DCPCTR);
485 else
486 r8a66597_read_fifo(r8a66597, CFIFO, buffer, rcv_len);
487 }
488
489 return 0;
490}
491
492static int send_status_packet(struct r8a66597 *r8a66597,
493 unsigned long pipe)
494{
495 r8a66597_bset(r8a66597, SQSET, DCPCTR);
496 r8a66597_mdfy(r8a66597, PID_NAK, PID, DCPCTR);
497
498 if (usb_pipein(pipe)) {
499 r8a66597_bset(r8a66597, R8A66597_DIR, DCPCFG);
500 r8a66597_mdfy(r8a66597, ISEL, ISEL | CURPIPE, CFIFOSEL);
501 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
502 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
503 r8a66597_write(r8a66597, BCLR | BVAL, CFIFOCTR);
504 } else {
505 r8a66597_bclr(r8a66597, R8A66597_DIR, DCPCFG);
506 r8a66597_mdfy(r8a66597, 0, ISEL | CURPIPE, CFIFOSEL);
507 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, 0);
508 r8a66597_write(r8a66597, BCLR, CFIFOCTR);
509 }
510 r8a66597_mdfy(r8a66597, PID_BUF, PID, DCPCTR);
511
512 while (!(r8a66597_read(r8a66597, BEMPSTS) & 0x0001))
513 if (ctrlc())
514 return -1;
515
516 return 0;
517}
518
519static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port)
520{
521 int count = R8A66597_MAX_SAMPLING;
522 unsigned short syssts, old_syssts;
523
524 R8A66597_DPRINT("%s\n", __func__);
525
526 old_syssts = r8a66597_read(r8a66597, get_syssts_reg(port) & LNST);
527 while (count > 0) {
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000528 mdelay(R8A66597_RH_POLL_TIME);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900529
530 syssts = r8a66597_read(r8a66597, get_syssts_reg(port) & LNST);
531 if (syssts == old_syssts) {
532 count--;
533 } else {
534 count = R8A66597_MAX_SAMPLING;
535 old_syssts = syssts;
536 }
537 }
538}
539
540static void r8a66597_bus_reset(struct r8a66597 *r8a66597, int port)
541{
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000542 mdelay(10);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900543 r8a66597_mdfy(r8a66597, USBRST, USBRST | UACT, get_dvstctr_reg(port));
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000544 mdelay(50);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900545 r8a66597_mdfy(r8a66597, UACT, USBRST | UACT, get_dvstctr_reg(port));
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000546 mdelay(50);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900547}
548
549static int check_usb_device_connecting(struct r8a66597 *r8a66597)
550{
551 int timeout = 10000; /* 100usec * 10000 = 1sec */
552 int i;
553
554 for (i = 0; i < 5; i++) {
555 /* check a usb cable connect */
556 while (!(r8a66597_read(r8a66597, INTSTS1) & ATTCH)) {
557 if (timeout-- < 0) {
558 printf("%s timeout.\n", __func__);
559 return -1;
560 }
561 udelay(100);
562 }
563
564 /* check a data line */
565 r8a66597_check_syssts(r8a66597, 0);
566
567 r8a66597_bus_reset(r8a66597, 0);
568 r8a66597->speed = get_rh_usb_speed(r8a66597, 0);
569
570 if (!(r8a66597_read(r8a66597, INTSTS1) & DTCH)) {
571 r8a66597->port_change = USB_PORT_STAT_C_CONNECTION;
572 r8a66597->port_status = USB_PORT_STAT_CONNECTION |
573 USB_PORT_STAT_ENABLE;
574 return 0; /* success */
575 }
576
577 R8A66597_DPRINT("USB device has detached. retry = %d\n", i);
578 r8a66597_write(r8a66597, ~DTCH, INTSTS1);
579 }
580
581 return -1; /* fail */
582}
583
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900584/*-------------------------------------------------------------------------*
585 * Virtual Root Hub
586 *-------------------------------------------------------------------------*/
587
Stephen Warreneb838e72014-02-13 21:15:18 -0700588#include <usbroothubdes.h>
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900589
590static int r8a66597_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
591 void *buffer, int transfer_len, struct devrequest *cmd)
592{
593 struct r8a66597 *r8a66597 = &gr8a66597;
594 int leni = transfer_len;
595 int len = 0;
596 int stat = 0;
597 __u16 bmRType_bReq;
598 __u16 wValue;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900599 __u16 wLength;
600 unsigned char data[32];
601
602 R8A66597_DPRINT("%s\n", __func__);
603
Remy Bohmer9dbc3662008-10-10 10:23:22 +0200604 if (usb_pipeint(pipe)) {
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900605 printf("Root-Hub submit IRQ: NOT implemented");
606 return 0;
607 }
608
609 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
610 wValue = cpu_to_le16 (cmd->value);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900611 wLength = cpu_to_le16 (cmd->length);
612
613 switch (bmRType_bReq) {
614 case RH_GET_STATUS:
615 *(__u16 *)buffer = cpu_to_le16(1);
616 len = 2;
617 break;
618 case RH_GET_STATUS | RH_INTERFACE:
619 *(__u16 *)buffer = cpu_to_le16(0);
620 len = 2;
621 break;
622 case RH_GET_STATUS | RH_ENDPOINT:
623 *(__u16 *)buffer = cpu_to_le16(0);
624 len = 2;
625 break;
626 case RH_GET_STATUS | RH_CLASS:
627 *(__u32 *)buffer = cpu_to_le32(0);
628 len = 4;
629 break;
630 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
631 *(__u32 *)buffer = cpu_to_le32(r8a66597->port_status |
632 (r8a66597->port_change << 16));
633 len = 4;
634 break;
635 case RH_CLEAR_FEATURE | RH_ENDPOINT:
636 case RH_CLEAR_FEATURE | RH_CLASS:
637 break;
638
639 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
640 switch (wValue) {
641 case RH_C_PORT_CONNECTION:
642 r8a66597->port_change &= ~USB_PORT_STAT_C_CONNECTION;
643 break;
644 }
645 break;
646
647 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
648 switch (wValue) {
649 case (RH_PORT_SUSPEND):
650 break;
651 case (RH_PORT_RESET):
652 r8a66597_bus_reset(r8a66597, 0);
653 break;
654 case (RH_PORT_POWER):
655 break;
656 case (RH_PORT_ENABLE):
657 break;
658 }
659 break;
660 case RH_SET_ADDRESS:
661 gr8a66597.rh_devnum = wValue;
662 break;
663 case RH_GET_DESCRIPTOR:
664 switch ((wValue & 0xff00) >> 8) {
665 case (0x01): /* device descriptor */
666 len = min_t(unsigned int,
667 leni,
668 min_t(unsigned int,
669 sizeof(root_hub_dev_des),
670 wLength));
671 memcpy(buffer, root_hub_dev_des, len);
672 break;
673 case (0x02): /* configuration descriptor */
674 len = min_t(unsigned int,
675 leni,
676 min_t(unsigned int,
677 sizeof(root_hub_config_des),
678 wLength));
679 memcpy(buffer, root_hub_config_des, len);
680 break;
681 case (0x03): /* string descriptors */
682 if (wValue == 0x0300) {
683 len = min_t(unsigned int,
684 leni,
685 min_t(unsigned int,
686 sizeof(root_hub_str_index0),
687 wLength));
688 memcpy(buffer, root_hub_str_index0, len);
689 }
690 if (wValue == 0x0301) {
691 len = min_t(unsigned int,
692 leni,
693 min_t(unsigned int,
694 sizeof(root_hub_str_index1),
695 wLength));
696 memcpy(buffer, root_hub_str_index1, len);
697 }
698 break;
699 default:
700 stat = USB_ST_STALLED;
701 }
702 break;
703
704 case RH_GET_DESCRIPTOR | RH_CLASS:
705 {
706 __u32 temp = 0x00000001;
707
708 data[0] = 9; /* min length; */
709 data[1] = 0x29;
710 data[2] = temp & RH_A_NDP;
711 data[3] = 0;
712 if (temp & RH_A_PSM)
713 data[3] |= 0x1;
714 if (temp & RH_A_NOCP)
715 data[3] |= 0x10;
716 else if (temp & RH_A_OCPM)
717 data[3] |= 0x8;
718
719 /* corresponds to data[4-7] */
720 data[5] = (temp & RH_A_POTPGT) >> 24;
721 data[7] = temp & RH_B_DR;
722 if (data[2] < 7) {
723 data[8] = 0xff;
724 } else {
725 data[0] += 2;
726 data[8] = (temp & RH_B_DR) >> 8;
727 data[10] = data[9] = 0xff;
728 }
729
730 len = min_t(unsigned int, leni,
731 min_t(unsigned int, data[0], wLength));
732 memcpy(buffer, data, len);
733 break;
734 }
735
736 case RH_GET_CONFIGURATION:
737 *(__u8 *) buffer = 0x01;
738 len = 1;
739 break;
740 case RH_SET_CONFIGURATION:
741 break;
742 default:
Nobuhiro Iwamatsue58c41e2008-09-18 20:13:08 +0900743 R8A66597_DPRINT("unsupported root hub command");
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900744 stat = USB_ST_STALLED;
745 }
746
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000747 mdelay(1);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900748
749 len = min_t(int, len, leni);
750
751 dev->act_len = len;
752 dev->status = stat;
753
754 return stat;
755}
756
757int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
758 int transfer_len)
759{
760 struct r8a66597 *r8a66597 = &gr8a66597;
761 int ret = 0;
762
763 R8A66597_DPRINT("%s\n", __func__);
764 R8A66597_DPRINT("pipe = %08x, buffer = %p, len = %d, devnum = %d\n",
765 pipe, buffer, transfer_len, dev->devnum);
766
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +0900767 set_devadd(r8a66597, dev->devnum, dev, 0);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900768
769 pipe_buffer_setting(r8a66597, dev, pipe);
770
771 dev->act_len = 0;
772 while (dev->act_len < transfer_len && ret == 0) {
773 if (ctrlc())
774 return -1;
775
776 if (usb_pipein(pipe))
777 ret = receive_bulk_packet(r8a66597, dev, pipe, buffer,
778 transfer_len);
779 else
780 ret = send_bulk_packet(r8a66597, dev, pipe, buffer,
781 transfer_len);
782 }
783
784 if (ret == 0)
785 dev->status = 0;
786
787 return ret;
788}
789
790int submit_control_msg(struct usb_device *dev, unsigned long pipe,
791 void *buffer, int transfer_len, struct devrequest *setup)
792{
793 struct r8a66597 *r8a66597 = &gr8a66597;
794 u16 r8a66597_address = setup->request == USB_REQ_SET_ADDRESS ?
795 0 : dev->devnum;
796
797 R8A66597_DPRINT("%s\n", __func__);
798 if (usb_pipedevice(pipe) == r8a66597->rh_devnum)
799 return r8a66597_submit_rh_msg(dev, pipe, buffer, transfer_len,
800 setup);
801
802 R8A66597_DPRINT("%s: setup\n", __func__);
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +0900803 set_devadd(r8a66597, r8a66597_address, dev, 0);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900804
805 if (send_setup_packet(r8a66597, dev, setup) < 0) {
806 printf("setup packet send error\n");
807 return -1;
808 }
809
Yoshihiro Shimoda60ece6d2008-10-29 20:05:18 +0900810 dev->act_len = 0;
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900811 if (usb_pipein(pipe))
812 if (receive_control_packet(r8a66597, dev, buffer,
813 transfer_len) < 0)
814 return -1;
815
816 if (send_status_packet(r8a66597, pipe) < 0)
817 return -1;
818
819 dev->status = 0;
820
821 return 0;
822}
823
824int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
825 int transfer_len, int interval)
826{
827 /* no implement */
828 R8A66597_DPRINT("%s\n", __func__);
829 return 0;
830}
831
Troy Kisky06d513e2013-10-10 15:27:56 -0700832int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900833{
834 struct r8a66597 *r8a66597 = &gr8a66597;
835
836 R8A66597_DPRINT("%s\n", __func__);
837
Yasuhisa Umano198c5f92014-04-18 11:33:15 +0900838 memset(r8a66597, 0, sizeof(*r8a66597));
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900839 r8a66597->reg = CONFIG_R8A66597_BASE_ADDR;
840
841 disable_controller(r8a66597);
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000842 mdelay(100);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900843
844 enable_controller(r8a66597);
845 r8a66597_port_power(r8a66597, 0 , 1);
846
847 /* check usb device */
848 check_usb_device_connecting(r8a66597);
849
Mike Frysinger5b84dd62012-03-05 13:47:00 +0000850 mdelay(50);
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900851
852 return 0;
853}
854
Lucas Stachc7e3b2b2012-09-26 00:14:34 +0200855int usb_lowlevel_stop(int index)
Yoshihiro Shimodafd0f2f32008-07-09 21:07:38 +0900856{
857 disable_controller(&gr8a66597);
858
859 return 0;
860}