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Tom Rini83d290c2018-05-06 17:58:06 -04001SPDX-License-Identifier: GPL-2.0+
Jens Scharsig50217de2009-07-24 10:09:02 +02002/*
3 * (C) Copyright 2008-2009
4 * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de>
5 * Jens Scharsig <esw@bus-elektronik.de>
Jens Scharsig50217de2009-07-24 10:09:02 +02006 */
7
8U-Boot vcxk video controller driver
9======================================
10
11By defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and
12VC8K devices on following boards:
13
14board | ARCH | Vendor
15-----------------------------------------------------------------------
16EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG
17EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG
18EB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG
19ZLSA | AT91RM9200 | Ruf Telematik AG
20
21Driver configuration
22--------------------
23
24The driver needs some defines to describe the target hardware:
25
26CONFIG_SYS_VCXK_BASE
27
28 base address of VCxK hardware memory
29
30CONFIG_SYS_VCXK_DEFAULT_LINEALIGN
31
32 defines the physical alignment of a pixel row
33
34CONFIG_SYS_VCXK_DOUBLEBUFFERED
35
36 some boards that use vcxk prevent read from framebuffer memory.
37 define this option to enable double buffering (needs 16KiB RAM)
38
39CONFIG_SYS_VCXK_<xxxx>_PIN
40
41 defines the number of the I/O line PIN in the port
42 valid values for <xxxx> are:
43
44 ACKNOWLEDGE
45 describes the acknowledge line from vcxk hardware
46
47 ENABLE
48 describes the enable line to vcxk hardware
49
50 INVERT
51 describes the invert line to vcxk hardware
52
53 RESET
54 describes the reset line to vcxk hardware
55
56 REQUEST
57 describes the request line to vcxk hardware
58
59CONFIG_SYS_VCXK_<xxxx>_PORT
60
61 defines the I/O port which is connected with the line
62 for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN
63
64CONFIG_SYS_VCXK_<xxxx>_DDR
65
66 defines the register which configures the direction
67 for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN