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Masahiro Yamada0b11dbf2015-07-26 02:46:26 +09001#
2# I2C subsystem configuration
3#
4
Simon Glass59e11eb2021-07-10 21:14:35 -06005menuconfig I2C
6 bool "I2C support"
7 default y
8 help
9 Note:
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
14
15 So at present there is no need to ever disable this option.
16
17 Eventually it will:
18
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
26
27if I2C
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +090028
Masahiro Yamadab6036bc2015-01-13 12:44:35 +090029config DM_I2C
30 bool "Enable Driver Model for I2C drivers"
31 depends on DM
32 help
Przemyslaw Marczak705fcf42015-03-31 18:57:17 +020033 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
Simon Glasscaa4daa2020-12-03 16:55:18 -070036 device (bus child) info is kept as parent plat. The interface
Bartosz Golaszewskie3114822019-07-29 08:58:00 +020037 is defined in include/i2c.h.
Simon Glass4bba9d32015-02-13 12:20:48 -070038
Igor Opaniukd1f3abe2021-02-09 13:52:43 +020039config SPL_DM_I2C
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
42 default y
43 help
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
49
Simon Glasscc456bd2015-08-03 08:19:23 -060050config I2C_CROS_EC_TUNNEL
51 tristate "Chrome OS EC tunnel I2C bus"
52 depends on CROS_EC
53 help
54 This provides an I2C bus that will tunnel i2c commands through to
55 the other side of the Chrome OS EC to the I2C bus connected there.
56 This will work whatever the interface used to talk to the EC (SPI,
57 I2C or LPC). Some Chromebooks use this when the hardware design
58 does not allow direct access to the main PMIC from the AP.
59
Simon Glassf48eaf02015-08-03 08:19:24 -060060config I2C_CROS_EC_LDO
61 bool "Provide access to LDOs on the Chrome OS EC"
62 depends on CROS_EC
63 ---help---
64 On many Chromebooks the main PMIC is inaccessible to the AP. This is
65 often dealt with by using an I2C pass-through interface provided by
66 the EC. On some unfortunate models (e.g. Spring) the pass-through
67 is not available, and an LDO message is available instead. This
68 option enables a driver which provides very basic access to those
69 regulators, via the EC. We implement this as an I2C bus which
70 emulates just the TPS65090 messages we know about. This is done to
71 avoid duplicating the logic in the TPS65090 regulator driver for
72 enabling/disabling an LDO.
Simon Glasscc456bd2015-08-03 08:19:23 -060073
Lukasz Majewskie46f8a32017-03-21 12:08:25 +010074config I2C_SET_DEFAULT_BUS_NUM
75 bool "Set default I2C bus number"
76 depends on DM_I2C
77 help
78 Set default number of I2C bus to be accessed. This option provides
79 behaviour similar to old (i.e. pre DM) I2C bus driver.
80
81config I2C_DEFAULT_BUS_NUMBER
82 hex "I2C default bus number"
83 depends on I2C_SET_DEFAULT_BUS_NUM
84 default 0x0
85 help
86 Number of default I2C bus to use
87
Przemyslaw Marczakc54473c2015-03-31 18:57:18 +020088config DM_I2C_GPIO
89 bool "Enable Driver Model for software emulated I2C bus driver"
90 depends on DM_I2C && DM_GPIO
91 help
92 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
93 configuration is given by the device tree. Kernel-style device tree
94 bindings are supported.
95 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
96
Igor Opaniukd1f3abe2021-02-09 13:52:43 +020097config SPL_DM_I2C_GPIO
98 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
Simon Glass83061db2021-07-10 21:14:30 -060099 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
Igor Opaniukd1f3abe2021-02-09 13:52:43 +0200100 default y
101 help
102 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
103 configuration is given by the device tree. Kernel-style device tree
104 bindings are supported.
105 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
106
Songjun Wu8800e0f2016-06-20 13:22:38 +0800107config SYS_I2C_AT91
108 bool "Atmel I2C driver"
109 depends on DM_I2C && ARCH_AT91
110 help
111 Add support for the Atmel I2C driver. A serious problem is that there
112 is no documented way to issue repeated START conditions for more than
113 two messages, as needed to support combined I2C messages. Use the
114 i2c-gpio driver unless your system can cope with this limitation.
115 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
116
Rayagonda Kokatanur956d57a2020-04-08 11:12:27 +0530117config SYS_I2C_IPROC
118 bool "Broadcom I2C driver"
119 depends on DM_I2C
120 help
121 Broadcom I2C driver.
122 Add support for Broadcom I2C driver.
123 Say yes here to to enable the Broadco I2C driver.
124
mario.six@gdsys.ccdbc82ce2016-04-25 08:31:09 +0200125config SYS_I2C_FSL
126 bool "Freescale I2C bus driver"
127 depends on DM_I2C
128 help
129 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
130 MPC85xx processors.
131
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800132config SYS_I2C_CADENCE
133 tristate "Cadence I2C Controller"
Michal Simek664e16c2020-08-06 15:18:36 +0200134 depends on DM_I2C
Moritz Fischerfdec2d22015-12-28 09:47:11 -0800135 help
136 Say yes here to select Cadence I2C Host Controller. This controller is
137 e.g. used by Xilinx Zynq.
138
Arthur Li7f5ea252020-06-01 12:56:31 -0700139config SYS_I2C_CA
140 tristate "Cortina-Access I2C Controller"
141 depends on DM_I2C && CORTINA_PLATFORM
142 default n
143 help
144 Add support for the Cortina Access I2C host controller.
145 Say yes here to select Cortina-Access I2C Host Controller.
146
Adam Ford9f8cf762018-08-10 05:05:22 -0500147config SYS_I2C_DAVINCI
148 bool "Davinci I2C Controller"
149 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
150 help
151 Say yes here to add support for Davinci and Keystone I2C controller
152
Stefan Roesee32d0db2016-04-28 09:47:17 +0200153config SYS_I2C_DW
154 bool "Designware I2C Controller"
155 default n
156 help
157 Say yes here to select the Designware I2C Host Controller. This
158 controller is used in various SoCs, e.g. the ST SPEAr, Altera
159 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
160
maxims@google.com4dc038f2017-04-17 12:00:30 -0700161config SYS_I2C_ASPEED
162 bool "Aspeed I2C Controller"
163 depends on DM_I2C && ARCH_ASPEED
164 help
165 Say yes here to select Aspeed I2C Host Controller. The driver
166 supports AST2500 and AST2400 controllers, but is very limited.
167 Only single master mode is supported and only byte-by-byte
168 synchronous reads and writes are supported, no Pool Buffers or DMA.
169
Simon Glassabb0b012016-01-17 16:11:44 -0700170config SYS_I2C_INTEL
171 bool "Intel I2C/SMBUS driver"
172 depends on DM_I2C
173 help
174 Add support for the Intel SMBUS driver. So far this driver is just
175 a stub which perhaps some basic init. There is no implementation of
176 the I2C API meaning that any I2C operations will immediately fail
177 for now.
178
Peng Fan7ee3f142017-02-24 09:54:18 +0800179config SYS_I2C_IMX_LPI2C
180 bool "NXP i.MX LPI2C driver"
Peng Fan7ee3f142017-02-24 09:54:18 +0800181 help
182 Add support for the NXP i.MX LPI2C driver.
183
Trevor Woerner07055562021-06-10 22:37:08 -0400184config SYS_I2C_LPC32XX
185 bool "LPC32XX I2C driver"
186 depends on ARCH_LPC32XX
187 help
188 Enable support for the LPC32xx I2C driver.
189
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100190config SYS_I2C_MESON
191 bool "Amlogic Meson I2C driver"
192 depends on DM_I2C && ARCH_MESON
193 help
Beniamino Galvani4ecbb8b2017-11-26 17:40:54 +0100194 Add support for the I2C controller available in Amlogic Meson
195 SoCs. The controller supports programmable bus speed including
196 standard (100kbits/s) and fast (400kbit/s) speed and allows the
197 software to define a flexible format of the bit streams. It has an
198 internal buffer holding up to 8 bytes for transfers and supports
199 both 7-bit and 10-bit addresses.
Beniamino Galvanif8d9ca12017-10-29 10:09:00 +0100200
Jagan Teki72c8c102016-12-06 00:00:57 +0100201config SYS_I2C_MXC
Sriram Dash942ecc82018-02-06 11:26:30 +0530202 bool "NXP MXC I2C driver"
Jagan Teki72c8c102016-12-06 00:00:57 +0100203 help
Chris Packham74751452019-01-13 22:13:25 +1300204 Add support for the NXP I2C driver. This supports up to four bus
205 channels and operating on standard mode up to 100 kbits/s and fast
206 mode up to 400 kbits/s.
Jagan Teki72c8c102016-12-06 00:00:57 +0100207
Trent Piephoca0a8f32019-05-08 23:30:06 +0000208# These settings are not used with DM_I2C, however SPL doesn't use
209# DM_I2C even if DM_I2C is enabled, and so might use these settings even
210# when main u-boot does not!
211if SYS_I2C_MXC && (!DM_I2C || SPL)
Sriram Dash942ecc82018-02-06 11:26:30 +0530212config SYS_I2C_MXC_I2C1
213 bool "NXP MXC I2C1"
214 help
215 Add support for NXP MXC I2C Controller 1.
216 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
217
218config SYS_I2C_MXC_I2C2
219 bool "NXP MXC I2C2"
220 help
221 Add support for NXP MXC I2C Controller 2.
222 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
223
224config SYS_I2C_MXC_I2C3
225 bool "NXP MXC I2C3"
226 help
227 Add support for NXP MXC I2C Controller 3.
228 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
229
230config SYS_I2C_MXC_I2C4
231 bool "NXP MXC I2C4"
232 help
233 Add support for NXP MXC I2C Controller 4.
234 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
Sriram Dashfa452192018-02-06 11:26:31 +0530235
236config SYS_I2C_MXC_I2C5
237 bool "NXP MXC I2C5"
238 help
239 Add support for NXP MXC I2C Controller 5.
240 Required for SoCs which have I2C MXC controller 5 eg LX2160A
241
242config SYS_I2C_MXC_I2C6
243 bool "NXP MXC I2C6"
244 help
245 Add support for NXP MXC I2C Controller 6.
246 Required for SoCs which have I2C MXC controller 6 eg LX2160A
247
248config SYS_I2C_MXC_I2C7
249 bool "NXP MXC I2C7"
250 help
251 Add support for NXP MXC I2C Controller 7.
252 Required for SoCs which have I2C MXC controller 7 eg LX2160A
253
254config SYS_I2C_MXC_I2C8
255 bool "NXP MXC I2C8"
256 help
257 Add support for NXP MXC I2C Controller 8.
258 Required for SoCs which have I2C MXC controller 8 eg LX2160A
Sriram Dash942ecc82018-02-06 11:26:30 +0530259endif
260
261if SYS_I2C_MXC_I2C1
262config SYS_MXC_I2C1_SPEED
263 int "I2C Channel 1 speed"
Tom Rini2ce7b652021-02-09 08:03:10 -0500264 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash942ecc82018-02-06 11:26:30 +0530265 default 100000
266 help
267 MXC I2C Channel 1 speed
268
269config SYS_MXC_I2C1_SLAVE
270 int "I2C1 Slave"
271 default 0
272 help
273 MXC I2C1 Slave
274endif
275
276if SYS_I2C_MXC_I2C2
277config SYS_MXC_I2C2_SPEED
278 int "I2C Channel 2 speed"
Tom Rini2ce7b652021-02-09 08:03:10 -0500279 default 40000000 if TARGET_LS2080A_EMU
Sriram Dash942ecc82018-02-06 11:26:30 +0530280 default 100000
281 help
282 MXC I2C Channel 2 speed
283
284config SYS_MXC_I2C2_SLAVE
285 int "I2C2 Slave"
286 default 0
287 help
288 MXC I2C2 Slave
289endif
290
291if SYS_I2C_MXC_I2C3
292config SYS_MXC_I2C3_SPEED
293 int "I2C Channel 3 speed"
294 default 100000
295 help
296 MXC I2C Channel 3 speed
297
298config SYS_MXC_I2C3_SLAVE
299 int "I2C3 Slave"
300 default 0
301 help
302 MXC I2C3 Slave
303endif
304
305if SYS_I2C_MXC_I2C4
306config SYS_MXC_I2C4_SPEED
307 int "I2C Channel 4 speed"
308 default 100000
309 help
310 MXC I2C Channel 4 speed
311
312config SYS_MXC_I2C4_SLAVE
313 int "I2C4 Slave"
314 default 0
315 help
316 MXC I2C4 Slave
317endif
318
Sriram Dashfa452192018-02-06 11:26:31 +0530319if SYS_I2C_MXC_I2C5
320config SYS_MXC_I2C5_SPEED
321 int "I2C Channel 5 speed"
322 default 100000
323 help
324 MXC I2C Channel 5 speed
325
326config SYS_MXC_I2C5_SLAVE
327 int "I2C5 Slave"
328 default 0
329 help
330 MXC I2C5 Slave
331endif
332
333if SYS_I2C_MXC_I2C6
334config SYS_MXC_I2C6_SPEED
335 int "I2C Channel 6 speed"
336 default 100000
337 help
338 MXC I2C Channel 6 speed
339
340config SYS_MXC_I2C6_SLAVE
341 int "I2C6 Slave"
342 default 0
343 help
344 MXC I2C6 Slave
345endif
346
347if SYS_I2C_MXC_I2C7
348config SYS_MXC_I2C7_SPEED
349 int "I2C Channel 7 speed"
350 default 100000
351 help
352 MXC I2C Channel 7 speed
353
354config SYS_MXC_I2C7_SLAVE
355 int "I2C7 Slave"
356 default 0
357 help
358 MXC I2C7 Slave
359endif
360
361if SYS_I2C_MXC_I2C8
362config SYS_MXC_I2C8_SPEED
363 int "I2C Channel 8 speed"
364 default 100000
365 help
366 MXC I2C Channel 8 speed
367
368config SYS_MXC_I2C8_SLAVE
369 int "I2C8 Slave"
370 default 0
371 help
372 MXC I2C8 Slave
373endif
374
Stefan Boschc25e9e02020-07-10 19:07:28 +0200375config SYS_I2C_NEXELL
376 bool "Nexell I2C driver"
377 depends on DM_I2C
378 help
379 Add support for the Nexell I2C driver. This is used with various
380 Nexell parts such as S5Pxx18 series SoCs. All chips
381 have several I2C ports and all are provided, controlled by the
382 device tree.
383
Pragnesh Patelb2d4cbe2020-11-14 14:42:34 +0530384config SYS_I2C_OCORES
385 bool "ocores I2C driver"
386 depends on DM_I2C
387 help
388 Add support for ocores I2C controller. For details see
389 https://opencores.org/projects/i2c
390
Adam Forddaa0f052017-08-07 13:11:34 -0500391config SYS_I2C_OMAP24XX
392 bool "TI OMAP2+ I2C driver"
Vignesh R14106bc2019-06-04 18:08:11 -0500393 depends on ARCH_OMAP2PLUS || ARCH_K3
Adam Forddaa0f052017-08-07 13:11:34 -0500394 help
395 Add support for the OMAP2+ I2C driver.
396
Adam Ford11d2e982018-01-24 15:21:21 -0600397if SYS_I2C_OMAP24XX
398config SYS_OMAP24_I2C_SLAVE
399 int "I2C Slave addr channel 0"
400 default 1
401 help
402 OMAP24xx I2C Slave address channel 0
403
404config SYS_OMAP24_I2C_SPEED
405 int "I2C Slave channel 0 speed"
406 default 100000
407 help
408 OMAP24xx Slave speed channel 0
409endif
410
Marek Vasuta06a0ac2018-04-21 18:57:28 +0200411config SYS_I2C_RCAR_I2C
412 bool "Renesas RCar I2C driver"
413 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
414 help
415 Support for Renesas RCar I2C controller.
416
Marek Vasut9e75ea42017-11-28 08:02:27 +0100417config SYS_I2C_RCAR_IIC
418 bool "Renesas RCar Gen3 IIC driver"
Marek Vasutf51155e2018-02-17 02:17:40 +0100419 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
Marek Vasut9e75ea42017-11-28 08:02:27 +0100420 help
421 Support for Renesas RCar Gen3 IIC controller.
422
Simon Glass34374692015-08-30 16:55:39 -0600423config SYS_I2C_ROCKCHIP
424 bool "Rockchip I2C driver"
425 depends on DM_I2C
426 help
427 Add support for the Rockchip I2C driver. This is used with various
428 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
Chris Packham74751452019-01-13 22:13:25 +1300429 have several I2C ports and all are provided, controlled by the
Simon Glass34374692015-08-30 16:55:39 -0600430 device tree.
431
Simon Glass1174aad2015-03-06 13:19:04 -0700432config SYS_I2C_SANDBOX
433 bool "Sandbox I2C driver"
434 depends on SANDBOX && DM_I2C
435 help
436 Enable I2C support for sandbox. This is an emulation of a real I2C
437 bus. Devices can be attached to the bus using the device tree
Masahiro Yamadac77c7db2017-02-11 12:39:55 +0900438 which specifies the driver to use. See sandbox.dts as an example.
Simon Glass1174aad2015-03-06 13:19:04 -0700439
Suneel Garapati5c2c3e82020-05-26 14:13:07 +0200440config SYS_I2C_OCTEON
441 bool "Octeon II/III/TX/TX2 I2C driver"
442 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
443 default y
444 help
445 Add support for the Marvell Octeon I2C driver. This is used with
446 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
447 chips have several I2C ports and all are provided, controlled by
448 the device tree.
449
Jaehoon Chung1d61ad92017-01-09 14:47:52 +0900450config SYS_I2C_S3C24X0
451 bool "Samsung I2C driver"
452 depends on ARCH_EXYNOS4 && DM_I2C
453 help
454 Support for Samsung I2C controller as Samsung SoCs.
Simon Glass1174aad2015-03-06 13:19:04 -0700455
Patrice Chotard4fadcaf2017-08-09 14:45:27 +0200456config SYS_I2C_STM32F7
457 bool "STMicroelectronics STM32F7 I2C support"
Patrick Delaunay2514c2d2018-03-12 10:46:10 +0100458 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
Patrice Chotard4fadcaf2017-08-09 14:45:27 +0200459 help
460 Enable this option to add support for STM32 I2C controller
461 introduced with STM32F7/H7 SoCs. This I2C controller supports :
462 _ Slave and master modes
463 _ Multimaster capability
464 _ Standard-mode (up to 100 kHz)
465 _ Fast-mode (up to 400 kHz)
466 _ Fast-mode Plus (up to 1 MHz)
467 _ 7-bit and 10-bit addressing mode
468 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
469 _ All 7-bit addresses acknowledge mode
470 _ General call
471 _ Programmable setup and hold times
472 _ Easy to use event management
473 _ Optional clock stretching
474 _ Software reset
475
Jassi Brar4483fba2021-06-04 18:44:48 +0900476config SYS_I2C_SYNQUACER
477 bool "Socionext SynQuacer I2C controller"
478 depends on ARCH_SYNQUACER && DM_I2C
479 help
480 Support for Socionext Synquacer I2C controller. This I2C controller
481 will be used for RTC and LS-connector on DeveloperBox.
482
Peter Robinson02253d42019-02-20 12:17:26 +0000483config SYS_I2C_TEGRA
484 bool "NVIDIA Tegra internal I2C controller"
Trevor Woerner18138ab2020-05-06 08:02:41 -0400485 depends on ARCH_TEGRA
Peter Robinson02253d42019-02-20 12:17:26 +0000486 help
487 Support for NVIDIA I2C controller available in Tegra SoCs.
488
Masahiro Yamada26f820f2015-01-13 12:44:36 +0900489config SYS_I2C_UNIPHIER
490 bool "UniPhier I2C driver"
491 depends on ARCH_UNIPHIER && DM_I2C
492 default y
493 help
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +0900494 Support for UniPhier I2C controller driver. This I2C controller
495 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
Masahiro Yamada238bd0b2015-01-13 12:44:37 +0900496
497config SYS_I2C_UNIPHIER_F
498 bool "UniPhier FIFO-builtin I2C driver"
499 depends on ARCH_UNIPHIER && DM_I2C
500 default y
501 help
Masahiro Yamadab6ef3a32015-05-29 17:30:01 +0900502 Support for UniPhier FIFO-builtin I2C controller driver.
Masahiro Yamada238bd0b2015-01-13 12:44:37 +0900503 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
Simon Glass3d1957f2015-08-03 08:19:21 -0600504
Heiko Schochere3bc4bb2018-10-11 07:26:33 +0200505config SYS_I2C_VERSATILE
506 bool "Arm Ltd Versatile I2C bus driver"
Tom Rinic6c26a02021-02-20 20:05:47 -0500507 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
Heiko Schochere3bc4bb2018-10-11 07:26:33 +0200508 help
509 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
510 controller is present in the development boards manufactured by Arm Ltd.
511
mario.six@gdsys.cc14a6ff22016-07-21 11:57:10 +0200512config SYS_I2C_MVTWSI
513 bool "Marvell I2C driver"
514 depends on DM_I2C
515 help
516 Support for Marvell I2C controllers as used on the orion5x and
517 kirkwood SoC families.
518
Stephen Warren34f1c9f2016-08-08 11:28:27 -0600519config TEGRA186_BPMP_I2C
520 bool "Enable Tegra186 BPMP-based I2C driver"
521 depends on TEGRA186_BPMP
522 help
523 Support for Tegra I2C controllers managed by the BPMP (Boot and
524 Power Management Processor). On Tegra186, some I2C controllers are
525 directly controlled by the main CPU, whereas others are controlled
526 by the BPMP, and can only be accessed by the main CPU via IPC
527 requests to the BPMP. This driver covers the latter case.
528
Adam Fordfc760cc2017-08-11 06:39:34 -0500529config SYS_I2C_BUS_MAX
530 int "Max I2C busses"
531 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
532 default 2 if TI816X
533 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
534 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
535 default 5 if OMAP54XX
536 help
537 Define the maximum number of available I2C buses.
538
Marek Vasutad827a52018-12-19 12:26:27 +0100539config SYS_I2C_XILINX_XIIC
540 bool "Xilinx AXI I2C driver"
541 depends on DM_I2C
542 help
543 Support for Xilinx AXI I2C controller.
544
Mario Six92164212018-01-15 11:08:11 +0100545config SYS_I2C_IHS
546 bool "gdsys IHS I2C driver"
547 depends on DM_I2C
548 help
549 Support for gdsys IHS I2C driver on FPGA bus.
550
Simon Glass3d1957f2015-08-03 08:19:21 -0600551source "drivers/i2c/muxes/Kconfig"
Masahiro Yamada0b11dbf2015-07-26 02:46:26 +0900552
Simon Glass59e11eb2021-07-10 21:14:35 -0600553endif