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Ilya Yanok4ab779c2012-02-07 23:30:22 +00001/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on omap3_evm_config.h
5 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Ilya Yanok4ab779c2012-02-07 23:30:22 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
12/*
13 * High Level Configuration Options
14 */
15#define CONFIG_OMAP /* in a TI OMAP core */
16#define CONFIG_OMAP34XX /* which is a 34XX */
17#define CONFIG_OMAP3_MCX /* working with mcx */
Marek Vasut308252a2012-07-21 05:02:23 +000018#define CONFIG_OMAP_GPIO
Lokesh Vutla806d2792013-07-30 11:36:30 +053019#define CONFIG_OMAP_COMMON
Ilya Yanok4ab779c2012-02-07 23:30:22 +000020
21#define MACH_TYPE_MCX 3656
22#define CONFIG_MACH_TYPE MACH_TYPE_MCX
Stefano Babic3ae6abb2012-06-13 22:34:44 +000023#define CONFIG_BOARD_LATE_INIT
Ilya Yanok4ab779c2012-02-07 23:30:22 +000024
25#define CONFIG_SYS_CACHELINE_SIZE 64
26
27#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
28
29#include <asm/arch/cpu.h> /* get chip and board defs */
30#include <asm/arch/omap3.h>
31
32#define CONFIG_OF_LIBFDT
33#define CONFIG_FIT
34
35/*
36 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
37 * and older u-boot.bin with the new U-Boot SPL.
38 */
39#define CONFIG_SYS_TEXT_BASE 0x80008000
40
41/*
42 * Display CPU and Board information
43 */
44#define CONFIG_DISPLAY_CPUINFO
45#define CONFIG_DISPLAY_BOARDINFO
46
47/* Clock Defines */
48#define V_OSCK 26000000 /* Clock output from T2 */
49#define V_SCLK (V_OSCK >> 1)
50
51#define CONFIG_MISC_INIT_R
52
53#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
54#define CONFIG_SETUP_MEMORY_TAGS
55#define CONFIG_INITRD_TAG
56#define CONFIG_REVISION_TAG
57
58/*
59 * Size of malloc() pool
60 */
61#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
62#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
63/*
64 * DDR related
65 */
66#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
67
68/*
69 * Hardware drivers
70 */
71
72/*
73 * NS16550 Configuration
74 */
75#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
76
77#define CONFIG_SYS_NS16550
78#define CONFIG_SYS_NS16550_SERIAL
79#define CONFIG_SYS_NS16550_REG_SIZE (-4)
80#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
81
82/*
83 * select serial console configuration
84 */
85#define CONFIG_CONS_INDEX 3
86#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
87#define CONFIG_SERIAL3 3 /* UART3 */
88
89/* allow to overwrite serial and ethaddr */
90#define CONFIG_ENV_OVERWRITE
91#define CONFIG_BAUDRATE 115200
92#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
93 115200}
94#define CONFIG_MMC
95#define CONFIG_OMAP_HSMMC
96#define CONFIG_GENERIC_MMC
97#define CONFIG_DOS_PARTITION
98
99/* EHCI */
100#define CONFIG_USB_STORAGE
Stefano Babic92671102014-02-14 12:51:25 +0100101#define CONFIG_OMAP3_GPIO_2
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000102#define CONFIG_OMAP3_GPIO_5
103#define CONFIG_USB_EHCI
104#define CONFIG_USB_EHCI_OMAP
105#define CONFIG_USB_ULPI
106#define CONFIG_USB_ULPI_VIEWPORT_OMAP
Stefano Babic8c735b92012-10-16 04:07:04 +0000107#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000108#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
109
110/* commands to include */
111#include <config_cmd_default.h>
112
113#define CONFIG_CMD_EXT2 /* EXT2 Support */
114#define CONFIG_CMD_FAT /* FAT support */
115#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
116
117#define CONFIG_CMD_DATE
118#define CONFIG_CMD_I2C /* I2C serial bus support */
119#define CONFIG_CMD_MMC /* MMC support */
120#define CONFIG_CMD_FAT /* FAT support */
121#define CONFIG_CMD_USB
122#define CONFIG_CMD_NAND /* NAND support */
123#define CONFIG_CMD_DHCP
124#define CONFIG_CMD_PING
125#define CONFIG_CMD_CACHE
126#define CONFIG_CMD_UBI
127#define CONFIG_CMD_UBIFS
128#define CONFIG_RBTREE
129#define CONFIG_LZO
130#define CONFIG_MTD_PARTITIONS
131#define CONFIG_MTD_DEVICE
132#define CONFIG_CMD_MTDPARTS
Stefano Babic3ae6abb2012-06-13 22:34:44 +0000133#define CONFIG_CMD_GPIO
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000134
135#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
136#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
137#undef CONFIG_CMD_IMI /* iminfo */
138#undef CONFIG_CMD_IMLS /* List all found images */
139
140#define CONFIG_SYS_NO_FLASH
Heiko Schocher6789e842013-10-22 11:03:18 +0200141#define CONFIG_SYS_I2C
142#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
143#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
144#define CONFIG_SYS_I2C_OMAP34XX
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000145
146/* RTC */
147#define CONFIG_RTC_DS1337
148#define CONFIG_SYS_I2C_RTC_ADDR 0x68
149
150#define CONFIG_CMD_NET
151#define CONFIG_CMD_MII
152#define CONFIG_CMD_NFS
153/*
154 * Board NAND Info.
155 */
156#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
157 /* to access nand */
158#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
159 /* to access */
160 /* nand at CS0 */
161
162#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
163 /* NAND devices */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000164#define CONFIG_JFFS2_NAND
165/* nand device jffs2 lives on */
166#define CONFIG_JFFS2_DEV "nand0"
167/* start of jffs2 partition */
168#define CONFIG_JFFS2_PART_OFFSET 0x680000
169#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
170
171/* Environment information */
Stefano Babic8f1fae22012-10-20 23:56:07 +0000172#define CONFIG_BOOTDELAY 3
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000173
174#define CONFIG_BOOTFILE "uImage"
175
Stefano Babicf89a8b62012-06-13 22:34:43 +0000176#define xstr(s) str(s)
177#define str(s) #s
178
179/* Setup MTD for NAND on the SOM */
180#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
181#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
182 "1m(u-boot),256k(env1)," \
183 "256k(env2),6m(kernel),6m(k_recovery)," \
184 "8m(fs_recovery),-(common_data)"
185
186#define CONFIG_HOSTNAME mcx
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000187#define CONFIG_EXTRA_ENV_SETTINGS \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000188 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \
189 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \
190 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
191 "addfb=setenv bootargs ${bootargs} vram=6M " \
192 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \
193 "addip_sta=setenv bootargs ${bootargs} " \
194 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
195 "${netmask}:${hostname}:eth0:off\0" \
196 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
197 "addip=if test -n ${ipdyn};then run addip_dyn;" \
198 "else run addip_sta;fi\0" \
199 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
200 "addtty=setenv bootargs ${bootargs} " \
201 "console=${consoledev},${baudrate}\0" \
202 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
203 "baudrate=115200\0" \
204 "consoledev=ttyO2\0" \
205 "hostname=" xstr(CONFIG_HOSTNAME) "\0" \
206 "loadaddr=0x82000000\0" \
207 "load=tftp ${loadaddr} ${u-boot}\0" \
208 "load_k=tftp ${loadaddr} ${bootfile}\0" \
209 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
210 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
211 "mlo=" xstr(CONFIG_HOSTNAME) "/MLO\0" \
212 "mmcargs=root=/dev/mmcblk0p2 rw " \
213 "rootfstype=ext3 rootwait\0" \
214 "mmcboot=echo Booting from mmc ...; " \
215 "run mmcargs; " \
216 "run addip addtty addmtd addfb addeth addmisc;" \
217 "run loaduimage; " \
218 "bootm ${loadaddr}\0" \
219 "net_nfs=run load_k; " \
220 "run nfsargs; " \
221 "run addip addtty addmtd addfb addeth addmisc;" \
222 "bootm ${loadaddr}\0" \
223 "nfsargs=setenv bootargs root=/dev/nfs rw " \
224 "nfsroot=${serverip}:${rootpath}\0" \
225 "u-boot=" xstr(CONFIG_HOSTNAME) "/u-boot.img\0" \
226 "uboot_addr=0x80000\0" \
227 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
228 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
229 "updatemlo=nandecc hw;nand erase 0 20000;" \
230 "nand write ${loadaddr} 0 20000\0" \
231 "upd=if run load;then echo Updating u-boot;if run update;" \
232 "then echo U-Boot updated;" \
233 "else echo Error updating u-boot !;" \
234 "echo Board without bootloader !!;" \
235 "fi;" \
236 "else echo U-Boot not downloaded..exiting;fi\0" \
237 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
238 "bootscript=echo Running bootscript from mmc ...; " \
239 "source ${loadaddr}\0" \
240 "nandargs=setenv bootargs ubi.mtd=7 " \
241 "root=ubi0:rootfs rootfstype=ubifs\0" \
242 "nandboot=echo Booting from nand ...; " \
243 "run nandargs; " \
244 "ubi part nand0,4;" \
245 "ubi readvol ${loadaddr} kernel;" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000246 "run addtty addmtd addfb addeth addmisc;" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000247 "bootm ${loadaddr}\0" \
Stefano Babic8f1fae22012-10-20 23:56:07 +0000248 "preboot=ubi part nand0,7;" \
249 "ubi readvol ${loadaddr} splash;" \
250 "bmp display ${loadaddr};" \
251 "gpio set 55\0" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000252 "swupdate_args=setenv bootargs root=/dev/ram " \
253 "quiet loglevel=1 " \
254 "consoleblank=0 ${swupdate_misc}\0" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000255 "swupdate=echo Running Sw-Update...;" \
256 "if printenv mtdparts;then echo Starting SwUpdate...; " \
257 "else mtdparts default;fi; " \
258 "ubi part nand0,5;" \
259 "ubi readvol 0x82000000 kernel_recovery;" \
Stefano Babice47c9e82012-10-16 04:07:03 +0000260 "ubi part nand0,6;" \
261 "ubi readvol 0x84000000 fs_recovery;" \
Stefano Babicf89a8b62012-06-13 22:34:43 +0000262 "run swupdate_args; " \
263 "setenv bootargs ${bootargs} " \
264 "${mtdparts} " \
265 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \
266 "omapdss.def_disp=lcd;" \
Stefano Babica5d64db2014-02-14 12:51:27 +0100267 "bootm 0x82000000 0x84000000\0" \
268 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \
269 "then source 82000000;else run nandboot;fi\0"
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000270
271#define CONFIG_AUTO_COMPLETE
Detlev Zundel48a4ee52012-02-08 04:49:02 +0000272#define CONFIG_CMDLINE_EDITING
273
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000274/*
275 * Miscellaneous configurable options
276 */
277#define V_PROMPT "mcx # "
278
279#define CONFIG_SYS_LONGHELP /* undef to save memory */
280#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000281#define CONFIG_SYS_PROMPT V_PROMPT
Stefano Babic992a27d2012-06-13 22:34:41 +0000282#define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000283/* Print Buffer Size */
284#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
285 sizeof(CONFIG_SYS_PROMPT) + 16)
286#define CONFIG_SYS_MAXARGS 16 /* max number of command */
287 /* args */
288/* Boot Argument Buffer Size */
289#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
290/* memtest works on */
291#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
292#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
293 0x01F00000) /* 31MB */
294
295#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
296 /* address */
Stefano Babic8f1fae22012-10-20 23:56:07 +0000297#define CONFIG_PREBOOT
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000298
299/*
300 * AM3517 has 12 GP timers, they can be driven by the system clock
301 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
302 * This rate is divided by a local divisor.
303 */
304#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
305#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000306
307/*
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000308 * Physical Memory Map
309 */
310#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
311#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000312#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
313
314/*
315 * FLASH and environment organization
316 */
317
318/* **** PISMO SUPPORT *** */
319
320/* Configure the PISMO */
321#define PISMO1_NAND_SIZE GPMC_SIZE_128M
322
323#define CONFIG_NAND_OMAP_GPMC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000324#define CONFIG_ENV_IS_IN_NAND
Stefano Babicf89a8b62012-06-13 22:34:43 +0000325#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000326
Stefano Babicf89a8b62012-06-13 22:34:43 +0000327/* Redundant Environment */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000328#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
329#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
330#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
Stefano Babicf89a8b62012-06-13 22:34:43 +0000331#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
332 2 * CONFIG_SYS_ENV_SECT_SIZE)
333#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000334
335/* Flash banks JFFS2 should use */
336#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
337 CONFIG_SYS_MAX_NAND_DEVICE)
338#define CONFIG_SYS_JFFS2_MEM_NAND
339/* use flash_info[2] */
340#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
341#define CONFIG_SYS_JFFS2_NUM_BANKS 1
342
343#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
344#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
345#define CONFIG_SYS_INIT_RAM_SIZE 0x800
346#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
347 CONFIG_SYS_INIT_RAM_SIZE - \
348 GENERATED_GBL_DATA_SIZE)
349
350/* Defines for SPL */
351#define CONFIG_SPL
Tom Rini47f7bca2012-08-13 12:03:19 -0700352#define CONFIG_SPL_FRAMEWORK
Tom Rinid7cb93b2012-08-14 12:26:08 -0700353#define CONFIG_SPL_BOARD_INIT
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000354#define CONFIG_SPL_NAND_SIMPLE
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000355
356#define CONFIG_SPL_LIBCOMMON_SUPPORT
357#define CONFIG_SPL_LIBDISK_SUPPORT
358#define CONFIG_SPL_I2C_SUPPORT
359#define CONFIG_SPL_MMC_SUPPORT
360#define CONFIG_SPL_FAT_SUPPORT
361#define CONFIG_SPL_LIBGENERIC_SUPPORT
362#define CONFIG_SPL_SERIAL_SUPPORT
363#define CONFIG_SPL_POWER_SUPPORT
364#define CONFIG_SPL_NAND_SUPPORT
Scott Wood6f2f01b2012-09-20 19:09:07 -0500365#define CONFIG_SPL_NAND_BASE
366#define CONFIG_SPL_NAND_DRIVERS
367#define CONFIG_SPL_NAND_ECC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000368#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
369
370#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinie0820cc2012-05-08 07:29:31 +0000371#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000372#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
373
374/* move malloc and bss high to prevent clashing with the main image */
375#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
376#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
377#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
378#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
379
380#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
381#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
382#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
383
384/* NAND boot config */
385#define CONFIG_SYS_NAND_PAGE_COUNT 64
386#define CONFIG_SYS_NAND_PAGE_SIZE 2048
387#define CONFIG_SYS_NAND_OOBSIZE 64
388#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
389#define CONFIG_SYS_NAND_5_ADDR_CYCLE
390#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
391#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
392 48, 49, 50, 51, 52, 53, 54, 55,\
393 56, 57, 58, 59, 60, 61, 62, 63}
394#define CONFIG_SYS_NAND_ECCSIZE 256
395#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3f719062013-11-18 19:03:01 +0530396#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
Stefano Babic92671102014-02-14 12:51:25 +0100397#define CONFIG_SPL_NAND_SOFTECC
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000398
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000399#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
400
401#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
402
403/*
404 * ethernet support
405 *
406 */
407#if defined(CONFIG_CMD_NET)
408#define CONFIG_DRIVER_TI_EMAC
409#define CONFIG_DRIVER_TI_EMAC_USE_RMII
410#define CONFIG_MII
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000411#define CONFIG_BOOTP_DNS
412#define CONFIG_BOOTP_DNS2
413#define CONFIG_BOOTP_SEND_HOSTNAME
414#define CONFIG_NET_RETRY_COUNT 10
415#endif
416
Stefano Babic8f1fae22012-10-20 23:56:07 +0000417#define CONFIG_VIDEO
418#define CONFIG_CFB_CONSOLE
419#define CONFIG_VGA_AS_SINGLE_DEVICE
420#define CONFIG_SPLASH_SCREEN
421#define CONFIG_VIDEO_BMP_RLE8
422#define CONFIG_CMD_BMP
423#define CONFIG_VIDEO_OMAP3
424#define CONFIG_SYS_CONSOLE_IS_IN_ENV
425
Ilya Yanok4ab779c2012-02-07 23:30:22 +0000426#endif /* __CONFIG_H */