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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 5b20fef5c38bb73d89082649a3ff6e022986a4e2 / . / configs / socfpga_sr1500_defconfig
blob: dc88606daeffdaea8d077e3b21732cd2547ccc0e [file] [log] [blame]
Stefan Roeseae9996c2015-11-18 11:06:09 +0100[diff] [blame]1CONFIG_ARM=y
Philip Oberfichtner11168882022-08-17 15:07:12 +0200[diff] [blame]2CONFIG_SYS_L2_PL310=y
Stefan Roeseae9996c2015-11-18 11:06:09 +0100[diff] [blame]3CONFIG_ARCH_SOCFPGA=y
Tom Rini98021542021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x4000000
Tom Rinifcb51172023-02-17 09:58:06 -0500[diff] [blame]5CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
6CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000
Tom Rinic960c0f2023-05-01 11:50:26 -0400[diff] [blame]7CONFIG_SF_DEFAULT_SPEED=100000000
Tom Rinia09fea12019-11-18 20:02:10 -0500[diff] [blame]8CONFIG_ENV_SIZE=0x4000
9CONFIG_ENV_OFFSET=0xE0000
Tom Rini556fd592020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini052170c2020-01-22 13:38:00 -0500[diff] [blame]11CONFIG_DM_GPIO=y
Tom Rini2bba7802021-06-28 10:17:29 -0400[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500"
Tom Rinic5a6e9f2020-07-06 13:54:25 -0400[diff] [blame]13CONFIG_SPL_TEXT_BASE=0xFFFF0000
Tom Rinifcb51172023-02-17 09:58:06 -0500[diff] [blame]14CONFIG_DM_RESET=y
Tom Rini344a0e42019-05-26 14:45:25 -0400[diff] [blame]15CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
Tom Rinifcb51172023-02-17 09:58:06 -0500[diff] [blame]16CONFIG_SPL_STACK=0xfffffff8
Tom Rini42444292020-02-06 13:42:52 -0500[diff] [blame]17CONFIG_TARGET_SOCFPGA_SR1500=y
Tom Rini9e1d65f2020-02-28 13:28:38 -0500[diff] [blame]18CONFIG_ENV_OFFSET_REDUND=0xF0000
Tom Rini0a3689c2022-04-01 10:33:18 -0400[diff] [blame]19CONFIG_SYS_MEMTEST_START=0x00000000
20CONFIG_SYS_MEMTEST_END=0x40000000
Simon Glassd6b318d2021-12-18 11:27:50 -0700[diff] [blame]21CONFIG_TIMESTAMP=y
Tom Riniec6f06b2023-10-02 13:58:20 -0400[diff] [blame]22CONFIG_FIT=y
Tom Rinic358af82023-03-27 13:39:17 -0400[diff] [blame]23CONFIG_DISTRO_DEFAULTS=y
Tom Rinifa2c1462018-02-10 16:54:38 -0500[diff] [blame]24# CONFIG_USE_BOOTCOMMAND is not set
Tom Rini0817daa2020-10-09 12:22:06 -0400[diff] [blame]25CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_sr1500.dtb"
Simon Glassef26d602016-10-17 20:12:37 -0600[diff] [blame]26CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Simon Glass84f2a5d2016-10-17 20:12:59 -0600[diff] [blame]27CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
Simon Glass3505bc52016-10-17 20:12:58 -0600[diff] [blame]28CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
Simon Glassf3f3eff2016-10-17 20:13:00 -0600[diff] [blame]29CONFIG_SYS_CONSOLE_INFO_QUIET=y
Lokesh Vutla84351792016-10-11 21:33:46 -0400[diff] [blame]30# CONFIG_DISPLAY_BOARDINFO is not set
Mario Six78eba692018-03-28 14:38:17 +0200[diff] [blame]31CONFIG_DISPLAY_BOARDINFO_LATE=y
Simon Glassa5d67542017-01-23 13:31:20 -0700[diff] [blame]32CONFIG_BOARD_EARLY_INIT_F=y
Tom Rini15b4aed2022-03-23 17:20:08 -0400[diff] [blame]33CONFIG_CLOCKS=y
Tom Rinica8a3292022-05-16 17:20:26 -0400[diff] [blame]34CONFIG_SPL_PAD_TO=0x10000
Tom Rini9b5f9ae2022-05-19 15:09:22 -0400[diff] [blame]35CONFIG_SPL_NO_BSS_LIMIT=y
Tom Rinif113d7d2022-05-26 13:13:21 -0400[diff] [blame]36# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Marek Vasut55500432018-04-07 16:05:27 +0200[diff] [blame]37CONFIG_SPL_SPI_LOAD=y
Tom Rini3e5b62f2021-08-10 15:08:46 -0400[diff] [blame]38CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000
Tom Rinicf493582022-05-11 16:21:06 -0400[diff] [blame]39CONFIG_SYS_MAXARGS=32
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]40CONFIG_CMD_ASKENV=y
41CONFIG_CMD_GREPENV=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]42CONFIG_CMD_MEMTEST=y
Stefan Roeseae9996c2015-11-18 11:06:09 +0100[diff] [blame]43# CONFIG_CMD_FLASH is not set
Tom Rini88663122017-08-14 19:58:53 -0400[diff] [blame]44CONFIG_CMD_GPIO=y
45CONFIG_CMD_I2C=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]46CONFIG_CMD_MMC=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]47CONFIG_CMD_SPI=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]48CONFIG_CMD_CACHE=y
Tom Rini78d1e1d2016-04-22 16:41:25 -0400[diff] [blame]49CONFIG_CMD_TIME=y
Tom Rini89cb2b52016-04-24 17:29:26 -0400[diff] [blame]50CONFIG_CMD_EXT4_WRITE=y
Tom Rini43ede0b2017-10-22 17:55:07 -0400[diff] [blame]51CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
Marek Vasut48f23dd2019-10-02 18:54:45 +0200[diff] [blame]52CONFIG_MTDPARTS_DEFAULT="mtdparts=ff705000.spi.0:1m(u-boot),256k(env1),256k(env2),14848k(boot),16m(rootfs),-@1536k(UBI)"
Heiko Schocher8f2fe0c2016-09-21 07:58:19 +0200[diff] [blame]53CONFIG_CMD_UBI=y
Tom Rini37dc72f2018-04-28 10:45:55 -0400[diff] [blame]54# CONFIG_ISO_PARTITION is not set
55# CONFIG_EFI_PARTITION is not set
Tom Rini5dc4dfd2017-08-28 07:16:32 -0400[diff] [blame]56CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinicb6617a2019-11-10 11:28:03 -0500[diff] [blame]57CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rini8d8ee472019-11-12 22:46:36 -0500[diff] [blame]58CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rini0817daa2020-10-09 12:22:06 -0400[diff] [blame]59CONFIG_VERSION_VARIABLE=y
Simon Glass4edb9452016-02-22 22:55:40 -0700[diff] [blame]60CONFIG_SPL_DM_SEQ_ALIAS=y
Lukasz Majewskid1ec9462018-02-09 23:50:57 +0100[diff] [blame]61CONFIG_BOOTCOUNT_LIMIT=y
Tom Rini64a2a7b2022-06-25 11:02:49 -0400[diff] [blame]62CONFIG_SYS_BOOTCOUNT_BE=y
Stefan Roeseae9996c2015-11-18 11:06:09 +0100[diff] [blame]63CONFIG_DWAPB_GPIO=y
Dinh Nguyen28789422018-04-04 17:18:21 -0500[diff] [blame]64CONFIG_DM_I2C=y
Stefan Roese4d5e9b32016-04-28 09:47:18 +0200[diff] [blame]65CONFIG_SYS_I2C_DW=y
Tom Rini75fc79e2022-10-28 20:27:05 -0400[diff] [blame]66CONFIG_SYS_MMC_MAX_BLK_COUNT=256
Masahiro Yamada55ed3b42017-01-10 13:32:04 +0900[diff] [blame]67CONFIG_MMC_DW=y
Miquel Raynal888f1842019-10-03 19:50:05 +0200[diff] [blame]68CONFIG_MTD=y
Stefan Roese93d9fc22016-03-03 16:57:39 +0100[diff] [blame]69CONFIG_SPI_FLASH_STMICRO=y
Simon Glass4edb9452016-02-22 22:55:40 -0700[diff] [blame]70# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Frieder Schrempf832ce202019-10-23 07:41:20 +0000[diff] [blame]71CONFIG_SPI_FLASH_MTD=y
Mario Sixa8ca5c82018-04-27 14:52:21 +0200[diff] [blame]72CONFIG_PHY_MARVELL=y
Tom Rini19893742017-08-07 22:00:34 -0400[diff] [blame]73CONFIG_PHY_GIGE=y
Stefan Roeseae9996c2015-11-18 11:06:09 +0100[diff] [blame]74CONFIG_ETH_DESIGNWARE=y
Adam Fordd7869b22018-07-20 23:03:57 -0500[diff] [blame]75CONFIG_MII=y
Adam Fordf1b1f772018-04-15 13:51:26 -0400[diff] [blame]76CONFIG_SPI=y
Stefan Roese93d9fc22016-03-03 16:57:39 +0100[diff] [blame]77CONFIG_CADENCE_QSPI=y
Simon Goldschmidte2636072019-10-05 22:10:11 +0200[diff] [blame]78# CONFIG_SPL_WDT is not set
Tom Rini3b8dfc42022-11-16 13:10:38 -0500[diff] [blame]79CONFIG_SYS_TIMER_COUNTS_DOWN=y