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Stefan Roese887e2ec2006-09-07 11:51:23 +02001/*
Stefan Roese46f37382008-04-08 10:31:00 +02002 * (C) Copyright 2006-2008
Stefan Roese887e2ec2006-09-07 11:51:23 +02003 * Stefan Roese, DENX Software Engineering, sr@denx.de.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21#include <common.h>
22#include <nand.h>
Stefan Roesec568f772008-01-05 16:49:37 +010023#include <asm/io.h>
Stefan Roese887e2ec2006-09-07 11:51:23 +020024
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020025#define CONFIG_SYS_NAND_READ_DELAY \
Stefan Roese887e2ec2006-09-07 11:51:23 +020026 { volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
27
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020028static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
Stefan Roese887e2ec2006-09-07 11:51:23 +020029
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020030#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
Stefan Roese46f37382008-04-08 10:31:00 +020031/*
32 * NAND command for small page NAND devices (512)
33 */
Stefan Roese42be56f2007-06-01 15:23:04 +020034static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
Stefan Roese887e2ec2006-09-07 11:51:23 +020035{
Wolfgang Denk511d0c72006-10-09 00:42:01 +020036 struct nand_chip *this = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020037 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
Stefan Roese42be56f2007-06-01 15:23:04 +020038
39 if (this->dev_ready)
Stefan Roesec568f772008-01-05 16:49:37 +010040 while (!this->dev_ready(mtd))
41 ;
Stefan Roese42be56f2007-06-01 15:23:04 +020042 else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020043 CONFIG_SYS_NAND_READ_DELAY;
Stefan Roese887e2ec2006-09-07 11:51:23 +020044
45 /* Begin command latch cycle */
Scott Wood4f32d772008-08-05 11:15:59 -050046 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Stefan Roese887e2ec2006-09-07 11:51:23 +020047 /* Set ALE and clear CLE to start address cycle */
Stefan Roese887e2ec2006-09-07 11:51:23 +020048 /* Column address */
Scott Wood4f32d772008-08-05 11:15:59 -050049 this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
50 this->cmd_ctrl(mtd, page_addr & 0xff, 0); /* A[16:9] */
51 this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff, 0); /* A[24:17] */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020052#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
Stefan Roese887e2ec2006-09-07 11:51:23 +020053 /* One more address cycle for devices > 32MiB */
Scott Wood4f32d772008-08-05 11:15:59 -050054 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, 0); /* A[28:25] */
Stefan Roese887e2ec2006-09-07 11:51:23 +020055#endif
56 /* Latch in address */
Stefan Roesec568f772008-01-05 16:49:37 +010057 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Stefan Roese887e2ec2006-09-07 11:51:23 +020058
59 /*
60 * Wait a while for the data to be ready
61 */
62 if (this->dev_ready)
Stefan Roesec568f772008-01-05 16:49:37 +010063 while (!this->dev_ready(mtd))
64 ;
Stefan Roese887e2ec2006-09-07 11:51:23 +020065 else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066 CONFIG_SYS_NAND_READ_DELAY;
Stefan Roese887e2ec2006-09-07 11:51:23 +020067
Stefan Roese42be56f2007-06-01 15:23:04 +020068 return 0;
69}
Stefan Roese46f37382008-04-08 10:31:00 +020070#else
71/*
72 * NAND command for large page NAND devices (2k)
73 */
74static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
75{
76 struct nand_chip *this = mtd->priv;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020077 int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
Stefan Roese46f37382008-04-08 10:31:00 +020078
79 if (this->dev_ready)
Scott Wood4f32d772008-08-05 11:15:59 -050080 while (!this->dev_ready(mtd))
81 ;
Stefan Roese46f37382008-04-08 10:31:00 +020082 else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083 CONFIG_SYS_NAND_READ_DELAY;
Stefan Roese46f37382008-04-08 10:31:00 +020084
85 /* Emulate NAND_CMD_READOOB */
86 if (cmd == NAND_CMD_READOOB) {
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020087 offs += CONFIG_SYS_NAND_PAGE_SIZE;
Stefan Roese46f37382008-04-08 10:31:00 +020088 cmd = NAND_CMD_READ0;
89 }
90
91 /* Begin command latch cycle */
Scott Wood4f32d772008-08-05 11:15:59 -050092 this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Stefan Roese46f37382008-04-08 10:31:00 +020093 /* Set ALE and clear CLE to start address cycle */
Stefan Roese46f37382008-04-08 10:31:00 +020094 /* Column address */
Scott Wood4f32d772008-08-05 11:15:59 -050095 this->cmd_ctrl(mtd, offs & 0xff,
Wolfgang Denk4b070802008-08-14 14:41:06 +020096 NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
Scott Wood4f32d772008-08-05 11:15:59 -050097 this->cmd_ctrl(mtd, (offs >> 8) & 0xff, 0); /* A[11:9] */
Stefan Roese46f37382008-04-08 10:31:00 +020098 /* Row address */
Scott Wood4f32d772008-08-05 11:15:59 -050099 this->cmd_ctrl(mtd, (page_addr & 0xff), 0); /* A[19:12] */
100 this->cmd_ctrl(mtd, ((page_addr >> 8) & 0xff), 0); /* A[27:20] */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200101#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
Stefan Roese46f37382008-04-08 10:31:00 +0200102 /* One more address cycle for devices > 128MiB */
Scott Wood4f32d772008-08-05 11:15:59 -0500103 this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f, 0); /* A[31:28] */
Stefan Roese46f37382008-04-08 10:31:00 +0200104#endif
105 /* Latch in address */
Scott Wood4f32d772008-08-05 11:15:59 -0500106 this->cmd_ctrl(mtd, NAND_CMD_READSTART,
Wolfgang Denk4b070802008-08-14 14:41:06 +0200107 NAND_CTRL_CLE | NAND_CTRL_CHANGE);
Scott Wood4f32d772008-08-05 11:15:59 -0500108 this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
Stefan Roese46f37382008-04-08 10:31:00 +0200109
110 /*
111 * Wait a while for the data to be ready
112 */
113 if (this->dev_ready)
Scott Wood4f32d772008-08-05 11:15:59 -0500114 while (!this->dev_ready(mtd))
115 ;
Stefan Roese46f37382008-04-08 10:31:00 +0200116 else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117 CONFIG_SYS_NAND_READ_DELAY;
Stefan Roese46f37382008-04-08 10:31:00 +0200118
119 return 0;
120}
121#endif
Stefan Roese42be56f2007-06-01 15:23:04 +0200122
123static int nand_is_bad_block(struct mtd_info *mtd, int block)
124{
125 struct nand_chip *this = mtd->priv;
126
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200127 nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
Stefan Roese42be56f2007-06-01 15:23:04 +0200128
Stefan Roese887e2ec2006-09-07 11:51:23 +0200129 /*
Marcel Ziswiler10c73822007-12-30 03:30:56 +0100130 * Read one byte
Stefan Roese887e2ec2006-09-07 11:51:23 +0200131 */
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200132 if (readb(this->IO_ADDR_R) != 0xff)
Stefan Roese887e2ec2006-09-07 11:51:23 +0200133 return 1;
134
135 return 0;
136}
137
138static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
139{
Wolfgang Denk511d0c72006-10-09 00:42:01 +0200140 struct nand_chip *this = mtd->priv;
Stefan Roese42be56f2007-06-01 15:23:04 +0200141 u_char *ecc_calc;
142 u_char *ecc_code;
143 u_char *oob_data;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200144 int i;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200145 int eccsize = CONFIG_SYS_NAND_ECCSIZE;
146 int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
147 int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
Stefan Roese42be56f2007-06-01 15:23:04 +0200148 uint8_t *p = dst;
149 int stat;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200150
Stefan Roese42be56f2007-06-01 15:23:04 +0200151 nand_command(mtd, block, page, 0, NAND_CMD_READ0);
Stefan Roese887e2ec2006-09-07 11:51:23 +0200152
Stefan Roese42be56f2007-06-01 15:23:04 +0200153 /* No malloc available for now, just use some temporary locations
154 * in SDRAM
Stefan Roese887e2ec2006-09-07 11:51:23 +0200155 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200156 ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
Stefan Roese42be56f2007-06-01 15:23:04 +0200157 ecc_code = ecc_calc + 0x100;
158 oob_data = ecc_calc + 0x200;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200159
Stefan Roese42be56f2007-06-01 15:23:04 +0200160 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
Stefan Roesec568f772008-01-05 16:49:37 +0100161 this->ecc.hwctl(mtd, NAND_ECC_READ);
Stefan Roese42be56f2007-06-01 15:23:04 +0200162 this->read_buf(mtd, p, eccsize);
Stefan Roesec568f772008-01-05 16:49:37 +0100163 this->ecc.calculate(mtd, p, &ecc_calc[i]);
Stefan Roese42be56f2007-06-01 15:23:04 +0200164 }
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
Stefan Roese42be56f2007-06-01 15:23:04 +0200166
167 /* Pick the ECC bytes out of the oob data */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200168 for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
Stefan Roese42be56f2007-06-01 15:23:04 +0200169 ecc_code[i] = oob_data[nand_ecc_pos[i]];
170
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171 eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
Stefan Roese42be56f2007-06-01 15:23:04 +0200172 p = dst;
173
174 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
175 /* No chance to do something with the possible error message
176 * from correct_data(). We just hope that all possible errors
177 * are corrected by this routine.
178 */
Stefan Roesec568f772008-01-05 16:49:37 +0100179 stat = this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
Stefan Roese42be56f2007-06-01 15:23:04 +0200180 }
Stefan Roese887e2ec2006-09-07 11:51:23 +0200181
182 return 0;
183}
184
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200185static int nand_load(struct mtd_info *mtd, unsigned int offs,
Wolfgang Denk4b070802008-08-14 14:41:06 +0200186 unsigned int uboot_size, uchar *dst)
Stefan Roese887e2ec2006-09-07 11:51:23 +0200187{
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200188 unsigned int block, lastblock;
189 unsigned int page;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200190
191 /*
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200192 * offs has to be aligned to a page address!
Stefan Roese887e2ec2006-09-07 11:51:23 +0200193 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200194 block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
195 lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
196 page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200197
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200198 while (block <= lastblock) {
Stefan Roese887e2ec2006-09-07 11:51:23 +0200199 if (!nand_is_bad_block(mtd, block)) {
200 /*
201 * Skip bad blocks
202 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200203 while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
Stefan Roese887e2ec2006-09-07 11:51:23 +0200204 nand_read_page(mtd, block, page, dst);
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200205 dst += CONFIG_SYS_NAND_PAGE_SIZE;
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200206 page++;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200207 }
208
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200209 page = 0;
210 } else {
211 lastblock++;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200212 }
213
214 block++;
215 }
216
217 return 0;
218}
219
Stefan Roese64852d02008-06-02 14:35:44 +0200220/*
221 * The main entry for NAND booting. It's necessary that SDRAM is already
222 * configured and available since this code loads the main U-Boot image
223 * from NAND into SDRAM and starts it from there.
224 */
Stefan Roese887e2ec2006-09-07 11:51:23 +0200225void nand_boot(void)
226{
Stefan Roese887e2ec2006-09-07 11:51:23 +0200227 struct nand_chip nand_chip;
228 nand_info_t nand_info;
229 int ret;
Scott Woode4c09502008-06-30 14:13:28 -0500230 __attribute__((noreturn)) void (*uboot)(void);
Stefan Roese887e2ec2006-09-07 11:51:23 +0200231
232 /*
Stefan Roese887e2ec2006-09-07 11:51:23 +0200233 * Init board specific nand support
234 */
235 nand_info.priv = &nand_chip;
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200236 nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200237 nand_chip.dev_ready = NULL; /* preset to NULL */
238 board_nand_init(&nand_chip);
239
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200240 if (nand_chip.select_chip)
241 nand_chip.select_chip(&nand_info, 0);
242
Stefan Roese887e2ec2006-09-07 11:51:23 +0200243 /*
244 * Load U-Boot image from NAND into RAM
245 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200246 ret = nand_load(&nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
247 (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
Stefan Roese887e2ec2006-09-07 11:51:23 +0200248
Guennadi Liakhovetskiaa646642008-08-06 21:42:07 +0200249 if (nand_chip.select_chip)
250 nand_chip.select_chip(&nand_info, -1);
251
Stefan Roese887e2ec2006-09-07 11:51:23 +0200252 /*
253 * Jump to U-Boot image
254 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255 uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
Stefan Roese887e2ec2006-09-07 11:51:23 +0200256 (*uboot)();
257}