Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 2 | /* |
Patrice Chotard | 3bc599c | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
| 9 | #include <errno.h> |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 10 | #include <log.h> |
Simon Glass | 336d461 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 11 | #include <malloc.h> |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 12 | #include <reset-uclass.h> |
Patrick Delaunay | d090cba | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 13 | #include <stm32_rcc.h> |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 14 | #include <asm/io.h> |
Simon Glass | cd93d62 | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 15 | #include <linux/bitops.h> |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 16 | |
Patrick Delaunay | a7519b3 | 2018-03-12 10:46:14 +0100 | [diff] [blame] | 17 | /* reset clear offset for STM32MP RCC */ |
| 18 | #define RCC_CL 0x4 |
| 19 | |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 20 | struct stm32_reset_priv { |
| 21 | fdt_addr_t base; |
| 22 | }; |
| 23 | |
| 24 | static int stm32_reset_request(struct reset_ctl *reset_ctl) |
| 25 | { |
| 26 | return 0; |
| 27 | } |
| 28 | |
| 29 | static int stm32_reset_free(struct reset_ctl *reset_ctl) |
| 30 | { |
| 31 | return 0; |
| 32 | } |
| 33 | |
| 34 | static int stm32_reset_assert(struct reset_ctl *reset_ctl) |
| 35 | { |
| 36 | struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev); |
| 37 | int bank = (reset_ctl->id / BITS_PER_LONG) * 4; |
| 38 | int offset = reset_ctl->id % BITS_PER_LONG; |
| 39 | debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__, |
| 40 | reset_ctl->id, bank, offset); |
| 41 | |
Patrick Delaunay | d090cba | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 42 | if (dev_get_driver_data(reset_ctl->dev) == STM32MP1) |
Patrick Delaunay | a7519b3 | 2018-03-12 10:46:14 +0100 | [diff] [blame] | 43 | /* reset assert is done in rcc set register */ |
| 44 | writel(BIT(offset), priv->base + bank); |
| 45 | else |
| 46 | setbits_le32(priv->base + bank, BIT(offset)); |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 47 | |
| 48 | return 0; |
| 49 | } |
| 50 | |
| 51 | static int stm32_reset_deassert(struct reset_ctl *reset_ctl) |
| 52 | { |
| 53 | struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev); |
| 54 | int bank = (reset_ctl->id / BITS_PER_LONG) * 4; |
| 55 | int offset = reset_ctl->id % BITS_PER_LONG; |
| 56 | debug("%s: reset id = %ld bank = %d offset = %d)\n", __func__, |
| 57 | reset_ctl->id, bank, offset); |
| 58 | |
Patrick Delaunay | d090cba | 2018-07-09 15:17:20 +0200 | [diff] [blame] | 59 | if (dev_get_driver_data(reset_ctl->dev) == STM32MP1) |
Patrick Delaunay | a7519b3 | 2018-03-12 10:46:14 +0100 | [diff] [blame] | 60 | /* reset deassert is done in rcc clr register */ |
| 61 | writel(BIT(offset), priv->base + bank + RCC_CL); |
| 62 | else |
| 63 | clrbits_le32(priv->base + bank, BIT(offset)); |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 64 | |
| 65 | return 0; |
| 66 | } |
| 67 | |
| 68 | static const struct reset_ops stm32_reset_ops = { |
| 69 | .request = stm32_reset_request, |
Simon Glass | 94474b2 | 2020-02-03 07:35:52 -0700 | [diff] [blame] | 70 | .rfree = stm32_reset_free, |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 71 | .rst_assert = stm32_reset_assert, |
| 72 | .rst_deassert = stm32_reset_deassert, |
| 73 | }; |
| 74 | |
| 75 | static int stm32_reset_probe(struct udevice *dev) |
| 76 | { |
| 77 | struct stm32_reset_priv *priv = dev_get_priv(dev); |
| 78 | |
Patrick Delaunay | a7519b3 | 2018-03-12 10:46:14 +0100 | [diff] [blame] | 79 | priv->base = dev_read_addr(dev); |
| 80 | if (priv->base == FDT_ADDR_T_NONE) { |
| 81 | /* for MFD, get address of parent */ |
| 82 | priv->base = dev_read_addr(dev->parent); |
| 83 | if (priv->base == FDT_ADDR_T_NONE) |
| 84 | return -EINVAL; |
| 85 | } |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 86 | |
| 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | U_BOOT_DRIVER(stm32_rcc_reset) = { |
| 91 | .name = "stm32_rcc_reset", |
| 92 | .id = UCLASS_RESET, |
Patrice Chotard | 23a0641 | 2017-09-13 18:00:07 +0200 | [diff] [blame] | 93 | .probe = stm32_reset_probe, |
| 94 | .priv_auto_alloc_size = sizeof(struct stm32_reset_priv), |
| 95 | .ops = &stm32_reset_ops, |
| 96 | }; |