blob: 371c1ec21230ba34ae42c822369628b0810bb6c6 [file] [log] [blame]
Andy Fleming272cc702008-10-30 16:41:01 -05001/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Andy Fleming272cc702008-10-30 16:41:01 -05008 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
Sjoerd Simons8e3332e2015-08-30 16:55:45 -060013#include <dm.h>
14#include <dm/device-internal.h>
Stephen Warrend4622df2014-05-23 12:47:06 -060015#include <errno.h>
Andy Fleming272cc702008-10-30 16:41:01 -050016#include <mmc.h>
17#include <part.h>
18#include <malloc.h>
19#include <linux/list.h>
Rabin Vincent9b1f9422009-04-05 13:30:54 +053020#include <div64.h>
Paul Burtonda61fa52013-09-09 15:30:26 +010021#include "mmc_private.h"
Andy Fleming272cc702008-10-30 16:41:01 -050022
23static struct list_head mmc_devices;
24static int cur_dev_num = -1;
25
Jeroen Hofstee750121c2014-07-12 21:24:08 +020026__weak int board_mmc_getwp(struct mmc *mmc)
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000027{
28 return -1;
29}
30
31int mmc_getwp(struct mmc *mmc)
32{
33 int wp;
34
35 wp = board_mmc_getwp(mmc);
36
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000037 if (wp < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020038 if (mmc->cfg->ops->getwp)
39 wp = mmc->cfg->ops->getwp(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +000040 else
41 wp = 0;
42 }
Nikita Kiryanovd23d8d72012-12-03 02:19:46 +000043
44 return wp;
45}
46
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +020047__weak int board_mmc_getcd(struct mmc *mmc)
48{
Stefano Babic11fdade2010-02-05 15:04:43 +010049 return -1;
50}
51
Paul Burtonda61fa52013-09-09 15:30:26 +010052int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
Andy Fleming272cc702008-10-30 16:41:01 -050053{
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000054 int ret;
Marek Vasut8635ff92012-03-15 18:41:35 +000055
Marek Vasut8635ff92012-03-15 18:41:35 +000056#ifdef CONFIG_MMC_TRACE
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000057 int i;
58 u8 *ptr;
59
60 printf("CMD_SEND:%d\n", cmd->cmdidx);
61 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
Pantelis Antoniou93bfd612014-03-11 19:34:20 +020062 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000063 switch (cmd->resp_type) {
64 case MMC_RSP_NONE:
65 printf("\t\tMMC_RSP_NONE\n");
66 break;
67 case MMC_RSP_R1:
68 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
69 cmd->response[0]);
70 break;
71 case MMC_RSP_R1b:
72 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
73 cmd->response[0]);
74 break;
75 case MMC_RSP_R2:
76 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
77 cmd->response[0]);
78 printf("\t\t \t\t 0x%08X \n",
79 cmd->response[1]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[2]);
82 printf("\t\t \t\t 0x%08X \n",
83 cmd->response[3]);
84 printf("\n");
85 printf("\t\t\t\t\tDUMPING DATA\n");
86 for (i = 0; i < 4; i++) {
87 int j;
88 printf("\t\t\t\t\t%03d - ", i*4);
Dirk Behme146bec72012-03-08 02:35:34 +000089 ptr = (u8 *)&cmd->response[i];
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +000090 ptr += 3;
91 for (j = 0; j < 4; j++)
92 printf("%02X ", *ptr--);
93 printf("\n");
94 }
95 break;
96 case MMC_RSP_R3:
97 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
98 cmd->response[0]);
99 break;
100 default:
101 printf("\t\tERROR MMC rsp not supported\n");
102 break;
103 }
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000104#else
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200105 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000106#endif
Marek Vasut8635ff92012-03-15 18:41:35 +0000107 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500108}
109
Paul Burtonda61fa52013-09-09 15:30:26 +0100110int mmc_send_status(struct mmc *mmc, int timeout)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000111{
112 struct mmc_cmd cmd;
Jan Kloetzked617c422012-02-05 22:29:12 +0000113 int err, retries = 5;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000114#ifdef CONFIG_MMC_TRACE
115 int status;
116#endif
117
118 cmd.cmdidx = MMC_CMD_SEND_STATUS;
119 cmd.resp_type = MMC_RSP_R1;
Marek Vasutaaf3d412011-08-10 09:24:48 +0200120 if (!mmc_host_is_spi(mmc))
121 cmd.cmdarg = mmc->rca << 16;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000122
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500123 while (1) {
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000124 err = mmc_send_cmd(mmc, &cmd, NULL);
Jan Kloetzked617c422012-02-05 22:29:12 +0000125 if (!err) {
126 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
127 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
128 MMC_STATE_PRG)
129 break;
130 else if (cmd.response[0] & MMC_STATUS_MASK) {
Paul Burton56196822013-09-04 16:12:25 +0100131#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Jan Kloetzked617c422012-02-05 22:29:12 +0000132 printf("Status Error: 0x%08X\n",
133 cmd.response[0]);
Paul Burton56196822013-09-04 16:12:25 +0100134#endif
Jan Kloetzked617c422012-02-05 22:29:12 +0000135 return COMM_ERR;
136 }
137 } else if (--retries < 0)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000138 return err;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000139
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500140 if (timeout-- <= 0)
141 break;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000142
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500143 udelay(1000);
144 }
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000145
Raffaele Recalcati5db2fe32011-03-11 02:01:14 +0000146#ifdef CONFIG_MMC_TRACE
147 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
148 printf("CURR STATE:%d\n", status);
149#endif
Jongman Heo5b0c9422012-06-03 21:32:13 +0000150 if (timeout <= 0) {
Paul Burton56196822013-09-04 16:12:25 +0100151#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000152 printf("Timeout waiting card ready\n");
Paul Burton56196822013-09-04 16:12:25 +0100153#endif
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000154 return TIMEOUT;
155 }
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500156 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
157 return SWITCH_ERR;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000158
159 return 0;
160}
161
Paul Burtonda61fa52013-09-09 15:30:26 +0100162int mmc_set_blocklen(struct mmc *mmc, int len)
Andy Fleming272cc702008-10-30 16:41:01 -0500163{
164 struct mmc_cmd cmd;
165
Andrew Gabbasov786e8f82014-12-01 06:59:09 -0600166 if (mmc->ddr_mode)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900167 return 0;
168
Andy Fleming272cc702008-10-30 16:41:01 -0500169 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
170 cmd.resp_type = MMC_RSP_R1;
171 cmd.cmdarg = len;
Andy Fleming272cc702008-10-30 16:41:01 -0500172
173 return mmc_send_cmd(mmc, &cmd, NULL);
174}
175
176struct mmc *find_mmc_device(int dev_num)
177{
178 struct mmc *m;
179 struct list_head *entry;
180
181 list_for_each(entry, &mmc_devices) {
182 m = list_entry(entry, struct mmc, link);
183
184 if (m->block_dev.dev == dev_num)
185 return m;
186 }
187
Paul Burton56196822013-09-04 16:12:25 +0100188#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -0500189 printf("MMC Device %d not found\n", dev_num);
Paul Burton56196822013-09-04 16:12:25 +0100190#endif
Andy Fleming272cc702008-10-30 16:41:01 -0500191
192 return NULL;
193}
194
Sascha Silbeff8fef52013-06-14 13:07:25 +0200195static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000196 lbaint_t blkcnt)
Andy Fleming272cc702008-10-30 16:41:01 -0500197{
198 struct mmc_cmd cmd;
199 struct mmc_data data;
200
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700201 if (blkcnt > 1)
202 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
203 else
204 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
Andy Fleming272cc702008-10-30 16:41:01 -0500205
206 if (mmc->high_capacity)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700207 cmd.cmdarg = start;
Andy Fleming272cc702008-10-30 16:41:01 -0500208 else
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700209 cmd.cmdarg = start * mmc->read_bl_len;
Andy Fleming272cc702008-10-30 16:41:01 -0500210
211 cmd.resp_type = MMC_RSP_R1;
Andy Fleming272cc702008-10-30 16:41:01 -0500212
213 data.dest = dst;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700214 data.blocks = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500215 data.blocksize = mmc->read_bl_len;
216 data.flags = MMC_DATA_READ;
217
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700218 if (mmc_send_cmd(mmc, &cmd, &data))
219 return 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500220
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700221 if (blkcnt > 1) {
222 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
223 cmd.cmdarg = 0;
224 cmd.resp_type = MMC_RSP_R1b;
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700225 if (mmc_send_cmd(mmc, &cmd, NULL)) {
Paul Burton56196822013-09-04 16:12:25 +0100226#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700227 printf("mmc fail to send stop cmd\n");
Paul Burton56196822013-09-04 16:12:25 +0100228#endif
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700229 return 0;
230 }
Andy Fleming272cc702008-10-30 16:41:01 -0500231 }
232
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700233 return blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500234}
235
Sascha Silbeff8fef52013-06-14 13:07:25 +0200236static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
Andy Fleming272cc702008-10-30 16:41:01 -0500237{
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700238 lbaint_t cur, blocks_todo = blkcnt;
Andy Fleming272cc702008-10-30 16:41:01 -0500239
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700240 if (blkcnt == 0)
241 return 0;
242
243 struct mmc *mmc = find_mmc_device(dev_num);
Andy Fleming272cc702008-10-30 16:41:01 -0500244 if (!mmc)
245 return 0;
246
Lei Wend2bf29e2010-09-13 22:07:27 +0800247 if ((start + blkcnt) > mmc->block_dev.lba) {
Paul Burton56196822013-09-04 16:12:25 +0100248#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Sascha Silbeff8fef52013-06-14 13:07:25 +0200249 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
Lei Wend2bf29e2010-09-13 22:07:27 +0800250 start + blkcnt, mmc->block_dev.lba);
Paul Burton56196822013-09-04 16:12:25 +0100251#endif
Lei Wend2bf29e2010-09-13 22:07:27 +0800252 return 0;
253 }
Andy Fleming272cc702008-10-30 16:41:01 -0500254
Simon Glass11692992015-06-23 15:38:50 -0600255 if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
256 debug("%s: Failed to set blocklen\n", __func__);
Andy Fleming272cc702008-10-30 16:41:01 -0500257 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600258 }
Andy Fleming272cc702008-10-30 16:41:01 -0500259
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700260 do {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200261 cur = (blocks_todo > mmc->cfg->b_max) ?
262 mmc->cfg->b_max : blocks_todo;
Simon Glass11692992015-06-23 15:38:50 -0600263 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
264 debug("%s: Failed to read blocks\n", __func__);
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700265 return 0;
Simon Glass11692992015-06-23 15:38:50 -0600266 }
Alagu Sankar4a1a06b2010-10-25 07:23:56 -0700267 blocks_todo -= cur;
268 start += cur;
269 dst += cur * mmc->read_bl_len;
270 } while (blocks_todo > 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500271
272 return blkcnt;
273}
274
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000275static int mmc_go_idle(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500276{
277 struct mmc_cmd cmd;
278 int err;
279
280 udelay(1000);
281
282 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
283 cmd.cmdarg = 0;
284 cmd.resp_type = MMC_RSP_NONE;
Andy Fleming272cc702008-10-30 16:41:01 -0500285
286 err = mmc_send_cmd(mmc, &cmd, NULL);
287
288 if (err)
289 return err;
290
291 udelay(2000);
292
293 return 0;
294}
295
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000296static int sd_send_op_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500297{
298 int timeout = 1000;
299 int err;
300 struct mmc_cmd cmd;
301
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500302 while (1) {
Andy Fleming272cc702008-10-30 16:41:01 -0500303 cmd.cmdidx = MMC_CMD_APP_CMD;
304 cmd.resp_type = MMC_RSP_R1;
305 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500306
307 err = mmc_send_cmd(mmc, &cmd, NULL);
308
309 if (err)
310 return err;
311
312 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
313 cmd.resp_type = MMC_RSP_R3;
Stefano Babic250de122010-01-20 18:20:39 +0100314
315 /*
316 * Most cards do not answer if some reserved bits
317 * in the ocr are set. However, Some controller
318 * can set bit 7 (reserved for low voltages), but
319 * how to manage low voltages SD card is not yet
320 * specified.
321 */
Thomas Choud52ebf12010-12-24 13:12:21 +0000322 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200323 (mmc->cfg->voltages & 0xff8000);
Andy Fleming272cc702008-10-30 16:41:01 -0500324
325 if (mmc->version == SD_VERSION_2)
326 cmd.cmdarg |= OCR_HCS;
327
328 err = mmc_send_cmd(mmc, &cmd, NULL);
329
330 if (err)
331 return err;
332
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500333 if (cmd.response[0] & OCR_BUSY)
334 break;
Andy Fleming272cc702008-10-30 16:41:01 -0500335
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500336 if (timeout-- <= 0)
337 return UNUSABLE_ERR;
338
339 udelay(1000);
340 }
Andy Fleming272cc702008-10-30 16:41:01 -0500341
342 if (mmc->version != SD_VERSION_2)
343 mmc->version = SD_VERSION_1_0;
344
Thomas Choud52ebf12010-12-24 13:12:21 +0000345 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
346 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
347 cmd.resp_type = MMC_RSP_R3;
348 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000349
350 err = mmc_send_cmd(mmc, &cmd, NULL);
351
352 if (err)
353 return err;
354 }
355
Rabin Vincent998be3d2009-04-05 13:30:56 +0530356 mmc->ocr = cmd.response[0];
Andy Fleming272cc702008-10-30 16:41:01 -0500357
358 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
359 mmc->rca = 0;
360
361 return 0;
362}
363
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500364static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
Andy Fleming272cc702008-10-30 16:41:01 -0500365{
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500366 struct mmc_cmd cmd;
Andy Fleming272cc702008-10-30 16:41:01 -0500367 int err;
368
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500369 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
370 cmd.resp_type = MMC_RSP_R3;
371 cmd.cmdarg = 0;
Rob Herring5a203972015-03-23 17:56:59 -0500372 if (use_arg && !mmc_host_is_spi(mmc))
373 cmd.cmdarg = OCR_HCS |
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200374 (mmc->cfg->voltages &
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500375 (mmc->ocr & OCR_VOLTAGE_MASK)) |
376 (mmc->ocr & OCR_ACCESS_MODE);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000377
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500378 err = mmc_send_cmd(mmc, &cmd, NULL);
Che-Liang Chioue9550442012-11-28 15:21:13 +0000379 if (err)
380 return err;
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500381 mmc->ocr = cmd.response[0];
Che-Liang Chioue9550442012-11-28 15:21:13 +0000382 return 0;
383}
384
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200385static int mmc_send_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000386{
Che-Liang Chioue9550442012-11-28 15:21:13 +0000387 int err, i;
388
Andy Fleming272cc702008-10-30 16:41:01 -0500389 /* Some cards seem to need this */
390 mmc_go_idle(mmc);
391
Raffaele Recalcati31cacba2011-03-11 02:01:13 +0000392 /* Asking to the card its capabilities */
Che-Liang Chioue9550442012-11-28 15:21:13 +0000393 for (i = 0; i < 2; i++) {
Andrew Gabbasov5289b532015-03-19 07:44:04 -0500394 err = mmc_send_op_cond_iter(mmc, i != 0);
Andy Fleming272cc702008-10-30 16:41:01 -0500395 if (err)
396 return err;
397
Che-Liang Chioue9550442012-11-28 15:21:13 +0000398 /* exit if not busy (flag seems to be inverted) */
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500399 if (mmc->ocr & OCR_BUSY)
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500400 break;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000401 }
Andrew Gabbasovbd47c132015-03-19 07:44:07 -0500402 mmc->op_cond_pending = 1;
403 return 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +0000404}
Andy Fleming272cc702008-10-30 16:41:01 -0500405
Jeroen Hofstee750121c2014-07-12 21:24:08 +0200406static int mmc_complete_op_cond(struct mmc *mmc)
Che-Liang Chioue9550442012-11-28 15:21:13 +0000407{
408 struct mmc_cmd cmd;
409 int timeout = 1000;
410 uint start;
411 int err;
412
413 mmc->op_cond_pending = 0;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500414 if (!(mmc->ocr & OCR_BUSY)) {
415 start = get_timer(0);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500416 while (1) {
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500417 err = mmc_send_op_cond_iter(mmc, 1);
418 if (err)
419 return err;
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500420 if (mmc->ocr & OCR_BUSY)
421 break;
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500422 if (get_timer(start) > timeout)
423 return UNUSABLE_ERR;
424 udelay(100);
Andrew Gabbasov1677eef2015-03-19 07:44:06 -0500425 }
Andrew Gabbasovcc17c012015-03-19 07:44:05 -0500426 }
Andy Fleming272cc702008-10-30 16:41:01 -0500427
Thomas Choud52ebf12010-12-24 13:12:21 +0000428 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
429 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
430 cmd.resp_type = MMC_RSP_R3;
431 cmd.cmdarg = 0;
Thomas Choud52ebf12010-12-24 13:12:21 +0000432
433 err = mmc_send_cmd(mmc, &cmd, NULL);
434
435 if (err)
436 return err;
Andrew Gabbasova626c8d2015-03-19 07:44:03 -0500437
438 mmc->ocr = cmd.response[0];
Thomas Choud52ebf12010-12-24 13:12:21 +0000439 }
440
Andy Fleming272cc702008-10-30 16:41:01 -0500441 mmc->version = MMC_VERSION_UNKNOWN;
Andy Fleming272cc702008-10-30 16:41:01 -0500442
443 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
Stephen Warrendef816a2014-01-30 16:11:12 -0700444 mmc->rca = 1;
Andy Fleming272cc702008-10-30 16:41:01 -0500445
446 return 0;
447}
448
449
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000450static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
Andy Fleming272cc702008-10-30 16:41:01 -0500451{
452 struct mmc_cmd cmd;
453 struct mmc_data data;
454 int err;
455
456 /* Get the Card Status Register */
457 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
458 cmd.resp_type = MMC_RSP_R1;
459 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500460
Yoshihiro Shimodacdfd1ac2012-06-07 19:09:11 +0000461 data.dest = (char *)ext_csd;
Andy Fleming272cc702008-10-30 16:41:01 -0500462 data.blocks = 1;
Simon Glass8bfa1952013-04-03 08:54:30 +0000463 data.blocksize = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -0500464 data.flags = MMC_DATA_READ;
465
466 err = mmc_send_cmd(mmc, &cmd, &data);
467
468 return err;
469}
470
471
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000472static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
Andy Fleming272cc702008-10-30 16:41:01 -0500473{
474 struct mmc_cmd cmd;
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000475 int timeout = 1000;
476 int ret;
Andy Fleming272cc702008-10-30 16:41:01 -0500477
478 cmd.cmdidx = MMC_CMD_SWITCH;
479 cmd.resp_type = MMC_RSP_R1b;
480 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000481 (index << 16) |
482 (value << 8);
Andy Fleming272cc702008-10-30 16:41:01 -0500483
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000484 ret = mmc_send_cmd(mmc, &cmd, NULL);
485
486 /* Waiting for the ready status */
Jan Kloetzke93ad0d12012-02-05 22:29:11 +0000487 if (!ret)
488 ret = mmc_send_status(mmc, timeout);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +0000489
490 return ret;
491
Andy Fleming272cc702008-10-30 16:41:01 -0500492}
493
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000494static int mmc_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500495{
Simon Glass8bfa1952013-04-03 08:54:30 +0000496 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
Andy Fleming272cc702008-10-30 16:41:01 -0500497 char cardtype;
498 int err;
499
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600500 mmc->card_caps = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500501
Thomas Choud52ebf12010-12-24 13:12:21 +0000502 if (mmc_host_is_spi(mmc))
503 return 0;
504
Andy Fleming272cc702008-10-30 16:41:01 -0500505 /* Only version 4 supports high-speed */
506 if (mmc->version < MMC_VERSION_4)
507 return 0;
508
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -0600509 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
510
Andy Fleming272cc702008-10-30 16:41:01 -0500511 err = mmc_send_ext_csd(mmc, ext_csd);
512
513 if (err)
514 return err;
515
Lei Wen0560db12011-10-03 20:35:10 +0000516 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -0500517
518 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
519
520 if (err)
Andrew Gabbasov6b2221b2014-04-03 04:34:32 -0500521 return err == SWITCH_ERR ? 0 : err;
Andy Fleming272cc702008-10-30 16:41:01 -0500522
523 /* Now check to see that it worked */
524 err = mmc_send_ext_csd(mmc, ext_csd);
525
526 if (err)
527 return err;
528
529 /* No high-speed support */
Lei Wen0560db12011-10-03 20:35:10 +0000530 if (!ext_csd[EXT_CSD_HS_TIMING])
Andy Fleming272cc702008-10-30 16:41:01 -0500531 return 0;
532
533 /* High Speed is set, there are two types: 52MHz and 26MHz */
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900534 if (cardtype & EXT_CSD_CARD_TYPE_52) {
Andrew Gabbasov201d5ac2014-12-01 06:59:10 -0600535 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900536 mmc->card_caps |= MMC_MODE_DDR_52MHz;
Andy Fleming272cc702008-10-30 16:41:01 -0500537 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900538 } else {
Andy Fleming272cc702008-10-30 16:41:01 -0500539 mmc->card_caps |= MMC_MODE_HS;
Jaehoon Chungd22e3d42014-05-16 13:59:54 +0900540 }
Andy Fleming272cc702008-10-30 16:41:01 -0500541
542 return 0;
543}
544
Stephen Warrenf866a462013-06-11 15:14:01 -0600545static int mmc_set_capacity(struct mmc *mmc, int part_num)
546{
547 switch (part_num) {
548 case 0:
549 mmc->capacity = mmc->capacity_user;
550 break;
551 case 1:
552 case 2:
553 mmc->capacity = mmc->capacity_boot;
554 break;
555 case 3:
556 mmc->capacity = mmc->capacity_rpmb;
557 break;
558 case 4:
559 case 5:
560 case 6:
561 case 7:
562 mmc->capacity = mmc->capacity_gp[part_num - 4];
563 break;
564 default:
565 return -1;
566 }
567
568 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
569
570 return 0;
571}
572
Stephen Warrend2356282014-05-07 12:19:02 -0600573int mmc_select_hwpart(int dev_num, int hwpart)
574{
575 struct mmc *mmc = find_mmc_device(dev_num);
576 int ret;
577
578 if (!mmc)
Stephen Warrend4622df2014-05-23 12:47:06 -0600579 return -ENODEV;
Stephen Warrend2356282014-05-07 12:19:02 -0600580
581 if (mmc->part_num == hwpart)
582 return 0;
583
584 if (mmc->part_config == MMCPART_NOAVAILABLE) {
585 printf("Card doesn't support part_switch\n");
Stephen Warrend4622df2014-05-23 12:47:06 -0600586 return -EMEDIUMTYPE;
Stephen Warrend2356282014-05-07 12:19:02 -0600587 }
588
589 ret = mmc_switch_part(dev_num, hwpart);
590 if (ret)
Stephen Warrend4622df2014-05-23 12:47:06 -0600591 return ret;
Stephen Warrend2356282014-05-07 12:19:02 -0600592
593 mmc->part_num = hwpart;
594
595 return 0;
596}
597
598
Lei Wenbc897b12011-05-02 16:26:26 +0000599int mmc_switch_part(int dev_num, unsigned int part_num)
600{
601 struct mmc *mmc = find_mmc_device(dev_num);
Stephen Warrenf866a462013-06-11 15:14:01 -0600602 int ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000603
604 if (!mmc)
605 return -1;
606
Stephen Warrenf866a462013-06-11 15:14:01 -0600607 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
608 (mmc->part_config & ~PART_ACCESS_MASK)
609 | (part_num & PART_ACCESS_MASK));
Stephen Warrenf866a462013-06-11 15:14:01 -0600610
Peter Bigot6dc93e72014-09-02 18:31:23 -0500611 /*
612 * Set the capacity if the switch succeeded or was intended
613 * to return to representing the raw device.
614 */
615 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
616 ret = mmc_set_capacity(mmc, part_num);
617
618 return ret;
Lei Wenbc897b12011-05-02 16:26:26 +0000619}
620
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100621int mmc_hwpart_config(struct mmc *mmc,
622 const struct mmc_hwpart_conf *conf,
623 enum mmc_hwpart_conf_mode mode)
624{
625 u8 part_attrs = 0;
626 u32 enh_size_mult;
627 u32 enh_start_addr;
628 u32 gp_size_mult[4];
629 u32 max_enh_size_mult;
630 u32 tot_enh_size_mult = 0;
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100631 u8 wr_rel_set;
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100632 int i, pidx, err;
633 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
634
635 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
636 return -EINVAL;
637
638 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
639 printf("eMMC >= 4.4 required for enhanced user data area\n");
640 return -EMEDIUMTYPE;
641 }
642
643 if (!(mmc->part_support & PART_SUPPORT)) {
644 printf("Card does not support partitioning\n");
645 return -EMEDIUMTYPE;
646 }
647
648 if (!mmc->hc_wp_grp_size) {
649 printf("Card does not define HC WP group size\n");
650 return -EMEDIUMTYPE;
651 }
652
653 /* check partition alignment and total enhanced size */
654 if (conf->user.enh_size) {
655 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
656 conf->user.enh_start % mmc->hc_wp_grp_size) {
657 printf("User data enhanced area not HC WP group "
658 "size aligned\n");
659 return -EINVAL;
660 }
661 part_attrs |= EXT_CSD_ENH_USR;
662 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
663 if (mmc->high_capacity) {
664 enh_start_addr = conf->user.enh_start;
665 } else {
666 enh_start_addr = (conf->user.enh_start << 9);
667 }
668 } else {
669 enh_size_mult = 0;
670 enh_start_addr = 0;
671 }
672 tot_enh_size_mult += enh_size_mult;
673
674 for (pidx = 0; pidx < 4; pidx++) {
675 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
676 printf("GP%i partition not HC WP group size "
677 "aligned\n", pidx+1);
678 return -EINVAL;
679 }
680 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
681 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
682 part_attrs |= EXT_CSD_ENH_GP(pidx);
683 tot_enh_size_mult += gp_size_mult[pidx];
684 }
685 }
686
687 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
688 printf("Card does not support enhanced attribute\n");
689 return -EMEDIUMTYPE;
690 }
691
692 err = mmc_send_ext_csd(mmc, ext_csd);
693 if (err)
694 return err;
695
696 max_enh_size_mult =
697 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
698 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
699 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
700 if (tot_enh_size_mult > max_enh_size_mult) {
701 printf("Total enhanced size exceeds maximum (%u > %u)\n",
702 tot_enh_size_mult, max_enh_size_mult);
703 return -EMEDIUMTYPE;
704 }
705
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100706 /* The default value of EXT_CSD_WR_REL_SET is device
707 * dependent, the values can only be changed if the
708 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
709 * changed only once and before partitioning is completed. */
710 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
711 if (conf->user.wr_rel_change) {
712 if (conf->user.wr_rel_set)
713 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
714 else
715 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
716 }
717 for (pidx = 0; pidx < 4; pidx++) {
718 if (conf->gp_part[pidx].wr_rel_change) {
719 if (conf->gp_part[pidx].wr_rel_set)
720 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
721 else
722 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
723 }
724 }
725
726 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
727 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
728 puts("Card does not support host controlled partition write "
729 "reliability settings\n");
730 return -EMEDIUMTYPE;
731 }
732
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100733 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
734 EXT_CSD_PARTITION_SETTING_COMPLETED) {
735 printf("Card already partitioned\n");
736 return -EPERM;
737 }
738
739 if (mode == MMC_HWPART_CONF_CHECK)
740 return 0;
741
742 /* Partitioning requires high-capacity size definitions */
743 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
744 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
745 EXT_CSD_ERASE_GROUP_DEF, 1);
746
747 if (err)
748 return err;
749
750 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
751
752 /* update erase group size to be high-capacity */
753 mmc->erase_grp_size =
754 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
755
756 }
757
758 /* all OK, write the configuration */
759 for (i = 0; i < 4; i++) {
760 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
761 EXT_CSD_ENH_START_ADDR+i,
762 (enh_start_addr >> (i*8)) & 0xFF);
763 if (err)
764 return err;
765 }
766 for (i = 0; i < 3; i++) {
767 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
768 EXT_CSD_ENH_SIZE_MULT+i,
769 (enh_size_mult >> (i*8)) & 0xFF);
770 if (err)
771 return err;
772 }
773 for (pidx = 0; pidx < 4; pidx++) {
774 for (i = 0; i < 3; i++) {
775 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
776 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
777 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
778 if (err)
779 return err;
780 }
781 }
782 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
783 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
784 if (err)
785 return err;
786
787 if (mode == MMC_HWPART_CONF_SET)
788 return 0;
789
Diego Santa Cruz8dda5b0e2014-12-23 10:50:31 +0100790 /* The WR_REL_SET is a write-once register but shall be
791 * written before setting PART_SETTING_COMPLETED. As it is
792 * write-once we can only write it when completing the
793 * partitioning. */
794 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
795 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
796 EXT_CSD_WR_REL_SET, wr_rel_set);
797 if (err)
798 return err;
799 }
800
Diego Santa Cruzac9da0e2014-12-23 10:50:29 +0100801 /* Setting PART_SETTING_COMPLETED confirms the partition
802 * configuration but it only becomes effective after power
803 * cycle, so we do not adjust the partition related settings
804 * in the mmc struct. */
805
806 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
807 EXT_CSD_PARTITION_SETTING,
808 EXT_CSD_PARTITION_SETTING_COMPLETED);
809 if (err)
810 return err;
811
812 return 0;
813}
814
Thierry Reding48972d92012-01-02 01:15:37 +0000815int mmc_getcd(struct mmc *mmc)
816{
817 int cd;
818
819 cd = board_mmc_getcd(mmc);
820
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000821 if (cd < 0) {
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200822 if (mmc->cfg->ops->getcd)
823 cd = mmc->cfg->ops->getcd(mmc);
Peter Korsgaardd4e1da42013-03-21 04:00:03 +0000824 else
825 cd = 1;
826 }
Thierry Reding48972d92012-01-02 01:15:37 +0000827
828 return cd;
829}
830
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000831static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
Andy Fleming272cc702008-10-30 16:41:01 -0500832{
833 struct mmc_cmd cmd;
834 struct mmc_data data;
835
836 /* Switch the frequency */
837 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
838 cmd.resp_type = MMC_RSP_R1;
839 cmd.cmdarg = (mode << 31) | 0xffffff;
840 cmd.cmdarg &= ~(0xf << (group * 4));
841 cmd.cmdarg |= value << (group * 4);
Andy Fleming272cc702008-10-30 16:41:01 -0500842
843 data.dest = (char *)resp;
844 data.blocksize = 64;
845 data.blocks = 1;
846 data.flags = MMC_DATA_READ;
847
848 return mmc_send_cmd(mmc, &cmd, &data);
849}
850
851
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000852static int sd_change_freq(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500853{
854 int err;
855 struct mmc_cmd cmd;
Anton staaff781dd32011-10-03 13:54:59 +0000856 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
857 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
Andy Fleming272cc702008-10-30 16:41:01 -0500858 struct mmc_data data;
859 int timeout;
860
861 mmc->card_caps = 0;
862
Thomas Choud52ebf12010-12-24 13:12:21 +0000863 if (mmc_host_is_spi(mmc))
864 return 0;
865
Andy Fleming272cc702008-10-30 16:41:01 -0500866 /* Read the SCR to find out if this card supports higher speeds */
867 cmd.cmdidx = MMC_CMD_APP_CMD;
868 cmd.resp_type = MMC_RSP_R1;
869 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -0500870
871 err = mmc_send_cmd(mmc, &cmd, NULL);
872
873 if (err)
874 return err;
875
876 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
877 cmd.resp_type = MMC_RSP_R1;
878 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -0500879
880 timeout = 3;
881
882retry_scr:
Anton staaff781dd32011-10-03 13:54:59 +0000883 data.dest = (char *)scr;
Andy Fleming272cc702008-10-30 16:41:01 -0500884 data.blocksize = 8;
885 data.blocks = 1;
886 data.flags = MMC_DATA_READ;
887
888 err = mmc_send_cmd(mmc, &cmd, &data);
889
890 if (err) {
891 if (timeout--)
892 goto retry_scr;
893
894 return err;
895 }
896
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300897 mmc->scr[0] = __be32_to_cpu(scr[0]);
898 mmc->scr[1] = __be32_to_cpu(scr[1]);
Andy Fleming272cc702008-10-30 16:41:01 -0500899
900 switch ((mmc->scr[0] >> 24) & 0xf) {
901 case 0:
902 mmc->version = SD_VERSION_1_0;
903 break;
904 case 1:
905 mmc->version = SD_VERSION_1_10;
906 break;
907 case 2:
908 mmc->version = SD_VERSION_2;
Jaehoon Chung1741c642013-01-29 22:58:16 +0000909 if ((mmc->scr[0] >> 15) & 0x1)
910 mmc->version = SD_VERSION_3;
Andy Fleming272cc702008-10-30 16:41:01 -0500911 break;
912 default:
913 mmc->version = SD_VERSION_1_0;
914 break;
915 }
916
Alagu Sankarb44c7082010-05-12 15:08:24 +0530917 if (mmc->scr[0] & SD_DATA_4BIT)
918 mmc->card_caps |= MMC_MODE_4BIT;
919
Andy Fleming272cc702008-10-30 16:41:01 -0500920 /* Version 1.0 doesn't support switching */
921 if (mmc->version == SD_VERSION_1_0)
922 return 0;
923
924 timeout = 4;
925 while (timeout--) {
926 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
Anton staaff781dd32011-10-03 13:54:59 +0000927 (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500928
929 if (err)
930 return err;
931
932 /* The high-speed function is busy. Try again */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300933 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
Andy Fleming272cc702008-10-30 16:41:01 -0500934 break;
935 }
936
Andy Fleming272cc702008-10-30 16:41:01 -0500937 /* If high-speed isn't supported, we return */
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300938 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
Andy Fleming272cc702008-10-30 16:41:01 -0500939 return 0;
940
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000941 /*
942 * If the host doesn't support SD_HIGHSPEED, do not switch card to
943 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
944 * This can avoid furthur problem when the card runs in different
945 * mode between the host.
946 */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200947 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
948 (mmc->cfg->host_caps & MMC_MODE_HS)))
Macpaul Lin2c3fbf42011-11-28 16:31:09 +0000949 return 0;
950
Anton staaff781dd32011-10-03 13:54:59 +0000951 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
Andy Fleming272cc702008-10-30 16:41:01 -0500952
953 if (err)
954 return err;
955
Yauhen Kharuzhy4e3d89b2009-05-07 00:43:30 +0300956 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
Andy Fleming272cc702008-10-30 16:41:01 -0500957 mmc->card_caps |= MMC_MODE_HS;
958
959 return 0;
960}
961
962/* frequency bases */
963/* divided by 10 to be nice to platforms without floating point */
Mike Frysinger5f837c22010-10-20 01:15:53 +0000964static const int fbase[] = {
Andy Fleming272cc702008-10-30 16:41:01 -0500965 10000,
966 100000,
967 1000000,
968 10000000,
969};
970
971/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
972 * to platforms without floating point.
973 */
Mike Frysinger5f837c22010-10-20 01:15:53 +0000974static const int multipliers[] = {
Andy Fleming272cc702008-10-30 16:41:01 -0500975 0, /* reserved */
976 10,
977 12,
978 13,
979 15,
980 20,
981 25,
982 30,
983 35,
984 40,
985 45,
986 50,
987 55,
988 60,
989 70,
990 80,
991};
992
Kim Phillipsfdbb8732012-10-29 13:34:43 +0000993static void mmc_set_ios(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -0500994{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +0200995 if (mmc->cfg->ops->set_ios)
996 mmc->cfg->ops->set_ios(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -0500997}
998
999void mmc_set_clock(struct mmc *mmc, uint clock)
1000{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001001 if (clock > mmc->cfg->f_max)
1002 clock = mmc->cfg->f_max;
Andy Fleming272cc702008-10-30 16:41:01 -05001003
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001004 if (clock < mmc->cfg->f_min)
1005 clock = mmc->cfg->f_min;
Andy Fleming272cc702008-10-30 16:41:01 -05001006
1007 mmc->clock = clock;
1008
1009 mmc_set_ios(mmc);
1010}
1011
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001012static void mmc_set_bus_width(struct mmc *mmc, uint width)
Andy Fleming272cc702008-10-30 16:41:01 -05001013{
1014 mmc->bus_width = width;
1015
1016 mmc_set_ios(mmc);
1017}
1018
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001019static int mmc_startup(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001020{
Stephen Warrenf866a462013-06-11 15:14:01 -06001021 int err, i;
Andy Fleming272cc702008-10-30 16:41:01 -05001022 uint mult, freq;
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001023 u64 cmult, csize, capacity;
Andy Fleming272cc702008-10-30 16:41:01 -05001024 struct mmc_cmd cmd;
Simon Glass8bfa1952013-04-03 08:54:30 +00001025 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1026 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001027 int timeout = 1000;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001028 bool has_parts = false;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001029 bool part_completed;
Andy Fleming272cc702008-10-30 16:41:01 -05001030
Thomas Choud52ebf12010-12-24 13:12:21 +00001031#ifdef CONFIG_MMC_SPI_CRC_ON
1032 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1033 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1034 cmd.resp_type = MMC_RSP_R1;
1035 cmd.cmdarg = 1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001036 err = mmc_send_cmd(mmc, &cmd, NULL);
1037
1038 if (err)
1039 return err;
1040 }
1041#endif
1042
Andy Fleming272cc702008-10-30 16:41:01 -05001043 /* Put the Card in Identify Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001044 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1045 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
Andy Fleming272cc702008-10-30 16:41:01 -05001046 cmd.resp_type = MMC_RSP_R2;
1047 cmd.cmdarg = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001048
1049 err = mmc_send_cmd(mmc, &cmd, NULL);
1050
1051 if (err)
1052 return err;
1053
1054 memcpy(mmc->cid, cmd.response, 16);
1055
1056 /*
1057 * For MMC cards, set the Relative Address.
1058 * For SD cards, get the Relatvie Address.
1059 * This also puts the cards into Standby State
1060 */
Thomas Choud52ebf12010-12-24 13:12:21 +00001061 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1062 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1063 cmd.cmdarg = mmc->rca << 16;
1064 cmd.resp_type = MMC_RSP_R6;
Andy Fleming272cc702008-10-30 16:41:01 -05001065
Thomas Choud52ebf12010-12-24 13:12:21 +00001066 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001067
Thomas Choud52ebf12010-12-24 13:12:21 +00001068 if (err)
1069 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001070
Thomas Choud52ebf12010-12-24 13:12:21 +00001071 if (IS_SD(mmc))
1072 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1073 }
Andy Fleming272cc702008-10-30 16:41:01 -05001074
1075 /* Get the Card-Specific Data */
1076 cmd.cmdidx = MMC_CMD_SEND_CSD;
1077 cmd.resp_type = MMC_RSP_R2;
1078 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001079
1080 err = mmc_send_cmd(mmc, &cmd, NULL);
1081
Raffaele Recalcati5d4fc8d2011-03-11 02:01:12 +00001082 /* Waiting for the ready status */
1083 mmc_send_status(mmc, timeout);
1084
Andy Fleming272cc702008-10-30 16:41:01 -05001085 if (err)
1086 return err;
1087
Rabin Vincent998be3d2009-04-05 13:30:56 +05301088 mmc->csd[0] = cmd.response[0];
1089 mmc->csd[1] = cmd.response[1];
1090 mmc->csd[2] = cmd.response[2];
1091 mmc->csd[3] = cmd.response[3];
Andy Fleming272cc702008-10-30 16:41:01 -05001092
1093 if (mmc->version == MMC_VERSION_UNKNOWN) {
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301094 int version = (cmd.response[0] >> 26) & 0xf;
Andy Fleming272cc702008-10-30 16:41:01 -05001095
1096 switch (version) {
1097 case 0:
1098 mmc->version = MMC_VERSION_1_2;
1099 break;
1100 case 1:
1101 mmc->version = MMC_VERSION_1_4;
1102 break;
1103 case 2:
1104 mmc->version = MMC_VERSION_2_2;
1105 break;
1106 case 3:
1107 mmc->version = MMC_VERSION_3;
1108 break;
1109 case 4:
1110 mmc->version = MMC_VERSION_4;
1111 break;
1112 default:
1113 mmc->version = MMC_VERSION_1_2;
1114 break;
1115 }
1116 }
1117
1118 /* divide frequency by 10, since the mults are 10x bigger */
Rabin Vincent0b453ff2009-04-05 13:30:55 +05301119 freq = fbase[(cmd.response[0] & 0x7)];
1120 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
Andy Fleming272cc702008-10-30 16:41:01 -05001121
1122 mmc->tran_speed = freq * mult;
1123
Markus Niebelab711882013-12-16 13:40:46 +01001124 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
Rabin Vincent998be3d2009-04-05 13:30:56 +05301125 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001126
1127 if (IS_SD(mmc))
1128 mmc->write_bl_len = mmc->read_bl_len;
1129 else
Rabin Vincent998be3d2009-04-05 13:30:56 +05301130 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
Andy Fleming272cc702008-10-30 16:41:01 -05001131
1132 if (mmc->high_capacity) {
1133 csize = (mmc->csd[1] & 0x3f) << 16
1134 | (mmc->csd[2] & 0xffff0000) >> 16;
1135 cmult = 8;
1136 } else {
1137 csize = (mmc->csd[1] & 0x3ff) << 2
1138 | (mmc->csd[2] & 0xc0000000) >> 30;
1139 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1140 }
1141
Stephen Warrenf866a462013-06-11 15:14:01 -06001142 mmc->capacity_user = (csize + 1) << (cmult + 2);
1143 mmc->capacity_user *= mmc->read_bl_len;
1144 mmc->capacity_boot = 0;
1145 mmc->capacity_rpmb = 0;
1146 for (i = 0; i < 4; i++)
1147 mmc->capacity_gp[i] = 0;
Andy Fleming272cc702008-10-30 16:41:01 -05001148
Simon Glass8bfa1952013-04-03 08:54:30 +00001149 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1150 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001151
Simon Glass8bfa1952013-04-03 08:54:30 +00001152 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1153 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
Andy Fleming272cc702008-10-30 16:41:01 -05001154
Markus Niebelab711882013-12-16 13:40:46 +01001155 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1156 cmd.cmdidx = MMC_CMD_SET_DSR;
1157 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1158 cmd.resp_type = MMC_RSP_NONE;
1159 if (mmc_send_cmd(mmc, &cmd, NULL))
1160 printf("MMC: SET_DSR failed\n");
1161 }
1162
Andy Fleming272cc702008-10-30 16:41:01 -05001163 /* Select the card, and put it into Transfer Mode */
Thomas Choud52ebf12010-12-24 13:12:21 +00001164 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1165 cmd.cmdidx = MMC_CMD_SELECT_CARD;
Ajay Bhargavfe8f7062011-10-05 03:13:23 +00001166 cmd.resp_type = MMC_RSP_R1;
Thomas Choud52ebf12010-12-24 13:12:21 +00001167 cmd.cmdarg = mmc->rca << 16;
Thomas Choud52ebf12010-12-24 13:12:21 +00001168 err = mmc_send_cmd(mmc, &cmd, NULL);
Andy Fleming272cc702008-10-30 16:41:01 -05001169
Thomas Choud52ebf12010-12-24 13:12:21 +00001170 if (err)
1171 return err;
1172 }
Andy Fleming272cc702008-10-30 16:41:01 -05001173
Lei Wene6f99a52011-06-22 17:03:31 +00001174 /*
1175 * For SD, its erase group is always one sector
1176 */
1177 mmc->erase_grp_size = 1;
Lei Wenbc897b12011-05-02 16:26:26 +00001178 mmc->part_config = MMCPART_NOAVAILABLE;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301179 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1180 /* check ext_csd version and capacity */
1181 err = mmc_send_ext_csd(mmc, ext_csd);
Diego Santa Cruz9cf199e2014-12-23 10:50:28 +01001182 if (err)
1183 return err;
1184 if (ext_csd[EXT_CSD_REV] >= 2) {
Yoshihiro Shimoda639b7822011-07-04 22:13:26 +00001185 /*
1186 * According to the JEDEC Standard, the value of
1187 * ext_csd's capacity is valid if the value is more
1188 * than 2GB
1189 */
Lei Wen0560db12011-10-03 20:35:10 +00001190 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1191 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1192 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1193 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
Simon Glass8bfa1952013-04-03 08:54:30 +00001194 capacity *= MMC_MAX_BLOCK_LEN;
Łukasz Majewskib1f1e8212011-07-05 02:19:44 +00001195 if ((capacity >> 20) > 2 * 1024)
Stephen Warrenf866a462013-06-11 15:14:01 -06001196 mmc->capacity_user = capacity;
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301197 }
Lei Wenbc897b12011-05-02 16:26:26 +00001198
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001199 switch (ext_csd[EXT_CSD_REV]) {
1200 case 1:
1201 mmc->version = MMC_VERSION_4_1;
1202 break;
1203 case 2:
1204 mmc->version = MMC_VERSION_4_2;
1205 break;
1206 case 3:
1207 mmc->version = MMC_VERSION_4_3;
1208 break;
1209 case 5:
1210 mmc->version = MMC_VERSION_4_41;
1211 break;
1212 case 6:
1213 mmc->version = MMC_VERSION_4_5;
1214 break;
Markus Niebeledab7232014-11-18 15:13:53 +01001215 case 7:
1216 mmc->version = MMC_VERSION_5_0;
1217 break;
Jaehoon Chung64f4a612013-01-29 19:31:16 +00001218 }
1219
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001220 /* The partition data may be non-zero but it is only
1221 * effective if PARTITION_SETTING_COMPLETED is set in
1222 * EXT_CSD, so ignore any data if this bit is not set,
1223 * except for enabling the high-capacity group size
1224 * definition (see below). */
1225 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1226 EXT_CSD_PARTITION_SETTING_COMPLETED);
1227
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001228 /* store the partition info of emmc */
1229 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1230 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1231 ext_csd[EXT_CSD_BOOT_MULT])
1232 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001233 if (part_completed &&
1234 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001235 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1236
1237 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1238
1239 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1240
1241 for (i = 0; i < 4; i++) {
1242 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001243 uint mult = (ext_csd[idx + 2] << 16) +
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001244 (ext_csd[idx + 1] << 8) + ext_csd[idx];
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001245 if (mult)
1246 has_parts = true;
1247 if (!part_completed)
1248 continue;
1249 mmc->capacity_gp[i] = mult;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001250 mmc->capacity_gp[i] *=
1251 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1252 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruzf8e89d62014-12-23 10:50:21 +01001253 mmc->capacity_gp[i] <<= 19;
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001254 }
1255
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001256 if (part_completed) {
1257 mmc->enh_user_size =
1258 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1259 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1260 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1261 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1262 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1263 mmc->enh_user_size <<= 19;
1264 mmc->enh_user_start =
1265 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1266 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1267 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1268 ext_csd[EXT_CSD_ENH_START_ADDR];
1269 if (mmc->high_capacity)
1270 mmc->enh_user_start <<= 9;
1271 }
Diego Santa Cruza7f852b2014-12-23 10:50:22 +01001272
Lei Wene6f99a52011-06-22 17:03:31 +00001273 /*
Oliver Metz1937e5a2013-10-01 20:32:07 +02001274 * Host needs to enable ERASE_GRP_DEF bit if device is
1275 * partitioned. This bit will be lost every time after a reset
1276 * or power off. This will affect erase size.
Lei Wene6f99a52011-06-22 17:03:31 +00001277 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001278 if (part_completed)
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001279 has_parts = true;
Oliver Metz1937e5a2013-10-01 20:32:07 +02001280 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
Diego Santa Cruz0c453bb2014-12-23 10:50:20 +01001281 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1282 has_parts = true;
1283 if (has_parts) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001284 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1285 EXT_CSD_ERASE_GROUP_DEF, 1);
1286
1287 if (err)
1288 return err;
Hannes Petermaier021a8052014-08-08 09:47:22 +02001289 else
1290 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001291 }
Oliver Metz1937e5a2013-10-01 20:32:07 +02001292
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001293 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001294 /* Read out group size from ext_csd */
Lei Wen0560db12011-10-03 20:35:10 +00001295 mmc->erase_grp_size =
Diego Santa Cruza4ff9f82014-12-23 10:50:24 +01001296 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
Markus Niebeld7b29122014-11-18 15:11:42 +01001297 /*
1298 * if high capacity and partition setting completed
1299 * SEC_COUNT is valid even if it is smaller than 2 GiB
1300 * JEDEC Standard JESD84-B45, 6.2.4
1301 */
Diego Santa Cruz8a0cf492014-12-23 10:50:27 +01001302 if (mmc->high_capacity && part_completed) {
Markus Niebeld7b29122014-11-18 15:11:42 +01001303 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1304 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1305 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1306 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1307 capacity *= MMC_MAX_BLOCK_LEN;
1308 mmc->capacity_user = capacity;
1309 }
Simon Glass8bfa1952013-04-03 08:54:30 +00001310 } else {
Oliver Metz1937e5a2013-10-01 20:32:07 +02001311 /* Calculate the group size from the csd value. */
Lei Wene6f99a52011-06-22 17:03:31 +00001312 int erase_gsz, erase_gmul;
1313 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1314 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1315 mmc->erase_grp_size = (erase_gsz + 1)
1316 * (erase_gmul + 1);
1317 }
Diego Santa Cruz037dc0a2014-12-23 10:50:25 +01001318
1319 mmc->hc_wp_grp_size = 1024
1320 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1321 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
Diego Santa Cruz9e41a002014-12-23 10:50:33 +01001322
1323 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
Sukumar Ghoraid23e2c02010-09-20 18:29:29 +05301324 }
1325
Stephen Warrenf866a462013-06-11 15:14:01 -06001326 err = mmc_set_capacity(mmc, mmc->part_num);
1327 if (err)
1328 return err;
1329
Andy Fleming272cc702008-10-30 16:41:01 -05001330 if (IS_SD(mmc))
1331 err = sd_change_freq(mmc);
1332 else
1333 err = mmc_change_freq(mmc);
1334
1335 if (err)
1336 return err;
1337
1338 /* Restrict card's capabilities by what the host can do */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001339 mmc->card_caps &= mmc->cfg->host_caps;
Andy Fleming272cc702008-10-30 16:41:01 -05001340
1341 if (IS_SD(mmc)) {
1342 if (mmc->card_caps & MMC_MODE_4BIT) {
1343 cmd.cmdidx = MMC_CMD_APP_CMD;
1344 cmd.resp_type = MMC_RSP_R1;
1345 cmd.cmdarg = mmc->rca << 16;
Andy Fleming272cc702008-10-30 16:41:01 -05001346
1347 err = mmc_send_cmd(mmc, &cmd, NULL);
1348 if (err)
1349 return err;
1350
1351 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1352 cmd.resp_type = MMC_RSP_R1;
1353 cmd.cmdarg = 2;
Andy Fleming272cc702008-10-30 16:41:01 -05001354 err = mmc_send_cmd(mmc, &cmd, NULL);
1355 if (err)
1356 return err;
1357
1358 mmc_set_bus_width(mmc, 4);
1359 }
1360
1361 if (mmc->card_caps & MMC_MODE_HS)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001362 mmc->tran_speed = 50000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001363 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001364 mmc->tran_speed = 25000000;
Andrew Gabbasovfc5b32f2014-12-25 10:22:25 -06001365 } else if (mmc->version >= MMC_VERSION_4) {
1366 /* Only version 4 of MMC supports wider bus widths */
Andy Fleming7798f6d2012-10-31 19:02:38 +00001367 int idx;
1368
1369 /* An array of possible bus widths in order of preference */
1370 static unsigned ext_csd_bits[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001371 EXT_CSD_DDR_BUS_WIDTH_8,
1372 EXT_CSD_DDR_BUS_WIDTH_4,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001373 EXT_CSD_BUS_WIDTH_8,
1374 EXT_CSD_BUS_WIDTH_4,
1375 EXT_CSD_BUS_WIDTH_1,
1376 };
1377
1378 /* An array to map CSD bus widths to host cap bits */
1379 static unsigned ext_to_hostcaps[] = {
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001380 [EXT_CSD_DDR_BUS_WIDTH_4] =
1381 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1382 [EXT_CSD_DDR_BUS_WIDTH_8] =
1383 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001384 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1385 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1386 };
1387
1388 /* An array to map chosen bus width to an integer */
1389 static unsigned widths[] = {
Jaehoon Chungd22e3d42014-05-16 13:59:54 +09001390 8, 4, 8, 4, 1,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001391 };
1392
1393 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1394 unsigned int extw = ext_csd_bits[idx];
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001395 unsigned int caps = ext_to_hostcaps[extw];
Andy Fleming7798f6d2012-10-31 19:02:38 +00001396
1397 /*
Andrew Gabbasovbf477072014-12-25 10:22:24 -06001398 * If the bus width is still not changed,
1399 * don't try to set the default again.
1400 * Otherwise, recover from switch attempts
1401 * by switching to 1-bit bus width.
1402 */
1403 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1404 mmc->bus_width == 1) {
1405 err = 0;
1406 break;
1407 }
1408
1409 /*
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001410 * Check to make sure the card and controller support
1411 * these capabilities
Andy Fleming7798f6d2012-10-31 19:02:38 +00001412 */
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001413 if ((mmc->card_caps & caps) != caps)
Andy Fleming7798f6d2012-10-31 19:02:38 +00001414 continue;
1415
Andy Fleming272cc702008-10-30 16:41:01 -05001416 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
Andy Fleming7798f6d2012-10-31 19:02:38 +00001417 EXT_CSD_BUS_WIDTH, extw);
Andy Fleming272cc702008-10-30 16:41:01 -05001418
1419 if (err)
Lei Wen41378942011-10-03 20:35:11 +00001420 continue;
Andy Fleming272cc702008-10-30 16:41:01 -05001421
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001422 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
Andy Fleming7798f6d2012-10-31 19:02:38 +00001423 mmc_set_bus_width(mmc, widths[idx]);
Andy Fleming272cc702008-10-30 16:41:01 -05001424
Lei Wen41378942011-10-03 20:35:11 +00001425 err = mmc_send_ext_csd(mmc, test_csd);
Andy Fleming272cc702008-10-30 16:41:01 -05001426
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001427 if (err)
1428 continue;
1429
1430 /* Only compare read only fields */
1431 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1432 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1433 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1434 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1435 ext_csd[EXT_CSD_REV]
1436 == test_csd[EXT_CSD_REV] &&
1437 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1438 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1439 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1440 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
Lei Wen41378942011-10-03 20:35:11 +00001441 break;
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001442 else
1443 err = SWITCH_ERR;
Andy Fleming272cc702008-10-30 16:41:01 -05001444 }
1445
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001446 if (err)
1447 return err;
1448
Andy Fleming272cc702008-10-30 16:41:01 -05001449 if (mmc->card_caps & MMC_MODE_HS) {
1450 if (mmc->card_caps & MMC_MODE_HS_52MHz)
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001451 mmc->tran_speed = 52000000;
Andy Fleming272cc702008-10-30 16:41:01 -05001452 else
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001453 mmc->tran_speed = 26000000;
1454 }
Andy Fleming272cc702008-10-30 16:41:01 -05001455 }
1456
Jaehoon Chungad5fd922012-03-26 21:16:03 +00001457 mmc_set_clock(mmc, mmc->tran_speed);
1458
Andrew Gabbasov5af8f452014-12-01 06:59:11 -06001459 /* Fix the block length for DDR mode */
1460 if (mmc->ddr_mode) {
1461 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1462 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1463 }
1464
Andy Fleming272cc702008-10-30 16:41:01 -05001465 /* fill in device description */
1466 mmc->block_dev.lun = 0;
1467 mmc->block_dev.type = 0;
1468 mmc->block_dev.blksz = mmc->read_bl_len;
Egbert Eich0472fbf2013-04-09 21:11:56 +00001469 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
Rabin Vincent9b1f9422009-04-05 13:30:54 +05301470 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
Paul Burton56196822013-09-04 16:12:25 +01001471#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Taylor Huttbabce5f2012-10-20 17:15:59 +00001472 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1473 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1474 (mmc->cid[3] >> 16) & 0xffff);
1475 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1476 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1477 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1478 (mmc->cid[2] >> 24) & 0xff);
1479 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1480 (mmc->cid[2] >> 16) & 0xf);
Paul Burton56196822013-09-04 16:12:25 +01001481#else
1482 mmc->block_dev.vendor[0] = 0;
1483 mmc->block_dev.product[0] = 0;
1484 mmc->block_dev.revision[0] = 0;
1485#endif
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001486#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -05001487 init_part(&mmc->block_dev);
Mikhail Kshevetskiy122efd42012-07-09 08:53:38 +00001488#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001489
1490 return 0;
1491}
1492
Kim Phillipsfdbb8732012-10-29 13:34:43 +00001493static int mmc_send_if_cond(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001494{
1495 struct mmc_cmd cmd;
1496 int err;
1497
1498 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1499 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001500 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
Andy Fleming272cc702008-10-30 16:41:01 -05001501 cmd.resp_type = MMC_RSP_R7;
Andy Fleming272cc702008-10-30 16:41:01 -05001502
1503 err = mmc_send_cmd(mmc, &cmd, NULL);
1504
1505 if (err)
1506 return err;
1507
Rabin Vincent998be3d2009-04-05 13:30:56 +05301508 if ((cmd.response[0] & 0xff) != 0xaa)
Andy Fleming272cc702008-10-30 16:41:01 -05001509 return UNUSABLE_ERR;
1510 else
1511 mmc->version = SD_VERSION_2;
1512
1513 return 0;
1514}
1515
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001516/* not used any more */
1517int __deprecated mmc_register(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001518{
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001519#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1520 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1521#endif
1522 return -1;
1523}
1524
1525struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1526{
1527 struct mmc *mmc;
1528
1529 /* quick validation */
1530 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1531 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1532 return NULL;
1533
1534 mmc = calloc(1, sizeof(*mmc));
1535 if (mmc == NULL)
1536 return NULL;
1537
1538 mmc->cfg = cfg;
1539 mmc->priv = priv;
1540
1541 /* the following chunk was mmc_register() */
1542
Markus Niebelab711882013-12-16 13:40:46 +01001543 /* Setup dsr related values */
1544 mmc->dsr_imp = 0;
1545 mmc->dsr = 0xffffffff;
Andy Fleming272cc702008-10-30 16:41:01 -05001546 /* Setup the universal parts of the block interface just once */
1547 mmc->block_dev.if_type = IF_TYPE_MMC;
1548 mmc->block_dev.dev = cur_dev_num++;
1549 mmc->block_dev.removable = 1;
1550 mmc->block_dev.block_read = mmc_bread;
1551 mmc->block_dev.block_write = mmc_bwrite;
Lei Wene6f99a52011-06-22 17:03:31 +00001552 mmc->block_dev.block_erase = mmc_berase;
Andy Fleming272cc702008-10-30 16:41:01 -05001553
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001554 /* setup initial part type */
1555 mmc->block_dev.part_type = mmc->cfg->part_type;
Andy Fleming272cc702008-10-30 16:41:01 -05001556
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001557 INIT_LIST_HEAD(&mmc->link);
Andy Fleming272cc702008-10-30 16:41:01 -05001558
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001559 list_add_tail(&mmc->link, &mmc_devices);
1560
1561 return mmc;
1562}
1563
1564void mmc_destroy(struct mmc *mmc)
1565{
1566 /* only freeing memory for now */
1567 free(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001568}
1569
Matthew McClintockdf3fc522011-05-24 05:31:19 +00001570#ifdef CONFIG_PARTITIONS
Andy Fleming272cc702008-10-30 16:41:01 -05001571block_dev_desc_t *mmc_get_dev(int dev)
1572{
1573 struct mmc *mmc = find_mmc_device(dev);
Benoît Thébaudeau6bb4b4b2012-08-10 08:59:12 +00001574 if (!mmc || mmc_init(mmc))
Łukasz Majewski40242bc2012-04-19 02:39:18 +00001575 return NULL;
Andy Fleming272cc702008-10-30 16:41:01 -05001576
Łukasz Majewski40242bc2012-04-19 02:39:18 +00001577 return &mmc->block_dev;
Andy Fleming272cc702008-10-30 16:41:01 -05001578}
Matthew McClintockdf3fc522011-05-24 05:31:19 +00001579#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001580
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001581/* board-specific MMC power initializations. */
1582__weak void board_mmc_power_init(void)
1583{
1584}
1585
Che-Liang Chioue9550442012-11-28 15:21:13 +00001586int mmc_start_init(struct mmc *mmc)
Andy Fleming272cc702008-10-30 16:41:01 -05001587{
Macpaul Linafd59322011-11-14 23:35:39 +00001588 int err;
Andy Fleming272cc702008-10-30 16:41:01 -05001589
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001590 /* we pretend there's no card when init is NULL */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001591 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
Thierry Reding48972d92012-01-02 01:15:37 +00001592 mmc->has_init = 0;
Paul Burton56196822013-09-04 16:12:25 +01001593#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Thierry Reding48972d92012-01-02 01:15:37 +00001594 printf("MMC: no card present\n");
Paul Burton56196822013-09-04 16:12:25 +01001595#endif
Thierry Reding48972d92012-01-02 01:15:37 +00001596 return NO_CARD_ERR;
1597 }
1598
Lei Wenbc897b12011-05-02 16:26:26 +00001599 if (mmc->has_init)
1600 return 0;
1601
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08001602#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1603 mmc_adapter_card_type_ident();
1604#endif
Paul Kocialkowski95de9ab2014-11-08 20:55:45 +01001605 board_mmc_power_init();
1606
Pantelis Antoniouab769f22014-02-26 19:28:45 +02001607 /* made sure it's not NULL earlier */
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001608 err = mmc->cfg->ops->init(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001609
1610 if (err)
1611 return err;
1612
Andrew Gabbasov786e8f82014-12-01 06:59:09 -06001613 mmc->ddr_mode = 0;
Ilya Yanokb86b85e2009-06-29 17:53:16 +04001614 mmc_set_bus_width(mmc, 1);
1615 mmc_set_clock(mmc, 1);
1616
Andy Fleming272cc702008-10-30 16:41:01 -05001617 /* Reset the Card */
1618 err = mmc_go_idle(mmc);
1619
1620 if (err)
1621 return err;
1622
Lei Wenbc897b12011-05-02 16:26:26 +00001623 /* The internal partition reset to user partition(0) at every CMD0*/
1624 mmc->part_num = 0;
1625
Andy Fleming272cc702008-10-30 16:41:01 -05001626 /* Test for SD version 2 */
Macpaul Linafd59322011-11-14 23:35:39 +00001627 err = mmc_send_if_cond(mmc);
Andy Fleming272cc702008-10-30 16:41:01 -05001628
Andy Fleming272cc702008-10-30 16:41:01 -05001629 /* Now try to get the SD card's operating condition */
1630 err = sd_send_op_cond(mmc);
1631
1632 /* If the command timed out, we check for an MMC card */
1633 if (err == TIMEOUT) {
1634 err = mmc_send_op_cond(mmc);
1635
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001636 if (err) {
Paul Burton56196822013-09-04 16:12:25 +01001637#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
Andy Fleming272cc702008-10-30 16:41:01 -05001638 printf("Card did not respond to voltage select!\n");
Paul Burton56196822013-09-04 16:12:25 +01001639#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001640 return UNUSABLE_ERR;
1641 }
1642 }
1643
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001644 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001645 mmc->init_in_progress = 1;
1646
1647 return err;
1648}
1649
1650static int mmc_complete_init(struct mmc *mmc)
1651{
1652 int err = 0;
1653
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001654 mmc->init_in_progress = 0;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001655 if (mmc->op_cond_pending)
1656 err = mmc_complete_op_cond(mmc);
1657
1658 if (!err)
1659 err = mmc_startup(mmc);
Lei Wenbc897b12011-05-02 16:26:26 +00001660 if (err)
1661 mmc->has_init = 0;
1662 else
1663 mmc->has_init = 1;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001664 return err;
1665}
1666
1667int mmc_init(struct mmc *mmc)
1668{
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001669 int err = 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001670 unsigned start;
Che-Liang Chioue9550442012-11-28 15:21:13 +00001671
1672 if (mmc->has_init)
1673 return 0;
Mateusz Zalegad803fea2014-04-29 20:15:30 +02001674
1675 start = get_timer(0);
1676
Che-Liang Chioue9550442012-11-28 15:21:13 +00001677 if (!mmc->init_in_progress)
1678 err = mmc_start_init(mmc);
1679
Andrew Gabbasovbd47c132015-03-19 07:44:07 -05001680 if (!err)
Che-Liang Chioue9550442012-11-28 15:21:13 +00001681 err = mmc_complete_init(mmc);
1682 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
Lei Wenbc897b12011-05-02 16:26:26 +00001683 return err;
Andy Fleming272cc702008-10-30 16:41:01 -05001684}
1685
Markus Niebelab711882013-12-16 13:40:46 +01001686int mmc_set_dsr(struct mmc *mmc, u16 val)
1687{
1688 mmc->dsr = val;
1689 return 0;
1690}
1691
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001692/* CPU-specific MMC initializations */
1693__weak int cpu_mmc_init(bd_t *bis)
Andy Fleming272cc702008-10-30 16:41:01 -05001694{
1695 return -1;
1696}
1697
Jeroen Hofsteecee9ab72014-07-10 22:46:28 +02001698/* board-specific MMC initializations. */
1699__weak int board_mmc_init(bd_t *bis)
1700{
1701 return -1;
1702}
Andy Fleming272cc702008-10-30 16:41:01 -05001703
Paul Burton56196822013-09-04 16:12:25 +01001704#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1705
Andy Fleming272cc702008-10-30 16:41:01 -05001706void print_mmc_devices(char separator)
1707{
1708 struct mmc *m;
1709 struct list_head *entry;
Przemyslaw Marczak34dd9282015-02-20 12:29:27 +01001710 char *mmc_type;
Andy Fleming272cc702008-10-30 16:41:01 -05001711
1712 list_for_each(entry, &mmc_devices) {
1713 m = list_entry(entry, struct mmc, link);
1714
Przemyslaw Marczak34dd9282015-02-20 12:29:27 +01001715 if (m->has_init)
1716 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1717 else
1718 mmc_type = NULL;
1719
Pantelis Antoniou93bfd612014-03-11 19:34:20 +02001720 printf("%s: %d", m->cfg->name, m->block_dev.dev);
Przemyslaw Marczak34dd9282015-02-20 12:29:27 +01001721 if (mmc_type)
1722 printf(" (%s)", mmc_type);
Andy Fleming272cc702008-10-30 16:41:01 -05001723
Lubomir Popove75eaf12014-11-11 12:25:42 +02001724 if (entry->next != &mmc_devices) {
1725 printf("%c", separator);
1726 if (separator != '\n')
1727 puts (" ");
1728 }
Andy Fleming272cc702008-10-30 16:41:01 -05001729 }
1730
1731 printf("\n");
1732}
1733
Paul Burton56196822013-09-04 16:12:25 +01001734#else
1735void print_mmc_devices(char separator) { }
1736#endif
1737
Lei Wenea6ebe22011-05-02 16:26:25 +00001738int get_mmc_num(void)
1739{
1740 return cur_dev_num;
1741}
1742
Che-Liang Chioue9550442012-11-28 15:21:13 +00001743void mmc_set_preinit(struct mmc *mmc, int preinit)
1744{
1745 mmc->preinit = preinit;
1746}
1747
1748static void do_preinit(void)
1749{
1750 struct mmc *m;
1751 struct list_head *entry;
1752
1753 list_for_each(entry, &mmc_devices) {
1754 m = list_entry(entry, struct mmc, link);
1755
Yangbo Lu5a8dbdc2015-04-22 13:57:00 +08001756#ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1757 mmc_set_preinit(m, 1);
1758#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001759 if (m->preinit)
1760 mmc_start_init(m);
1761 }
1762}
1763
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001764#if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1765static int mmc_probe(bd_t *bis)
1766{
1767 return 0;
1768}
1769#elif defined(CONFIG_DM_MMC)
1770static int mmc_probe(bd_t *bis)
1771{
1772 int ret;
1773 struct uclass *uc;
1774 struct udevice *m;
1775
1776 ret = uclass_get(UCLASS_MMC, &uc);
1777 if (ret)
1778 return ret;
1779
1780 uclass_foreach_dev(m, uc) {
1781 ret = device_probe(m);
1782 if (ret)
1783 printf("%s - probe failed: %d\n", m->name, ret);
1784 }
1785
1786 return 0;
1787}
1788#else
1789static int mmc_probe(bd_t *bis)
1790{
1791 if (board_mmc_init(bis) < 0)
1792 cpu_mmc_init(bis);
1793
1794 return 0;
1795}
1796#endif
Che-Liang Chioue9550442012-11-28 15:21:13 +00001797
Andy Fleming272cc702008-10-30 16:41:01 -05001798int mmc_initialize(bd_t *bis)
1799{
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001800 static int initialized = 0;
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001801 int ret;
Daniel Kochmański1b26bab2015-05-29 16:55:43 +02001802 if (initialized) /* Avoid initializing mmc multiple times */
1803 return 0;
1804 initialized = 1;
1805
Andy Fleming272cc702008-10-30 16:41:01 -05001806 INIT_LIST_HEAD (&mmc_devices);
1807 cur_dev_num = 0;
1808
Sjoerd Simons8e3332e2015-08-30 16:55:45 -06001809 ret = mmc_probe(bis);
1810 if (ret)
1811 return ret;
Andy Fleming272cc702008-10-30 16:41:01 -05001812
Ying Zhangbb0dc102013-08-16 15:16:11 +08001813#ifndef CONFIG_SPL_BUILD
Andy Fleming272cc702008-10-30 16:41:01 -05001814 print_mmc_devices(',');
Ying Zhangbb0dc102013-08-16 15:16:11 +08001815#endif
Andy Fleming272cc702008-10-30 16:41:01 -05001816
Che-Liang Chioue9550442012-11-28 15:21:13 +00001817 do_preinit();
Andy Fleming272cc702008-10-30 16:41:01 -05001818 return 0;
1819}
Amar3690d6d2013-04-27 11:42:58 +05301820
1821#ifdef CONFIG_SUPPORT_EMMC_BOOT
1822/*
1823 * This function changes the size of boot partition and the size of rpmb
1824 * partition present on EMMC devices.
1825 *
1826 * Input Parameters:
1827 * struct *mmc: pointer for the mmc device strcuture
1828 * bootsize: size of boot partition
1829 * rpmbsize: size of rpmb partition
1830 *
1831 * Returns 0 on success.
1832 */
1833
1834int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1835 unsigned long rpmbsize)
1836{
1837 int err;
1838 struct mmc_cmd cmd;
1839
1840 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1841 cmd.cmdidx = MMC_CMD_RES_MAN;
1842 cmd.resp_type = MMC_RSP_R1b;
1843 cmd.cmdarg = MMC_CMD62_ARG1;
1844
1845 err = mmc_send_cmd(mmc, &cmd, NULL);
1846 if (err) {
1847 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1848 return err;
1849 }
1850
1851 /* Boot partition changing mode */
1852 cmd.cmdidx = MMC_CMD_RES_MAN;
1853 cmd.resp_type = MMC_RSP_R1b;
1854 cmd.cmdarg = MMC_CMD62_ARG2;
1855
1856 err = mmc_send_cmd(mmc, &cmd, NULL);
1857 if (err) {
1858 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1859 return err;
1860 }
1861 /* boot partition size is multiple of 128KB */
1862 bootsize = (bootsize * 1024) / 128;
1863
1864 /* Arg: boot partition size */
1865 cmd.cmdidx = MMC_CMD_RES_MAN;
1866 cmd.resp_type = MMC_RSP_R1b;
1867 cmd.cmdarg = bootsize;
1868
1869 err = mmc_send_cmd(mmc, &cmd, NULL);
1870 if (err) {
1871 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1872 return err;
1873 }
1874 /* RPMB partition size is multiple of 128KB */
1875 rpmbsize = (rpmbsize * 1024) / 128;
1876 /* Arg: RPMB partition size */
1877 cmd.cmdidx = MMC_CMD_RES_MAN;
1878 cmd.resp_type = MMC_RSP_R1b;
1879 cmd.cmdarg = rpmbsize;
1880
1881 err = mmc_send_cmd(mmc, &cmd, NULL);
1882 if (err) {
1883 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1884 return err;
1885 }
1886 return 0;
1887}
1888
1889/*
Tom Rini5a99b9d2014-02-05 10:24:22 -05001890 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1891 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1892 * and BOOT_MODE.
1893 *
1894 * Returns 0 on success.
1895 */
1896int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1897{
1898 int err;
1899
1900 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1901 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1902 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1903 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1904
1905 if (err)
1906 return err;
1907 return 0;
1908}
1909
1910/*
Tom Rini792970b2014-02-05 10:24:21 -05001911 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1912 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1913 * PARTITION_ACCESS.
1914 *
1915 * Returns 0 on success.
1916 */
1917int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1918{
1919 int err;
1920
1921 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1922 EXT_CSD_BOOT_ACK(ack) |
1923 EXT_CSD_BOOT_PART_NUM(part_num) |
1924 EXT_CSD_PARTITION_ACCESS(access));
1925
1926 if (err)
1927 return err;
1928 return 0;
1929}
Tom Rini33ace362014-02-07 14:15:20 -05001930
1931/*
1932 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1933 * for enable. Note that this is a write-once field for non-zero values.
1934 *
1935 * Returns 0 on success.
1936 */
1937int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1938{
1939 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1940 enable);
1941}
Amar3690d6d2013-04-27 11:42:58 +05301942#endif