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wdenk945af8d2003-07-16 21:53:01 +00001/*
wdenk414eec32005-04-02 22:37:54 +00002 * (C) Copyright 2003-2005
wdenk945af8d2003-07-16 21:53:01 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenk945af8d2003-07-16 21:53:01 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
wdenkcbd8a352004-02-24 02:00:03 +000016#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
Detlev Zundelfd428c02010-03-12 10:01:12 +010017#define CONFIG_MPC5200 1 /* (more precisely a MPC5200 CPU) */
wdenk945af8d2003-07-16 21:53:01 +000018#define CONFIG_ICECUBE 1 /* ... on IceCube board */
19
Wolfgang Denk2ae18242010-10-06 09:05:45 +020020/*
21 * Valid values for CONFIG_SYS_TEXT_BASE are:
22 * 0xFFF00000 boot high (standard configuration)
23 * 0xFF000000 boot low for 16 MiB boards
24 * 0xFF800000 boot low for 8 MiB boards
25 * 0x00100000 boot from RAM (for testing only)
26 */
27#ifndef CONFIG_SYS_TEXT_BASE
28#define CONFIG_SYS_TEXT_BASE 0xFFF00000
29#endif
30
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020031#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
wdenk945af8d2003-07-16 21:53:01 +000032
Becky Bruce31d82672008-05-08 19:02:12 -050033#define CONFIG_HIGH_BATS 1 /* High BATs supported */
34
wdenk945af8d2003-07-16 21:53:01 +000035/*
36 * Serial console configuration
37 */
38#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
39#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020040#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
wdenk945af8d2003-07-16 21:53:01 +000041
wdenk96e48cf2003-08-05 18:22:44 +000042
wdenk96e48cf2003-08-05 18:22:44 +000043/*
44 * PCI Mapping:
45 * 0x40000000 - 0x4fffffff - PCI Memory
46 * 0x50000000 - 0x50ffffff - PCI IO Space
47 */
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020048#define CONFIG_PCI
49
50#if defined(CONFIG_PCI)
wdenk96e48cf2003-08-05 18:22:44 +000051#define CONFIG_PCI_PNP 1
52#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liewf33fca22008-03-30 01:19:06 -050053#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
wdenk96e48cf2003-08-05 18:22:44 +000054
55#define CONFIG_PCI_MEM_BUS 0x40000000
56#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
57#define CONFIG_PCI_MEM_SIZE 0x10000000
58
59#define CONFIG_PCI_IO_BUS 0x50000000
60#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
61#define CONFIG_PCI_IO_SIZE 0x01000000
Rafal Jaworowskib66a9382006-03-29 13:17:09 +020062#endif
wdenk96e48cf2003-08-05 18:22:44 +000063
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020064#define CONFIG_SYS_XLB_PIPELINING 1
wdenke1599e82004-10-10 23:27:33 +000065
Marian Balakowicz63ff0042005-10-28 22:30:33 +020066#define CONFIG_MII 1
wdenk96e48cf2003-08-05 18:22:44 +000067#define CONFIG_EEPRO100 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
wdenkf54ebdf2003-09-17 15:10:32 +000069#define CONFIG_NS8382X 1
wdenk96e48cf2003-08-05 18:22:44 +000070
wdenk132ba5f2004-02-27 08:20:54 +000071/* Partitions */
72#define CONFIG_MAC_PARTITION
73#define CONFIG_DOS_PARTITION
wdenk64f70be2004-09-28 20:34:50 +000074#define CONFIG_ISO_PARTITION
wdenk132ba5f2004-02-27 08:20:54 +000075
wdenk80885a92004-02-26 23:46:20 +000076/* USB */
Markus Klotzbuecherae3b7702006-11-27 11:46:46 +010077#define CONFIG_USB_OHCI_NEW
wdenk80885a92004-02-26 23:46:20 +000078#define CONFIG_USB_STORAGE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020079#define CONFIG_SYS_OHCI_BE_CONTROLLER
80#undef CONFIG_SYS_USB_OHCI_BOARD_INIT
81#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
82#define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
83#define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
84#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
Markus Klotzbuecherae3b7702006-11-27 11:46:46 +010085
wdenk414eec32005-04-02 22:37:54 +000086#define CONFIG_TIMESTAMP /* Print image info with timestamp */
87
wdenk945af8d2003-07-16 21:53:01 +000088
Jon Loeliger348f2582007-07-08 13:46:18 -050089/*
Jon Loeliger11799432007-07-10 09:02:57 -050090 * BOOTP options
91 */
92#define CONFIG_BOOTP_BOOTFILESIZE
93#define CONFIG_BOOTP_BOOTPATH
94#define CONFIG_BOOTP_GATEWAY
95#define CONFIG_BOOTP_HOSTNAME
96
97
98/*
Jon Loeliger348f2582007-07-08 13:46:18 -050099 * Command line configuration.
100 */
101#include <config_cmd_default.h>
102
103#define CONFIG_CMD_EEPROM
104#define CONFIG_CMD_FAT
105#define CONFIG_CMD_I2C
106#define CONFIG_CMD_IDE
107#define CONFIG_CMD_NFS
108#define CONFIG_CMD_SNTP
Jon Loeliger11799432007-07-10 09:02:57 -0500109#define CONFIG_CMD_USB
110
111#if defined(CONFIG_PCI)
112#define CONFIG_CMD_PCI
113#endif
Jon Loeliger348f2582007-07-08 13:46:18 -0500114
wdenk945af8d2003-07-16 21:53:01 +0000115
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200116#if (CONFIG_SYS_TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117# define CONFIG_SYS_LOWBOOT 1
118# define CONFIG_SYS_LOWBOOT16 1
wdenk5cf9da42003-11-07 13:42:26 +0000119#endif
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200120#if (CONFIG_SYS_TEXT_BASE == 0xFF800000) /* Boot low with 8 MB Flash */
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100121#if defined(CONFIG_LITE5200B)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200122# error CONFIG_SYS_LOWBOOT08 is incompatible with the Lite5200B
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100123#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200124# define CONFIG_SYS_LOWBOOT 1
125# define CONFIG_SYS_LOWBOOT08 1
wdenk5cf9da42003-11-07 13:42:26 +0000126#endif
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100127#endif
wdenk5cf9da42003-11-07 13:42:26 +0000128
wdenk945af8d2003-07-16 21:53:01 +0000129/*
130 * Autobooting
131 */
132#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
wdenk5cf9da42003-11-07 13:42:26 +0000133
134#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk32bf3d12008-03-03 12:16:44 +0100135 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
wdenk5cf9da42003-11-07 13:42:26 +0000136 "echo"
137
138#undef CONFIG_BOOTARGS
139
140#define CONFIG_EXTRA_ENV_SETTINGS \
141 "netdev=eth0\0" \
142 "nfsargs=setenv bootargs root=/dev/nfs rw " \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100143 "nfsroot=${serverip}:${rootpath}\0" \
wdenk5cf9da42003-11-07 13:42:26 +0000144 "ramargs=setenv bootargs root=/dev/ram rw\0" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100145 "addip=setenv bootargs ${bootargs} " \
146 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
147 ":${hostname}:${netdev}:off panic=1\0" \
wdenk5cf9da42003-11-07 13:42:26 +0000148 "flash_nfs=run nfsargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100149 "bootm ${kernel_addr}\0" \
wdenk5cf9da42003-11-07 13:42:26 +0000150 "flash_self=run ramargs addip;" \
Wolfgang Denkfe126d82005-11-20 21:40:11 +0100151 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
152 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
wdenk5cf9da42003-11-07 13:42:26 +0000153 "rootpath=/opt/eldk/ppc_82xx\0" \
154 "bootfile=/tftpboot/MPC5200/uImage\0" \
155 ""
156
157#define CONFIG_BOOTCOMMAND "run flash_self"
wdenk945af8d2003-07-16 21:53:01 +0000158
wdenkacf98e72003-09-16 11:39:10 +0000159/*
160 * IPB Bus clocking configuration.
161 */
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100162#if defined(CONFIG_LITE5200B)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100164#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#undef CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
wdenkacf98e72003-09-16 11:39:10 +0000166#endif
Stefan Roesee59581c2006-11-28 17:55:49 +0100167
168/* pass open firmware flat tree */
Grant Likelycf2817a2007-09-06 09:46:23 -0600169#define CONFIG_OF_LIBFDT 1
Stefan Roesee59581c2006-11-28 17:55:49 +0100170#define CONFIG_OF_BOARD_SETUP 1
171
Stefan Roesee59581c2006-11-28 17:55:49 +0100172#define OF_CPU "PowerPC,5200@0"
173#define OF_SOC "soc5200@f0000000"
Domen Puncer39f23cd2007-04-20 11:13:16 +0200174#define OF_TBCLK (bd->bi_busfreq / 4)
Stefan Roesee59581c2006-11-28 17:55:49 +0100175#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
176
wdenk945af8d2003-07-16 21:53:01 +0000177/*
178 * I2C configuration
179 */
wdenk531716e2003-09-13 19:01:12 +0000180#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181#define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #1 or #2 */
dzuab209d52003-09-30 14:08:43 +0000182
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200183#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
184#define CONFIG_SYS_I2C_SLAVE 0x7F
wdenk531716e2003-09-13 19:01:12 +0000185
186/*
187 * EEPROM configuration
188 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200189#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
190#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
191#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
192#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
wdenk945af8d2003-07-16 21:53:01 +0000193
194/*
195 * Flash configuration
196 */
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100197#if defined(CONFIG_LITE5200B)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200198#define CONFIG_SYS_FLASH_BASE 0xFE000000
199#define CONFIG_SYS_FLASH_SIZE 0x01000000
200#if !defined(CONFIG_SYS_LOWBOOT)
201#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x01760000 + 0x00800000)
202#else /* CONFIG_SYS_LOWBOOT */
203#if defined(CONFIG_SYS_LOWBOOT08)
204# error CONFIG_SYS_LOWBOOT08 is incompatible with the Lite5200B
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100205#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200206#if defined(CONFIG_SYS_LOWBOOT16)
207#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x01060000)
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100208#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200209#endif /* CONFIG_SYS_LOWBOOT */
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100210#else /* !CONFIG_LITE5200B (IceCube)*/
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200211#define CONFIG_SYS_FLASH_BASE 0xFF000000
212#define CONFIG_SYS_FLASH_SIZE 0x01000000
213#if !defined(CONFIG_SYS_LOWBOOT)
214#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00740000 + 0x00800000)
215#else /* CONFIG_SYS_LOWBOOT */
216#if defined(CONFIG_SYS_LOWBOOT08)
217#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000 + 0x00800000)
wdenk7152b1d2003-09-05 23:19:14 +0000218#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200219#if defined(CONFIG_SYS_LOWBOOT16)
220#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
wdenk5cf9da42003-11-07 13:42:26 +0000221#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#endif /* CONFIG_SYS_LOWBOOT */
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100223#endif /* CONFIG_LITE5200B */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200224#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of memory banks */
wdenk7152b1d2003-09-05 23:19:14 +0000225
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200226#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
wdenk945af8d2003-07-16 21:53:01 +0000227
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200228#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
229#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
wdenk945af8d2003-07-16 21:53:01 +0000230
wdenk96e48cf2003-08-05 18:22:44 +0000231#undef CONFIG_FLASH_16BIT /* Flash is 8-bit */
wdenk945af8d2003-07-16 21:53:01 +0000232
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100233#if defined(CONFIG_LITE5200B)
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +0200234#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200235#define CONFIG_SYS_FLASH_CFI
236#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_CS1_START,CONFIG_SYS_CS0_START}
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100237#endif
238
wdenk945af8d2003-07-16 21:53:01 +0000239
240/*
241 * Environment settings
242 */
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200243#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200244#define CONFIG_ENV_SIZE 0x10000
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100245#if defined(CONFIG_LITE5200B)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200246#define CONFIG_ENV_SECT_SIZE 0x20000
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100247#else
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200248#define CONFIG_ENV_SECT_SIZE 0x10000
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100249#endif
wdenk96e48cf2003-08-05 18:22:44 +0000250#define CONFIG_ENV_OVERWRITE 1
wdenk945af8d2003-07-16 21:53:01 +0000251
252/*
253 * Memory map
254 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200255#define CONFIG_SYS_MBAR 0xF0000000
256#define CONFIG_SYS_SDRAM_BASE 0x00000000
257#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
wdenk945af8d2003-07-16 21:53:01 +0000258
259/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200260#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk553f0982010-10-26 13:32:32 +0200261#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
wdenk945af8d2003-07-16 21:53:01 +0000262
263
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +0200264#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200265#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenk945af8d2003-07-16 21:53:01 +0000266
Wolfgang Denk14d0a022010-10-07 21:51:12 +0200267#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200268#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
269# define CONFIG_SYS_RAMBOOT 1
wdenk945af8d2003-07-16 21:53:01 +0000270#endif
271
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200272#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
Wolfgang Denkd2e22732010-07-01 09:44:39 +0200273#define CONFIG_SYS_MALLOC_LEN (512 << 10) /* Reserve 512 kB for malloc() */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200274#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenk945af8d2003-07-16 21:53:01 +0000275
276/*
277 * Ethernet configuration
278 */
wdenkcbd8a352004-02-24 02:00:03 +0000279#define CONFIG_MPC5xxx_FEC 1
Ben Warren86321fc2009-02-05 23:58:25 -0800280#define CONFIG_MPC5xxx_FEC_MII100
wdenk04a85b32004-04-15 18:22:41 +0000281/*
Ben Warren86321fc2009-02-05 23:58:25 -0800282 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
wdenk7e780362004-04-08 22:31:29 +0000283 */
Ben Warren86321fc2009-02-05 23:58:25 -0800284/* #define CONFIG_MPC5xxx_FEC_MII10 */
wdenkd4ca31c2004-01-02 14:00:00 +0000285#define CONFIG_PHY_ADDR 0x00
wdenk945af8d2003-07-16 21:53:01 +0000286
287/*
288 * GPIO configuration
289 */
wdenkb2001f22003-12-20 22:45:10 +0000290#ifdef CONFIG_MPC5200_DDR
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200291#define CONFIG_SYS_GPS_PORT_CONFIG 0x90000004
wdenkb2001f22003-12-20 22:45:10 +0000292#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200293#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
wdenkb2001f22003-12-20 22:45:10 +0000294#endif
wdenk945af8d2003-07-16 21:53:01 +0000295
296/*
297 * Miscellaneous configurable options
298 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200299#define CONFIG_SYS_LONGHELP /* undef to save memory */
300#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
Jon Loeliger348f2582007-07-08 13:46:18 -0500301#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200302#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenk945af8d2003-07-16 21:53:01 +0000303#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200304#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenk945af8d2003-07-16 21:53:01 +0000305#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200306#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
307#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
308#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk945af8d2003-07-16 21:53:01 +0000309
Wolfgang Denkd2e22732010-07-01 09:44:39 +0200310#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
311#define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */
Wolfgang Denkd2e22732010-07-01 09:44:39 +0200312
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200313#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
314#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
wdenk945af8d2003-07-16 21:53:01 +0000315
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200316#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
wdenk945af8d2003-07-16 21:53:01 +0000317
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200318#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
wdenk945af8d2003-07-16 21:53:01 +0000319
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200320#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeliger348f2582007-07-08 13:46:18 -0500321#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200322# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeliger348f2582007-07-08 13:46:18 -0500323#endif
324
wdenk945af8d2003-07-16 21:53:01 +0000325/*
326 * Various low-level settings
327 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200328#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
329#define CONFIG_SYS_HID0_FINAL HID0_ICE
wdenk945af8d2003-07-16 21:53:01 +0000330
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100331#if defined(CONFIG_LITE5200B)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200332#define CONFIG_SYS_CS1_START CONFIG_SYS_FLASH_BASE
333#define CONFIG_SYS_CS1_SIZE CONFIG_SYS_FLASH_SIZE
334#define CONFIG_SYS_CS1_CFG 0x00047800
335#define CONFIG_SYS_CS0_START (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE)
336#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
337#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_CS0_START
338#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
339#define CONFIG_SYS_BOOTCS_CFG 0x00047800
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100340#else /* IceCube aka Lite5200 */
wdenkb2001f22003-12-20 22:45:10 +0000341#ifdef CONFIG_MPC5200_DDR
342
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200343#define CONFIG_SYS_BOOTCS_START (CONFIG_SYS_CS1_START + CONFIG_SYS_CS1_SIZE)
344#define CONFIG_SYS_BOOTCS_SIZE 0x00800000
345#define CONFIG_SYS_BOOTCS_CFG 0x00047801
346#define CONFIG_SYS_CS1_START CONFIG_SYS_FLASH_BASE
347#define CONFIG_SYS_CS1_SIZE 0x00800000
348#define CONFIG_SYS_CS1_CFG 0x00047800
wdenkb2001f22003-12-20 22:45:10 +0000349
350#else /* !CONFIG_MPC5200_DDR */
351
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200352#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
353#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
354#define CONFIG_SYS_BOOTCS_CFG 0x00047801
355#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
356#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
wdenk945af8d2003-07-16 21:53:01 +0000357
wdenkb2001f22003-12-20 22:45:10 +0000358#endif /* CONFIG_MPC5200_DDR */
Wolfgang Denk09e4b0c2006-03-17 11:42:53 +0100359#endif /*CONFIG_LITE5200B */
wdenkb2001f22003-12-20 22:45:10 +0000360
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200361#define CONFIG_SYS_CS_BURST 0x00000000
362#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
wdenk945af8d2003-07-16 21:53:01 +0000363
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200364#define CONFIG_SYS_RESET_ADDRESS 0xff000000
wdenk945af8d2003-07-16 21:53:01 +0000365
wdenk132ba5f2004-02-27 08:20:54 +0000366/*-----------------------------------------------------------------------
wdenkc3f9d492004-03-14 00:59:59 +0000367 * USB stuff
368 *-----------------------------------------------------------------------
369 */
wdenk4d13cba2004-03-14 14:09:05 +0000370#define CONFIG_USB_CLOCK 0x0001BBBB
371#define CONFIG_USB_CONFIG 0x00001000
wdenkc3f9d492004-03-14 00:59:59 +0000372
373/*-----------------------------------------------------------------------
wdenk132ba5f2004-02-27 08:20:54 +0000374 * IDE/ATA stuff Supports IDE harddisk
375 *-----------------------------------------------------------------------
376 */
377
378#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
379
380#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
381#undef CONFIG_IDE_LED /* LED for ide not supported */
382
383#define CONFIG_IDE_RESET /* reset for ide supported */
384#define CONFIG_IDE_PREINIT
385
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200386#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
387#define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 1 drive per IDE bus */
wdenk132ba5f2004-02-27 08:20:54 +0000388
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200389#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
wdenk132ba5f2004-02-27 08:20:54 +0000390
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200391#define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
wdenk132ba5f2004-02-27 08:20:54 +0000392
393/* Offset for data I/O */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200394#define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
wdenk132ba5f2004-02-27 08:20:54 +0000395
396/* Offset for normal register accesses */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200397#define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
wdenk132ba5f2004-02-27 08:20:54 +0000398
399/* Offset for alternate registers */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200400#define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
wdenk132ba5f2004-02-27 08:20:54 +0000401
402/* Interval between registers */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200403#define CONFIG_SYS_ATA_STRIDE 4
wdenk132ba5f2004-02-27 08:20:54 +0000404
wdenk64f70be2004-09-28 20:34:50 +0000405#define CONFIG_ATAPI 1
406
wdenk945af8d2003-07-16 21:53:01 +0000407#endif /* __CONFIG_H */